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patch "xhci: Workaround to get Intel xHCI reset working more reliably" added to usb-linus

PATCH [email protected] 1 participant 1 message Nov 18, 2015

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This is a note to let you know that I've just added the patch titled

xhci: Workaround to get Intel xHCI reset working more reliably

to my usb git tree which can be found at
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb.git
in the usb-linus branch.

The patch will show up in the next release of the linux-next tree (usually sometime within the next 24 hours during the week.)

The patch will hopefully also be merged in Linus's tree for the next -rc kernel release.

If you have any questions about this process, please let me know.

Quoted 1 line

From a5964396190d0c40dd549c23848c282fffa5d1f2 Mon Sep 17 00:00:00 2001

From: Rajmohan Mani <[email protected]>
Date: Wed, 18 Nov 2015 10:48:20 +0200
Subject: xhci: Workaround to get Intel xHCI reset working more reliably

Existing Intel xHCI controllers require a delay of 1 mS, after setting the CMD_RESET bit in command register, before accessing any HC registers. This allows the HC to complete the reset operation and be ready for HC register access. Without this delay, the subsequent HC register access, may result in a system hang, very rarely.

Verified CherryView / Braswell platforms go through over 5000 warm reboot cycles (which was not possible without this patch), without any xHCI reset hang.

---
 drivers/usb/host/xhci.c | 10 ++++++++++
 1 file changed, 10 insertions(+)
drivers/usb/host/xhci.c +10 -0
index 6e7dc6f93978..dfa44d3e8eee 100644
@@ -175,6 +175,16 @@ int xhci_reset(struct xhci_hcd *xhci)
 	command |= CMD_RESET;
 	writel(command, &xhci->op_regs->command);
 
+	/* Existing Intel xHCI controllers require a delay of 1 mS,
+	 * after setting the CMD_RESET bit, and before accessing any
+	 * HC registers. This allows the HC to complete the
+	 * reset operation and be ready for HC register access.
+	 * Without this delay, the subsequent HC register access,
+	 * may result in a system hang very rarely.
+	 */
+	if (xhci->quirks & XHCI_INTEL_HOST)
+		udelay(1000);
+
 	ret = xhci_handshake(&xhci->op_regs->command,
 			CMD_RESET, 0, 10 * 1000 * 1000);
 	if (ret)
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