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gcc-5.2: import patch fixing compilation in thumb mode

PATCH In review Dmitry Eremin-Solenikov 2 participants 4 messages Nov 26, 2015 – Dec 1, 2015

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#0 lore raw

PATCH 1/2 gcc-5.2: import patch fixing compilation in thumb mode

Import patch fixing a bug that caused ICE when compiling some packages (e.g. ICU) in Thumb-1 model.

---
 meta/recipes-devtools/gcc/gcc-5.2.inc              |  1 +
 .../gcc/gcc-5.2/0043-fix-arm-thumb.patch           | 39 ++++++++++++++++++++++
 2 files changed, 40 insertions(+)
 create mode 100644 meta/recipes-devtools/gcc/gcc-5.2/0043-fix-arm-thumb.patch
meta/recipes-devtools/gcc/gcc-5.2.inc +1 -0
index a6b385a..e5e92e9 100644
@@ -74,6 +74,7 @@ SRC_URI = "\
            file://0040-nativesdk-gcc-support.patch \
            file://0041-handle-target-sysroot-multilib.patch \
            file://0042-cxxflags-for-build.patch \
+           file://0043-fix-arm-thumb.patch \
           "
 
 BACKPORTS = ""
meta/recipes-devtools/gcc/gcc-5.2/0043-fix-arm-thumb.patch new file +39 -0
new file mode 100644
index 0000000..2f262e3
@@ -0,0 +1,39 @@
+Upstream-Status: Accepted
+
+Signed-off-by: Dmitry Eremin-Solenikov <[email protected]>
+---
+
+2015-11-25  Vladimir Makarov  <[email protected]>
+
+	PR rtl-optimization/67954
+	* lra-constraints.c (curr_insn_transform): Add check on scratch
+	pseudo when change class to NO_REGS.  Add an assert.
+
+
+
+git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@230894 138bc75d-0d04-0410-961f-82ee72b054a4
+---
+
+diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c
+index 4670e81..c62bf6a 100644
+--- a/gcc/lra-constraints.c
++++ b/gcc/lra-constraints.c
+@@ -3725,7 +3725,8 @@ curr_insn_transform (bool check_only_p)
+ 		 assigment pass and the scratch pseudo will be
+ 		 spilled.  Spilled scratch pseudos are transformed
+ 		 back to scratches at the LRA end.  */
+-	      && lra_former_scratch_operand_p (curr_insn, i))
++	      && lra_former_scratch_operand_p (curr_insn, i)
++	      && lra_former_scratch_p (REGNO (op)))
+ 	    {
+ 	      int regno = REGNO (op);
+ 	      lra_change_class (regno, NO_REGS, "      Change to", true);
+@@ -3734,6 +3735,8 @@ curr_insn_transform (bool check_only_p)
+ 		   spilled pseudo as there is only one such insn, the
+ 		   current one.  */
+ 		reg_renumber[regno] = -1;
++	      lra_assert (bitmap_single_bit_set_p
++			  (&lra_reg_info[REGNO (op)].insn_bitmap));
+ 	    }
+ 	  /* We can do an optional reload.  If the pseudo got a hard
+ 	     reg, we might improve the code through inheritance.  If
Signature · 1 line
2.6.2
#1 lore raw

PATCH 2/2 gcc-4.9: import patch fixing compilation in thumb mode

Import patch fixing a bug that caused ICE when compiling some packages (e.g. ICU) in Thumb-1 model.

---
 meta/recipes-devtools/gcc/gcc-4.9.inc              |  1 +
 .../gcc/gcc-4.9/0067-fix-arm-thumb.patch           | 39 ++++++++++++++++++++++
 2 files changed, 40 insertions(+)
 create mode 100644 meta/recipes-devtools/gcc/gcc-4.9/0067-fix-arm-thumb.patch
meta/recipes-devtools/gcc/gcc-4.9.inc +1 -0
index 6ac3685..d62e801 100644
@@ -82,6 +82,7 @@ SRC_URI = "\
     file://0064-handle-target-sysroot-multilib.patch \
     file://0065-gcc-483-universal-initializer-no-warning.patch \
     file://0066-cxxflags-for-build.patch \
+    file://0067-fix-arm-thumb.patch \
 "
 SRC_URI[md5sum] = "6f831b4d251872736e8e9cc09746f327"
 SRC_URI[sha256sum] = "2332b2a5a321b57508b9031354a8503af6fdfb868b8c1748d33028d100a8b67e"
meta/recipes-devtools/gcc/gcc-4.9/0067-fix-arm-thumb.patch new file +39 -0
new file mode 100644
index 0000000..2f262e3
@@ -0,0 +1,39 @@
+Upstream-Status: Accepted
+
+Signed-off-by: Dmitry Eremin-Solenikov <[email protected]>
+---
+
+2015-11-25  Vladimir Makarov  <[email protected]>
+
+	PR rtl-optimization/67954
+	* lra-constraints.c (curr_insn_transform): Add check on scratch
+	pseudo when change class to NO_REGS.  Add an assert.
+
+
+
+git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@230894 138bc75d-0d04-0410-961f-82ee72b054a4
+---
+
+diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c
+index 4670e81..c62bf6a 100644
+--- a/gcc/lra-constraints.c
++++ b/gcc/lra-constraints.c
+@@ -3725,7 +3725,8 @@ curr_insn_transform (bool check_only_p)
+ 		 assigment pass and the scratch pseudo will be
+ 		 spilled.  Spilled scratch pseudos are transformed
+ 		 back to scratches at the LRA end.  */
+-	      && lra_former_scratch_operand_p (curr_insn, i))
++	      && lra_former_scratch_operand_p (curr_insn, i)
++	      && lra_former_scratch_p (REGNO (op)))
+ 	    {
+ 	      int regno = REGNO (op);
+ 	      lra_change_class (regno, NO_REGS, "      Change to", true);
+@@ -3734,6 +3735,8 @@ curr_insn_transform (bool check_only_p)
+ 		   spilled pseudo as there is only one such insn, the
+ 		   current one.  */
+ 		reg_renumber[regno] = -1;
++	      lra_assert (bitmap_single_bit_set_p
++			  (&lra_reg_info[REGNO (op)].insn_bitmap));
+ 	    }
+ 	  /* We can do an optional reload.  If the pseudo got a hard
+ 	     reg, we might improve the code through inheritance.  If
Signature · 1 line
2.6.2
#2 lore raw

Re: [PATCH 2/2] gcc-4.9: import patch fixing compilation in thumb mode

Quoted 3 lines · Dmitry Eremin-Solenikov

Import patch fixing a bug that caused ICE when compiling some packages (e.g. ICU) in Thumb-1 model.

This is ok

Quoted 72 lines
---
 meta/recipes-devtools/gcc/gcc-4.9.inc              |  1 +
 .../gcc/gcc-4.9/0067-fix-arm-thumb.patch           | 39 ++++++++++++++++++++++
 2 files changed, 40 insertions(+)
 create mode 100644 meta/recipes-devtools/gcc/gcc-4.9/0067-fix-arm-thumb.patch
meta/recipes-devtools/gcc/gcc-4.9.inc +1 -0
index 6ac3685..d62e801 100644
@@ -82,6 +82,7 @@ SRC_URI = "\
     file://0064-handle-target-sysroot-multilib.patch \
     file://0065-gcc-483-universal-initializer-no-warning.patch \
     file://0066-cxxflags-for-build.patch \
+    file://0067-fix-arm-thumb.patch \
 "
 SRC_URI[md5sum] = "6f831b4d251872736e8e9cc09746f327"
 SRC_URI[sha256sum] = "2332b2a5a321b57508b9031354a8503af6fdfb868b8c1748d33028d100a8b67e"
meta/recipes-devtools/gcc/gcc-4.9/0067-fix-arm-thumb.patch new file +39 -1
new file mode 100644
index 0000000..2f262e3
@@ -0,0 +1,39 @@
+Upstream-Status: Accepted
+
+Signed-off-by: Dmitry Eremin-Solenikov <[email protected]>
+---
+
+2015-11-25  Vladimir Makarov  <[email protected]>
+
+       PR rtl-optimization/67954
+       * lra-constraints.c (curr_insn_transform): Add check on scratch
+       pseudo when change class to NO_REGS.  Add an assert.
+
+
+
+git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@230894 138bc75d-0d04-0410-961f-82ee72b054a4
+---
+
+diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c
+index 4670e81..c62bf6a 100644
+--- a/gcc/lra-constraints.c
++++ b/gcc/lra-constraints.c
+@@ -3725,7 +3725,8 @@ curr_insn_transform (bool check_only_p)
+                assigment pass and the scratch pseudo will be
+                spilled.  Spilled scratch pseudos are transformed
+                back to scratches at the LRA end.  */
+-            && lra_former_scratch_operand_p (curr_insn, i))
++            && lra_former_scratch_operand_p (curr_insn, i)
++            && lra_former_scratch_p (REGNO (op)))
+           {
+             int regno = REGNO (op);
+             lra_change_class (regno, NO_REGS, "      Change to", true);
+@@ -3734,6 +3735,8 @@ curr_insn_transform (bool check_only_p)
+                  spilled pseudo as there is only one such insn, the
+                  current one.  */
+               reg_renumber[regno] = -1;
++            lra_assert (bitmap_single_bit_set_p
++                        (&lra_reg_info[REGNO (op)].insn_bitmap));
+           }
+         /* We can do an optional reload.  If the pseudo got a hard
+            reg, we might improve the code through inheritance.  If
--

2.6.2

--
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#3 lore raw
In reply to Dmitry Eremin-Solenikov
Quoted 2 lines · Dmitry Eremin-Solenikov

Import patch fixing a bug that caused ICE when compiling some packages (e.g. ICU) in Thumb-1 model.

This is ok

Quoted 73 lines
---
 meta/recipes-devtools/gcc/gcc-5.2.inc              |  1 +
 .../gcc/gcc-5.2/0043-fix-arm-thumb.patch           | 39 ++++++++++++++++++++++
 2 files changed, 40 insertions(+)
 create mode 100644 meta/recipes-devtools/gcc/gcc-5.2/0043-fix-arm-thumb.patch
meta/recipes-devtools/gcc/gcc-5.2.inc +1 -0
index a6b385a..e5e92e9 100644
@@ -74,6 +74,7 @@ SRC_URI = "\
            file://0040-nativesdk-gcc-support.patch \
            file://0041-handle-target-sysroot-multilib.patch \
            file://0042-cxxflags-for-build.patch \
+           file://0043-fix-arm-thumb.patch \
           "
 
 BACKPORTS = ""
meta/recipes-devtools/gcc/gcc-5.2/0043-fix-arm-thumb.patch new file +39 -1
new file mode 100644
index 0000000..2f262e3
@@ -0,0 +1,39 @@
+Upstream-Status: Accepted
+
+Signed-off-by: Dmitry Eremin-Solenikov <[email protected]>
+---
+
+2015-11-25  Vladimir Makarov  <[email protected]>
+
+       PR rtl-optimization/67954
+       * lra-constraints.c (curr_insn_transform): Add check on scratch
+       pseudo when change class to NO_REGS.  Add an assert.
+
+
+
+git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@230894 138bc75d-0d04-0410-961f-82ee72b054a4
+---
+
+diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c
+index 4670e81..c62bf6a 100644
+--- a/gcc/lra-constraints.c
++++ b/gcc/lra-constraints.c
+@@ -3725,7 +3725,8 @@ curr_insn_transform (bool check_only_p)
+                assigment pass and the scratch pseudo will be
+                spilled.  Spilled scratch pseudos are transformed
+                back to scratches at the LRA end.  */
+-            && lra_former_scratch_operand_p (curr_insn, i))
++            && lra_former_scratch_operand_p (curr_insn, i)
++            && lra_former_scratch_p (REGNO (op)))
+           {
+             int regno = REGNO (op);
+             lra_change_class (regno, NO_REGS, "      Change to", true);
+@@ -3734,6 +3735,8 @@ curr_insn_transform (bool check_only_p)
+                  spilled pseudo as there is only one such insn, the
+                  current one.  */
+               reg_renumber[regno] = -1;
++            lra_assert (bitmap_single_bit_set_p
++                        (&lra_reg_info[REGNO (op)].insn_bitmap));
+           }
+         /* We can do an optional reload.  If the pseudo got a hard
+            reg, we might improve the code through inheritance.  If
--

2.6.2

--
_______________________________________________
Openembedded-core mailing list
[email protected]
http://lists.openembedded.org/mailman/listinfo/openembedded-core