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Patch "MIPS: ath79: Fix the DDR control initialization on ar71xx and ar934x" has been added to the 4.2-stable tree

PATCH [email protected] 1 participant 1 message Dec 7, 2015

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This is a note to let you know that I've just added the patch titled

MIPS: ath79: Fix the DDR control initialization on ar71xx and ar934x

to the 4.2-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
mips-ath79-fix-the-ddr-control-initialization-on-ar71xx-and-ar934x.patch
and it can be found in the queue-4.2 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.

Quoted 1 line

From 5011a7e808c9fec643d752c5a495a48f27268a48 Mon Sep 17 00:00:00 2001

From: Alban Bedel <[email protected]>
Date: Tue, 17 Nov 2015 09:40:07 +0100
Subject: MIPS: ath79: Fix the DDR control initialization on ar71xx and ar934x

From: Alban Bedel <[email protected]>

commit 5011a7e808c9fec643d752c5a495a48f27268a48 upstream.

The DDR control initialization needs to know the SoC type, however ath79_detect_sys_type() was called after ath79_ddr_ctrl_init(). Reverse the order to fix the DDR control initialization on ar71xx and ar934x.

Patchwork: https://patchwork.linux-mips.org/patch/11500/

---
 arch/mips/ath79/setup.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/mips/ath79/setup.c +1 -1
@@ -216,9 +216,9 @@ void __init plat_mem_setup(void)
 					   AR71XX_RESET_SIZE);
 	ath79_pll_base = ioremap_nocache(AR71XX_PLL_BASE,
 					 AR71XX_PLL_SIZE);
+	ath79_detect_sys_type();
 	ath79_ddr_ctrl_init();
 
-	ath79_detect_sys_type();
 	if (mips_machtype != ATH79_MACH_GENERIC_OF)
 		detect_memory_region(0, ATH79_MEM_SIZE_MIN, ATH79_MEM_SIZE_MAX);
 

Patches currently in stable-queue which might be from [email protected] are

queue-4.2/mips-ath79-fix-the-ddr-control-initialization-on-ar71xx-and-ar934x.patch