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arm: socfpga: Fix emac1 doesn't work on socdk board

PATCH Superseded shengjiangwu 2 participants 2 messages Dec 18, 2015

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PATCH v2 1/1 arm: socfpga: Fix emac1 doesn't work on socdk board

Updated pinmux group MIXED1IO[0-13] for RGMII1. Updated EMAC1 clock.

Cc Chin Liang See <[email protected]>
Cc Dinh Nguyen <[email protected]>
Cc Dinh Nguyen <[email protected]>
Cc Pavel Machek <[email protected]>
Cc Marek Vasut <[email protected]>
Cc Stefan Roese <[email protected]>

---
Changes for v2:
- fixed wrong perpll for emac1

---
 board/altera/cyclone5-socdk/qts/pll_config.h |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
board/altera/cyclone5-socdk/qts/pll_config.h +1 -1
index eccc705..5b754ac 100644
@@ -65,7 +65,7 @@
 #define CONFIG_HPS_CLK_PERVCO_HZ 1000000000
 #define CONFIG_HPS_CLK_SDRVCO_HZ 666666666
 #define CONFIG_HPS_CLK_EMAC0_HZ 250000000
-#define CONFIG_HPS_CLK_EMAC1_HZ 50000000
+#define CONFIG_HPS_CLK_EMAC1_HZ 250000000
 #define CONFIG_HPS_CLK_USBCLK_HZ 200000000
 #define CONFIG_HPS_CLK_NAND_HZ 50000000
 #define CONFIG_HPS_CLK_SDMMC_HZ 200000000
Signature · 1 line
1.7.9.5
#1 lore raw

PATCH v2 1/1 arm: socfpga: Fix emac1 doesn't work on socdk board

Hi Shengjiang,

Quoted 23 lines · shengjiangwu

Updated pinmux group MIXED1IO[0-13] for RGMII1. Updated EMAC1 clock.

Cc Chin Liang See <[email protected]>
Cc Dinh Nguyen <[email protected]>
Cc Dinh Nguyen <[email protected]>
Cc Pavel Machek <[email protected]>
Cc Marek Vasut <[email protected]>
Cc Stefan Roese <[email protected]>

---
Changes for v2:
- fixed wrong perpll for emac1

---
 board/altera/cyclone5-socdk/qts/pll_config.h |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
board/altera/cyclone5-socdk/qts/pll_config.h +0 -0
index eccc705..5b754ac 100644

board/altera/cyclone5-socdk/qts/pll_config.h line 68

Quoted 5 lines
board/altera/cyclone5-socdk/qts/pll_config.h +1 -1
@@ -65,7 +65,7 @@
 #define CONFIG_HPS_CLK_PERVCO_HZ 1000000000
 #define CONFIG_HPS_CLK_SDRVCO_HZ 666666666
 #define CONFIG_HPS_CLK_EMAC0_HZ 250000000
-#define CONFIG_HPS_CLK_EMAC1_HZ 50000000
+#define CONFIG_HPS_CLK_EMAC1_HZ 250000000

This is good. But I believe you miss the pinmux change here. You just need to take the previous patch and made the change.

Thanks
Chin Liang

Quoted 3 lines
board/altera/cyclone5-socdk/qts/pll_config.h +0 -0
 #define CONFIG_HPS_CLK_USBCLK_HZ 200000000
 #define CONFIG_HPS_CLK_NAND_HZ 50000000
 #define CONFIG_HPS_CLK_SDMMC_HZ 200000000