arm: socfpga: Enable ubi and ubifs support
PATCH v3 1/17 arm: socfpga: Enable ubi and ubifs support
When QSPI and NAND is enabled, the ubi and ubifs support will be enabled too.
---
Changes for v2
- move CONFIG_SPI_FLASH_USE_4K_SECTORS to Kconfig
--- include/configs/socfpga_common.h | 8 ++++++++ 1 file changed, 8 insertions(+)
include/configs/socfpga_common.h +8 -0
@@ -300,6 +300,14 @@ unsigned int cm_get_qspi_controller_clk_hz(void); "- at 1536k(UBI)\0"#endif +/* UBI and UBIFS support */ +#if defined(CONFIG_CMD_SF ) || defined(CONFIG_CMD_NAND ) +#define CONFIG_CMD_UBI +#define CONFIG_CMD_UBIFS +#define CONFIG_RBTREE +#define CONFIG_LZO +#endif +/* * SPL *
Signature · 1 line
1.9.2.468.g3f0c02a
PATCH v3 2/17 arm: socfpga: cyclone5: Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS
Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS for UBI and UBIFS support on serial NOR flash
--- configs/socfpga_cyclone5_defconfig | 1 + 1 file changed, 1 insertion(+)
configs/socfpga_cyclone5_defconfig +1 -0
@@ -23,3 +23,4 @@ CONFIG_DESIGNWARE_SPI=y CONFIG_DM_MMC=y CONFIG_USB=y CONFIG_DM_USB=y +CONFIG_SPI_FLASH_USE_4K_SECTORS=n
Signature · 1 line
1.9.2.468.g3f0c02a
PATCH v3 3/17 arm: socfpga: arria5: Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS
In reply to Chin Liang SeeUndefine CONFIG_SPI_FLASH_USE_4K_SECTORS for UBI and UBIFS support on serial NOR flash
--- configs/socfpga_arria5_defconfig | 1 + 1 file changed, 1 insertion(+)
configs/socfpga_arria5_defconfig +1 -0
@@ -23,3 +23,4 @@ CONFIG_DESIGNWARE_SPI=y CONFIG_DM_MMC=y CONFIG_USB=y CONFIG_DM_USB=y +CONFIG_SPI_FLASH_USE_4K_SECTORS=n
Signature · 1 line
1.9.2.468.g3f0c02a
PATCH v3 4/17 arm: socfpga: sockit: Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS
In reply to Chin Liang SeeUndefine CONFIG_SPI_FLASH_USE_4K_SECTORS for UBI and UBIFS support on serial NOR flash
--- configs/socfpga_sockit_defconfig | 1 + 1 file changed, 1 insertion(+)
configs/socfpga_sockit_defconfig +1 -0
@@ -25,3 +25,4 @@ CONFIG_DESIGNWARE_SPI=y CONFIG_DM_MMC=y CONFIG_USB=y CONFIG_DM_USB=y +CONFIG_SPI_FLASH_USE_4K_SECTORS=n
Signature · 1 line
1.9.2.468.g3f0c02a
PATCH v3 4/17 arm: socfpga: sockit: Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS
Quoted 18 lines · Chin Liang See
Undefine
CONFIG_SPI_FLASH_USE_4K_SECTORSfor UBI and UBIFS support on serial NOR flashSigned-off-by Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Pavel Machek <[email protected]>Cc Marek Vasut <[email protected]>Cc Stefan Roese <[email protected]>--- configs/socfpga_sockit_defconfig | 1 + 1 file changed, 1 insertion(+)(quoted diff) +0
-0b/configs/socfpga_sockit_defconfig index b4f41a9..dc32fe8 100644
configs/socfpga_sockit_defconfig CONFIG_DESIGNWARE_SPI=y · line 28
Quoted 4 lines
configs/socfpga_sockit_defconfig +1
-0@@ -25,3 +25,4 @@ CONFIG_DESIGNWARE_SPI=y CONFIG_DM_MMC=y CONFIG_USB=y CONFIG_DM_USB=y +CONFIG_SPI_FLASH_USE_4K_SECTORS=n
Chin, would it be difficult to build your patchset before you submit it? This one builds with an obvious warning :'-(
There's buildman for doing such bulk builds, let me know if you need help setting it up.
I will drop this patch and fix the remaining three during application, since I want to get this set out of the door, but please do some better testing next time.
Best regards,
Marek Vasut
PATCH v3 4/17 arm: socfpga: sockit: Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS
Quoted 14 lines · Marek Vasut
Quoted 13 lines · Chin Liang See
Undefine
CONFIG_SPI_FLASH_USE_4K_SECTORSfor UBI and UBIFS support on serial NOR flashSigned-off-by Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Pavel Machek <[email protected]>Cc Marek Vasut <[email protected]>Cc Stefan Roese <[email protected]>--- configs/socfpga_sockit_defconfig | 1 + 1 file changed, 1 insertion(+)
Quoted 14 lines
configs/socfpga_sockit_defconfig CONFIG_DESIGNWARE_SPI=y · line 28
Quoted 9 lines
(quoted diff) +0
-0b/configs/socfpga_sockit_defconfig index b4f41a9..dc32fe8 100644
configs/socfpga_sockit_defconfig +1
-0@@ -25,3 +25,4 @@ CONFIG_DESIGNWARE_SPI=y CONFIG_DM_MMC=y CONFIG_USB=y CONFIG_DM_USB=y +CONFIG_SPI_FLASH_USE_4K_SECTORS=nChin, would it be difficult to build your patchset before you submit it?
This one builds with an obvious warning :'-(
That really strange as I built cyclone5, arria5, sockit, sr1500 and even mcvevk in case it break (as mcvevk dun have qspi). Wonder what is the build error you got?
FYI, here is my build info which indicate success build bash-3.2$ export CROSS_COMPILE=arm-altera-eabi-; make mrproper; make socfpga_sockit_defconfig; make
[..]
CFG spl/u-boot-spl.cfg
FDTGREP spl/u-boot-spl.dtb
CAT spl/u-boot-spl-dtb.bin
MKIMAGE spl/u-boot-spl-dtb.sfp
make[1]: warning: Clock skew detected. Your build may be incomplete.
MKIMAGE u-boot.img
COPY u-boot.dtb
CAT u-boot-dtb.bin
MKIMAGE u-boot-dtb.img
bash-3.2$
bash-3.2$ git log -20 --pretty=oneline 32d38cdf1211544f26cbcf81bdf90c2358fee9e6 arm: socfpga: sr1500: Update qspiboot to use UBIFS aa66a23109f2c1f0038dbd495fdbfc7e768935d6 arm: socfpga: sockit: Update qspiboot to use UBIFS 8d1d779e348f5b81614e4b4b58966bc828b769c3 arm: socfpga: arria5_socdk:
Update qspiboot to use UBIFS 72bd3790884fd95d496ef39106fd6dbcbefbc364 arm: socfpga: cyclone5_socdk:
Update qspiboot to use UBIFS 0695327d3895a8ea018b69002c57a0cbdd92c801 arm: socfpga: sr1500: Enable qspiload console command 3b8137edb764042c2c66f74f8778fd4ca615ee75 arm: socfpga: sockit: Enable qspiload console command d855cecf6441f1c0f8cb54fb824e5192f857cdc2 arm: socfpga: arria5_socdk:
Enable qspiload console command d32087cc5cdb44b7279d8d4cc2318fcf82b0390e arm: socfpga: cyclone5_socdk:
Enable qspiload console command b576fdeb24d045a5efc9eefa745dfeae20ef7663 arm: socfpga: sr1500: Enable ubiload console command f693537d6fa42f19f537557b0e6f2cea00449958 arm: socfpga: sockit: Enable ubiload console command 3acc42460689bf92a06d85c9cfa6901ffdf6bc15 arm: socfpga: arria5_socdk:
Enable ubiload console command b275951fa08e3321767a12ba2c79b841e05e27c9 arm: socfpga: cyclone5_socdk:
Enable ubiload console command 0e9ba6d2aa50555a5d358de4aa129e6899f60bbc arm: socfpga: sr1500: Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS 577d38e36d694e15d9363e6f351aae7b1de59854 arm: socfpga: sockit: Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS fea05b3eae5928b0df20e6ae1a3252dbae9215ab arm: socfpga: arria5: Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS bc882c4539925c1cb8294638d2d2e7e28e91941e arm: socfpga: cyclone5:
Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS 9b15c22ac90ffa12bc1d015d7aef703e07c67fc4 arm: socfpga: Enable ubi and ubifs support55639073aaf33306df7fe24d4cef22d8eb53e2d8 arm: socfpga: Enabling MTD default partitions58398c6bc59ee23a05c83bbff168fa6a7b337e14 arm: socfpga: socrates:
Consolidate SDMMC environment 780fa75bf6aa79cf78a76d17a03c91d8a5928f5e arm: socfpga: sockit:
Consolidate SDMMC environment
bash-3.2$
bash-3.2$ arm-altera-eabi-gcc --version
arm-altera-eabi-gcc (Sourcery CodeBench Lite 2015.11-45) 5.2.0 Copyright (C) 2015 Free Software Foundation, Inc.
This is free software; see the source for copying conditions. There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
Quoted 4 lines
There's buildman for doing such bulk builds, let me know if you need help
setting it up.
That's sound good to me instead i invoke it manually every time. Let me take a look. A quick link would be much appreciated.
Quoted 5 lines
I will drop this patch and fix the remaining three during application, since
I want to get this set out of the door, but please do some better testing
next time.
Do share you build error so I can simulate the build error.
Thanks
Chin Liang
Quoted 3 lines
Best regards,
Marek Vasut
PATCH v3 4/17 arm: socfpga: sockit: Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS
Quoted 32 lines · Chin Liang See
Quoted 25 lines · Marek Vasut
Quoted 24 lines · Chin Liang See
Undefine
CONFIG_SPI_FLASH_USE_4K_SECTORSfor UBI and UBIFS support on serial NOR flashSigned-off-by Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Pavel Machek <[email protected]>Cc Marek Vasut <[email protected]>Cc Stefan Roese <[email protected]>---
configs/socfpga_sockit_defconfig | 1 + 1 file changed, 1 insertion(+)(quoted diff) +0
-0b/configs/socfpga_sockit_defconfig index b4f41a9..dc32fe8 100644
configs/socfpga_sockit_defconfig +0
-0@@ -25,3 +25,4 @@ CONFIG_DESIGNWARE_SPI=y CONFIG_DM_MMC=y CONFIG_USB=y CONFIG_DM_USB=yQuoted 5 lines
Quoted 1 line
+CONFIG_SPI_FLASH_USE_4K_SECTORS=n
Chin, would it be difficult to build your patchset before you submit it?
This one builds with an obvious warning :'-(
Quoted 7 lines
That really strange as I built cyclone5, arria5, sockit, sr1500 and even mcvevk in case it break (as mcvevk dun have qspi). Wonder what is the build error you got?
FYI, here is my build info which indicate success build bash-3.2$ export CROSS_COMPILE=arm-altera-eabi-; make mrproper; make
socfpga_sockit_defconfig; make
I fixed it in u-boot-socfpga/master, so it will compile fine, but you should see a warning with the original patch, see at the end of this mail.
Quoted 6 lines
[..]
CFG spl/u-boot-spl.cfg
FDTGREP spl/u-boot-spl.dtb
CAT spl/u-boot-spl-dtb.bin
MKIMAGE spl/u-boot-spl-dtb.sfp
make[1]: warning: Clock skew detected. Your build may be incomplete.
This is a bit weird, isn't it ;-)
Quoted 4 lines
MKIMAGE u-boot.img
COPY u-boot.dtb
CAT u-boot-dtb.bin
MKIMAGE u-boot-dtb.img
[...]
Quoted 6 lines
Quoted 3 lines
There's buildman for doing such bulk builds, let me know if you need help
setting it up.That's sound good to me instead i invoke it manually every time. Let me take a look. A quick link would be much appreciated.
Thomas did a good concise writeup on setting up buildman:
http://www.mail-archive.com/u-boot at lists.denx.de/msg191914.html
Quoted 7 lines
Quoted 5 lines
I will drop this patch and fix the remaining three during application, since
I want to get this set out of the door, but please do some better testing
next time.Do share you build error so I can simulate the build error.
CONFIG_SPI_FLASH_USE_4K_SECTORS was used twice in the config file sockit config file (configs/socfpga_sockit) .
PATCH v3 4/17 arm: socfpga: sockit: Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS
Quoted 4 lines · Marek Vasut
Quoted 3 lines · Chin Liang See
Quoted 2 lines · Marek Vasut
On Tuesday, December 22, 2015 at 08:32:29 AM, Chin Liang See wrote:
[..]
Quoted 9 lines
Quoted 7 lines
Quoted 1 line
Quoted 1 line
CFG spl/u-boot-spl.cfg
FDTGREP spl/u-boot-spl.dtb
CAT spl/u-boot-spl-dtb.bin
MKIMAGE spl/u-boot-spl-dtb.sfp
make[1]: warning: Clock skew detected. Your build may be incomplete.This is a bit weird, isn't it ;-)
Yah, this is something need be hammered
Quoted 13 lines
Quoted 5 lines
MKIMAGE u-boot.img
COPY u-boot.dtb
CAT u-boot-dtb.bin
MKIMAGE u-boot-dtb.img[...]
Quoted 5 lines
Quoted 4 lines
There's buildman for doing such bulk builds, let me know if you need
help
setting it up.
Quoted 7 lines
Quoted 3 lines
That's sound good to me instead i invoke it manually every time. Let me
take a look. A quick link would be much appreciated.Thomas did a good concise writeup on setting up buildman:
http://www.mail-archive.com/u-boot at lists.denx.de/msg191914.html
Yah, I saw the conversation. Cool, let me set it up.
Quoted 7 lines
Quoted 7 lines
Quoted 6 lines
I will drop this patch and fix the remaining three during application, since
I want to get this set out of the door, but please do some better testing
next time.
Quoted 5 lines
Quoted 1 line
Do share you build error so I can simulate the build error.
CONFIG_SPI_FLASH_USE_4K_SECTORSwas used twice in the config file sockit
config file (configs/socfpga_sockit) .
Oh I believe its commented out.
bash-3.2$ git grep --color CONFIG_SPI_FLASH_USE_4K_SECTORS configs/socfpga_arria5_defconfig:CONFIG_SPI_FLASH_USE_4K_SECTORS=n configs/socfpga_cyclone5_defconfig:CONFIG_SPI_FLASH_USE_4K_SECTORS=n configs/socfpga_sockit_defconfig:# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set configs/socfpga_sockit_defconfig:CONFIG_SPI_FLASH_USE_4K_SECTORS=n configs/socfpga_sr1500_defconfig:CONFIG_SPI_FLASH_USE_4K_SECTORS=n drivers/mtd/spi/sf_internal.h:#ifdef CONFIG_SPI_FLASH_USE_4K_SECTORS
Thanks
Chin Liang
PATCH v3 4/17 arm: socfpga: sockit: Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS
Quoted 54 lines · Chin Liang See
Quoted 5 lines · Marek Vasut
Quoted 4 lines · Chin Liang See
Quoted 3 lines · Marek Vasut
On Tuesday, December 22, 2015 at 08:32:29 AM, Chin Liang See
wrote:
[..]
Quoted 9 lines
Quoted 7 lines
CFG spl/u-boot-spl.cfg
FDTGREP spl/u-boot-spl.dtb
CAT spl/u-boot-spl-dtb.bin
MKIMAGE spl/u-boot-spl-dtb.sfpmake[1]: warning: Clock skew detected. Your build may be incomplete.
This is a bit weird, isn't it ;-)
Yah, this is something need be hammered
Quoted 12 lines
Quoted 4 lines
MKIMAGE u-boot.img
COPY u-boot.dtb
CAT u-boot-dtb.bin
MKIMAGE u-boot-dtb.img[...]
Quoted 5 lines
Quoted 4 lines
There's buildman for doing such bulk builds, let me know if you need
help
setting it up.Quoted 7 lines
Quoted 3 lines
That's sound good to me instead i invoke it manually every time. Let me
take a look. A quick link would be much appreciated.Thomas did a good concise writeup on setting up buildman:
http://www.mail-archive.com/u-boot at lists.denx.de/msg191914.html
Yah, I saw the conversation. Cool, let me set it up.
Quoted 11 lines
Quoted 7 lines
Quoted 5 lines
I will drop this patch and fix the remaining three during application, since
I want to get this set out of the door, but please do some better testing
next time.Do share you build error so I can simulate the build error.
CONFIG_SPI_FLASH_USE_4K_SECTORSwas used twice in the config file sockit
config file (configs/socfpga_sockit) .
Quoted 8 lines
Oh I believe its commented out.
bash-3.2$ git grep --color
CONFIG_SPI_FLASH_USE_4K_SECTORSconfigs/socfpga_arria5_defconfig:CONFIG_SPI_FLASH_USE_4K_SECTORS=n configs/socfpga_cyclone5_defconfig:CONFIG_SPI_FLASH_USE_4K_SECTORS=n configs/socfpga_sockit_defconfig:#CONFIG_SPI_FLASH_USE_4K_SECTORSis not set configs/socfpga_sockit_defconfig:CONFIG_SPI_FLASH_USE_4K_SECTORS=n
But it's twice in there. Also, =n is not valid construct, to disable config option you should comment it out the way it's done above.
Quoted 5 lines
configs/socfpga_sr1500_defconfig:CONFIG_SPI_FLASH_USE_4K_SECTORS=n drivers/mtd/spi/sf_internal.h:#ifdef
CONFIG_SPI_FLASH_USE_4K_SECTORSThanks
Chin Liang
Best regards,
Marek Vasut
PATCH v3 4/17 arm: socfpga: sockit: Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS
Quoted 9 lines · Marek Vasut
Quoted 8 lines · Chin Liang See
Quoted 6 lines · Marek Vasut
Quoted 4 lines · Chin Liang See
Quoted 3 lines · Marek Vasut
On Tuesday, December 22, 2015 at 08:32:29 AM, Chin Liang See
wrote:
[..]
Quoted 25 lines
Quoted 16 lines
Quoted 8 lines
Quoted 8 lines
Quoted 7 lines
I will drop this patch and fix the remaining three during application, since
I want to get this set out of the door, but please do some better
testing
next time.Quoted 5 lines
Quoted 1 line
Do share you build error so I can simulate the build error.
CONFIG_SPI_FLASH_USE_4K_SECTORSwas used twice in the config file sockit
config file (configs/socfpga_sockit) .Oh I believe its commented out.
Quoted 8 lines
bash-3.2$ git grep --color
CONFIG_SPI_FLASH_USE_4K_SECTORSconfigs/socfpga_arria5_defconfig:CONFIG_SPI_FLASH_USE_4K_SECTORS=n configs/socfpga_cyclone5_defconfig:CONFIG_SPI_FLASH_USE_4K_SECTORS= n
configs/socfpga_sockit_defconfig:#CONFIG_SPI_FLASH_USE_4K_SECTORSis
not set configs/socfpga_sockit_defconfig:CONFIG_SPI_FLASH_USE_4K_SECTORS=n
Quoted 2 lines
But it's twice in there. Also, =n is not valid construct, to disable config option you should comment it out the way it's done above.
Oh unaware the =n is invalid.
Thanks for the fix.
Chin Liang
Quoted 10 lines
Quoted 7 lines
configs/socfpga_sr1500_defconfig:CONFIG_SPI_FLASH_USE_4K_SECTORS=n drivers/mtd/spi/sf_internal.h:#ifdef
CONFIG_SPI_FLASH_USE_4K_SECTORSThanks
Chin LiangBest regards,
Marek Vasut
PATCH v3 4/17 arm: socfpga: sockit: Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS
Quoted 36 lines · Chin Liang See
Quoted 9 lines · Marek Vasut
Quoted 8 lines · Chin Liang See
Quoted 7 lines · Marek Vasut
On Wednesday, December 23, 2015 at 01:21:31 AM, Chin Liang See
Quoted 4 lines · wrote:
Quoted 3 lines · Marek Vasut
On Tuesday, December 22, 2015 at 08:32:29 AM, Chin Liang See
wrote:
[..]
Quoted 24 lines
Quoted 23 lines
Quoted 7 lines
Quoted 7 lines
Quoted 6 lines
I will drop this patch and fix the remaining three during application, since
I want to get this set out of the door, but please do some better
testing
next time.Quoted 5 lines
Quoted 1 line
Do share you build error so I can simulate the build error.
CONFIG_SPI_FLASH_USE_4K_SECTORSwas used twice in the config file sockit
config file (configs/socfpga_sockit) .Oh I believe its commented out.
bash-3.2$ git grep --color
CONFIG_SPI_FLASH_USE_4K_SECTORSconfigs/socfpga_arria5_defconfig:CONFIG_SPI_FLASH_USE_4K_SECTORS=n configs/socfpga_cyclone5_defconfig:CONFIG_SPI_FLASH_USE_4K_SECTORS= n
configs/socfpga_sockit_defconfig:#CONFIG_SPI_FLASH_USE_4K_SECTORSis
not set configs/socfpga_sockit_defconfig:CONFIG_SPI_FLASH_USE_4K_SECTORS=n
Quoted 5 lines
Quoted 2 lines
But it's twice in there. Also, =n is not valid construct, to disable config option you should comment it out the way it's done above.
Oh unaware the =n is invalid.
Thanks for the fix.
NP
Best regards,
Marek Vasut
PATCH v3 5/17 arm: socfpga: sr1500: Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS
In reply to Chin Liang SeeUndefine CONFIG_SPI_FLASH_USE_4K_SECTORS for UBI and UBIFS support on serial NOR flash
--- configs/socfpga_sr1500_defconfig | 1 + 1 file changed, 1 insertion(+)
configs/socfpga_sr1500_defconfig +1 -0
@@ -17,3 +17,4 @@ CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_SYS_NS16550=y CONFIG_DM_MMC=y +CONFIG_SPI_FLASH_USE_4K_SECTORS=n
Signature · 1 line
1.9.2.468.g3f0c02a
PATCH v3 6/17 arm: socfpga: cyclone5_socdk: Enable ubiload console command
In reply to Chin Liang SeeEnabling ubiload command to load kernel image and device tree from mtd part labeled "UBI". ubiload command will search the file from directory /boot.
--- include/configs/socfpga_cyclone5_socdk.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)
include/configs/socfpga_cyclone5_socdk.h +4 -1
@@ -74,7 +74,10 @@"qspirootfstype=jffs2\0" \"qspiboot=setenv bootargs " CONFIG_BOOTARGS \" root=${qspiroot} rw rootfstype=${qspirootfstype};" \ -"bootm ${loadaddr} - ${fdt_addr}\0" +"bootm ${loadaddr} - ${fdt_addr}\0" \ +"ubiload=ubi part UBI && ubifsmount ubi0 && " \ +"ubifsload ${loadaddr} /boot/${bootimage} && " \ +"ubifsload ${fdt_addr} /boot/${fdtimage}\0" /* The rest of the configuration is shared */#include <configs/socfpga_common.h>
Signature · 1 line
1.9.2.468.g3f0c02a
PATCH v3 7/17 arm: socfpga: arria5_socdk: Enable ubiload console command
In reply to Chin Liang SeeEnabling ubiload command to load kernel image and device tree from mtd part labeled "UBI". ubiload command will search the file from directory /boot.
--- include/configs/socfpga_arria5_socdk.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)
include/configs/socfpga_arria5_socdk.h +4 -1
@@ -74,7 +74,10 @@"qspirootfstype=jffs2\0" \"qspiboot=setenv bootargs " CONFIG_BOOTARGS \" root=${qspiroot} rw rootfstype=${qspirootfstype};" \ -"bootm ${loadaddr} - ${fdt_addr}\0" +"bootm ${loadaddr} - ${fdt_addr}\0" \ +"ubiload=ubi part UBI && ubifsmount ubi0 && " \ +"ubifsload ${loadaddr} /boot/${bootimage} && " \ +"ubifsload ${fdt_addr} /boot/${fdtimage}\0" /* The rest of the configuration is shared */#include <configs/socfpga_common.h>
Signature · 1 line
1.9.2.468.g3f0c02a
PATCH v3 8/17 arm: socfpga: sockit: Enable ubiload console command
In reply to Chin Liang SeeEnabling ubiload command to load kernel image and device tree from mtd part labeled "UBI". ubiload command will search the file from directory /boot.
--- include/configs/socfpga_sockit.h | 3 +++ 1 file changed, 3 insertions(+)
include/configs/socfpga_sockit.h +3 -0
@@ -66,6 +66,9 @@"mmcload=mmc rescan;" \"load mmc 0:1 ${loadaddr} ${bootimage};" \"load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \ +"ubiload=ubi part UBI && ubifsmount ubi0 && " \ +"ubifsload ${loadaddr} /boot/${bootimage} && " \ +"ubifsload ${fdt_addr} /boot/${fdtimage}\0" /* The rest of the configuration is shared */#include <configs/socfpga_common.h>
Signature · 1 line
1.9.2.468.g3f0c02a
PATCH v3 9/17 arm: socfpga: sr1500: Enable ubiload console command
In reply to Chin Liang SeeEnabling ubiload command to load kernel image and device tree from mtd part labeled "UBI". ubiload command will search the file from directory /boot.
--- include/configs/socfpga_sr1500.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)
include/configs/socfpga_sr1500.h +4 -1
@@ -74,7 +74,10 @@"qspirootfstype=jffs2\0" \"qspiboot=setenv bootargs " CONFIG_BOOTARGS \" root=${qspiroot} rw rootfstype=${qspirootfstype};" \ -"bootm ${loadaddr} - ${fdt_addr}\0" +"bootm ${loadaddr} - ${fdt_addr}\0" \ +"ubiload=ubi part UBI && ubifsmount ubi0 && " \ +"ubifsload ${loadaddr} /boot/${bootimage} && " \ +"ubifsload ${fdt_addr} /boot/${fdtimage}\0" /* Environment */ #define CONFIG_ENV_IS_IN_SPI_FLASH
Signature · 1 line
1.9.2.468.g3f0c02a
PATCH v3 10/17 arm: socfpga: cyclone5_socdk: Enable qspiload console command
In reply to Chin Liang SeeEnabling qspiload command which will load the kernel image and dtb from UBIFS within MTD partition labeled UBI.
--- include/configs/socfpga_cyclone5_socdk.h | 1 + 1 file changed, 1 insertion(+)
include/configs/socfpga_cyclone5_socdk.h +1 -0
@@ -70,6 +70,7 @@"mmcload=mmc rescan;" \"load mmc 0:1 ${loadaddr} ${bootimage};" \"load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \ +"qspiload=sf probe && mtdparts default && run ubiload\0" \"qspiroot=/dev/mtdblock0\0" \"qspirootfstype=jffs2\0" \"qspiboot=setenv bootargs " CONFIG_BOOTARGS \
Signature · 1 line
1.9.2.468.g3f0c02a
PATCH v3 11/17 arm: socfpga: arria5_socdk: Enable qspiload console command
In reply to Chin Liang SeeEnabling qspiload command which will load the kernel image and dtb from UBIFS within MTD partition labeled UBI.
--- include/configs/socfpga_arria5_socdk.h | 1 + 1 file changed, 1 insertion(+)
include/configs/socfpga_arria5_socdk.h +1 -0
@@ -70,6 +70,7 @@"mmcload=mmc rescan;" \"load mmc 0:1 ${loadaddr} ${bootimage};" \"load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \ +"qspiload=sf probe && mtdparts default && run ubiload\0" \"qspiroot=/dev/mtdblock0\0" \"qspirootfstype=jffs2\0" \"qspiboot=setenv bootargs " CONFIG_BOOTARGS \
Signature · 1 line
1.9.2.468.g3f0c02a
PATCH v3 12/17 arm: socfpga: sockit: Enable qspiload console command
In reply to Chin Liang SeeEnabling qspiload command which will load the kernel image and dtb from UBIFS within MTD partition labeled UBI.
--- include/configs/socfpga_sockit.h | 1 + 1 file changed, 1 insertion(+)
include/configs/socfpga_sockit.h +1 -0
@@ -66,6 +66,7 @@"mmcload=mmc rescan;" \"load mmc 0:1 ${loadaddr} ${bootimage};" \"load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \ +"qspiload=sf probe && mtdparts default && run ubiload\0" \"ubiload=ubi part UBI && ubifsmount ubi0 && " \"ubifsload ${loadaddr} /boot/${bootimage} && " \"ubifsload ${fdt_addr} /boot/${fdtimage}\0"
Signature · 1 line
1.9.2.468.g3f0c02a
PATCH v3 13/17 arm: socfpga: sr1500: Enable qspiload console command
In reply to Chin Liang SeeEnabling qspiload command which will load the kernel image and dtb from UBIFS within MTD partition labeled UBI.
--- include/configs/socfpga_sr1500.h | 1 + 1 file changed, 1 insertion(+)
include/configs/socfpga_sr1500.h +1 -0
@@ -70,6 +70,7 @@"mmcload=mmc rescan;" \"load mmc 0:1 ${loadaddr} ${bootimage};" \"load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \ +"qspiload=sf probe && mtdparts default && run ubiload\0" \"qspiroot=/dev/mtdblock0\0" \"qspirootfstype=jffs2\0" \"qspiboot=setenv bootargs " CONFIG_BOOTARGS \
Signature · 1 line
1.9.2.468.g3f0c02a
PATCH v3 14/17 arm: socfpga: cyclone5_socdk: Update qspiboot to use UBIFS
In reply to Chin Liang SeeUpdate the qspiboot console command to use UBIFS instead of old jffs2 file system.
--- include/configs/socfpga_cyclone5_socdk.h | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-)
include/configs/socfpga_cyclone5_socdk.h +2 -4
@@ -71,11 +71,9 @@"load mmc 0:1 ${loadaddr} ${bootimage};" \"load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \"qspiload=sf probe && mtdparts default && run ubiload\0" \ -"qspiroot=/dev/mtdblock0\0" \ -"qspirootfstype=jffs2\0" \"qspiboot=setenv bootargs " CONFIG_BOOTARGS \ -" root=${qspiroot} rw rootfstype=${qspirootfstype};" \ -"bootm ${loadaddr} - ${fdt_addr}\0" \ +" ubi.mtd=1,64 root=ubi0:rootfs rw rootfstype=ubifs;" \ +"bootz ${loadaddr} - ${fdt_addr}\0" \"ubiload=ubi part UBI && ubifsmount ubi0 && " \"ubifsload ${loadaddr} /boot/${bootimage} && " \"ubifsload ${fdt_addr} /boot/${fdtimage}\0"
Signature · 1 line
1.9.2.468.g3f0c02a
PATCH v3 15/17 arm: socfpga: arria5_socdk: Update qspiboot to use UBIFS
In reply to Chin Liang SeeUpdate the qspiboot console command to use UBIFS instead of old jffs2 file system.
--- include/configs/socfpga_arria5_socdk.h | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-)
include/configs/socfpga_arria5_socdk.h +2 -4
@@ -71,11 +71,9 @@"load mmc 0:1 ${loadaddr} ${bootimage};" \"load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \"qspiload=sf probe && mtdparts default && run ubiload\0" \ -"qspiroot=/dev/mtdblock0\0" \ -"qspirootfstype=jffs2\0" \"qspiboot=setenv bootargs " CONFIG_BOOTARGS \ -" root=${qspiroot} rw rootfstype=${qspirootfstype};" \ -"bootm ${loadaddr} - ${fdt_addr}\0" \ +" ubi.mtd=1,64 root=ubi0:rootfs rw rootfstype=ubifs;" \ +"bootz ${loadaddr} - ${fdt_addr}\0" \"ubiload=ubi part UBI && ubifsmount ubi0 && " \"ubifsload ${loadaddr} /boot/${bootimage} && " \"ubifsload ${fdt_addr} /boot/${fdtimage}\0"
Signature · 1 line
1.9.2.468.g3f0c02a
PATCH v3 16/17 arm: socfpga: sockit: Update qspiboot to use UBIFS
In reply to Chin Liang SeeUpdate the qspiboot console command to use UBIFS instead of old jffs2 file system.
--- include/configs/socfpga_sockit.h | 3 +++ 1 file changed, 3 insertions(+)
include/configs/socfpga_sockit.h +3 -0
@@ -67,6 +67,9 @@"load mmc 0:1 ${loadaddr} ${bootimage};" \"load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \"qspiload=sf probe && mtdparts default && run ubiload\0" \ +"qspiboot=setenv bootargs " CONFIG_BOOTARGS \ +" ubi.mtd=1,64 root=ubi0:rootfs rw rootfstype=ubifs;" \ +"bootz ${loadaddr} - ${fdt_addr}\0" \"ubiload=ubi part UBI && ubifsmount ubi0 && " \"ubifsload ${loadaddr} /boot/${bootimage} && " \"ubifsload ${fdt_addr} /boot/${fdtimage}\0"
Signature · 1 line
1.9.2.468.g3f0c02a
PATCH v3 17/17 arm: socfpga: sr1500: Update qspiboot to use UBIFS
In reply to Chin Liang SeeUpdate the qspiboot console command to use UBIFS instead of old jffs2 file system.
--- include/configs/socfpga_sr1500.h | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-)
include/configs/socfpga_sr1500.h +2 -4
@@ -71,11 +71,9 @@"load mmc 0:1 ${loadaddr} ${bootimage};" \"load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \"qspiload=sf probe && mtdparts default && run ubiload\0" \ -"qspiroot=/dev/mtdblock0\0" \ -"qspirootfstype=jffs2\0" \"qspiboot=setenv bootargs " CONFIG_BOOTARGS \ -" root=${qspiroot} rw rootfstype=${qspirootfstype};" \ -"bootm ${loadaddr} - ${fdt_addr}\0" \ +" ubi.mtd=1,64 root=ubi0:rootfs rw rootfstype=ubifs;" \ +"bootz ${loadaddr} - ${fdt_addr}\0" \"ubiload=ubi part UBI && ubifsmount ubi0 && " \"ubifsload ${loadaddr} /boot/${bootimage} && " \"ubifsload ${fdt_addr} /boot/${fdtimage}\0"
Signature · 1 line
1.9.2.468.g3f0c02a
Marek Vasut
AppliedPATCH v3 1/17 arm: socfpga: Enable ubi and ubifs support
In reply to Chin Liang SeeQuoted 9 lines · Chin Liang See
When QSPI and NAND is enabled, the ubi and ubifs support will be enabled too.
Signed-off-by Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Pavel Machek <[email protected]>Cc Marek Vasut <[email protected]>Cc Stefan Roese <[email protected]>
Applied all, thanks.
Best regards,
Marek Vasut