mtd: Add m25p80 driver

new file mode 100644
index 0000000..833a9c3
@@ -0,0 +1,37 @@
+/*
+ * MTD SPI-NOR driver for ST M25Pxx (and similar) serial flash chips
+ *
+ * Copyright (C) 2016 Jagan Teki <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <spi.h>
+#include <linux/mtd/mtd.h>
+
+static int m25p_probe(struct udevice *dev)
+{
+	struct spi_slave *spi = dev_get_parent_priv(dev);
+	struct mtd_info	*mtd = dev_get_uclass_priv(dev);
+
+	return 0;
+}
+
+static const struct udevice_id m25p_ids[] = {
+	/*
+	 * Generic compatibility for SPI NOR that can be identified by the
+	 * JEDEC READ ID opcode (0x9F). Use this, if possible.
+	 */
+	{ .compatible = "jedec,spi-nor" },
+	{ }
+};
+
+U_BOOT_DRIVER(m25p80) = {
+	.name		= "m25p80",
+	.id		= UCLASS_MTD,
+	.of_match	= m25p_ids,
+	.probe		= m25p_probe,
+};

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index 5b3c8bc..1bba498 100644
@@ -36,6 +36,11 @@ static inline long IS_ERR(const void *ptr)
 	return IS_ERR_VALUE((unsigned long)ptr);
 }
 
+static inline bool IS_ERR_OR_NULL(const void *ptr)
+{
+	return !ptr || IS_ERR_VALUE((unsigned long)ptr);
+}
+
 /**
  * ERR_CAST - Explicitly cast an error-valued pointer to another pointer type
  * @ptr: The pointer to cast.

253 lines not on this page · raw message

index f142ae4..b867ce9 100644
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <div64.h>
 #include <dm.h>
 #include <errno.h>
 #include <malloc.h>

@@ -14,6 +15,7 @@
 
 #include <linux/math64.h>
 #include <linux/log2.h>
+#include <linux/mtd/mtd.h>
 #include <linux/mtd/spi-nor.h>
 
 DECLARE_GLOBAL_DATA_PTR;

@@ -209,10 +211,11 @@ bar_end:
 
 static int spi_nor_read_bar(struct spi_nor *nor, const struct spi_nor_info *info)
 {
+	struct mtd_info *mtd = nor->mtd;
 	u8 curr_bank = 0;
 	int ret;
 
-	if (flash->size <= SNOR_16MB_BOUN)
+	if (mtd->size <= SNOR_16MB_BOUN)
 		goto bar_end;
 
 	switch (JEDEC_MFR(info)) {

@@ -240,12 +243,12 @@ bar_end:
 #ifdef CONFIG_SF_DUAL_FLASH
 static void spi_nor_dual(struct spi_nor *nor, u32 *addr)
 {
-	struct spi_flash *flash = nor->flash;
+	struct mtd_info *mtd = nor->mtd;
 
 	switch (nor->dual) {
 	case SNOR_DUAL_STACKED:
-		if (*addr >= (flash->size >> 1)) {
-			*addr -= flash->size >> 1;
+		if (*addr >= (mtd->size >> 1)) {
+			*addr -= mtd->size >> 1;
 			nor->flags |= SNOR_F_U_PAGE;
 		} else {
 			nor->flags &= ~SNOR_F_U_PAGE;

@@ -263,8 +266,9 @@ static void spi_nor_dual(struct spi_nor *nor, u32 *addr)
 
 #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST)
 static void stm_get_locked_range(struct spi_nor *nor, u8 sr, loff_t *ofs,
-				 u32 *len)
+				 uint64_t *len)
 {
+	struct mtd_info *mtd = nor->mtd;
 	u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
 	int shift = ffs(mask) - 1;
 	int pow;

@@ -275,18 +279,19 @@ static void stm_get_locked_range(struct spi_nor *nor, u8 sr, loff_t *ofs,
 		*len = 0;
 	} else {
 		pow = ((sr & mask) ^ mask) >> shift;
-		*len = flash->size >> pow;
-		*ofs = flash->size - *len;
+		*len = mtd->size >> pow;
+		*ofs = mtd->size - *len;
 	}
 }
 
 /*
  * Return 1 if the entire region is locked, 0 otherwise
  */
-static int stm_is_locked_sr(struct spi_nor *nor, u32 ofs, u32 len, u8 sr)
+static int stm_is_locked_sr(struct spi_nor *nor, loff_t ofs, uint64_t len,
+			    u8 sr)
 {
 	loff_t lock_offs;
-	u32 lock_len;
+	uint64_t lock_len;
 
 	stm_get_locked_range(nor, sr, &lock_offs, &lock_len);
 

@@ -294,24 +299,6 @@ static int stm_is_locked_sr(struct spi_nor *nor, u32 ofs, u32 len, u8 sr)
 }
 
 /*
- * Check if a region of the flash is (completely) locked. See stm_lock() for
- * more info.
- *
- * Returns 1 if entire region is locked, 0 if any portion is unlocked, and
- * negative on errors.
- */
-static int stm_is_locked(struct spi_nor *nor, u32 ofs, size_t len)
-{
-	int status;
-
-	status = read_sr(nor);
-	if (status < 0)
-		return status;
-
-	return stm_is_locked_sr(nor, ofs, len, status);
-}
-
-/*
  * Lock a region of the flash. Compatible with ST Micro and similar flash.
  * Supports only the block protection bits BP{0,1,2} in the status register
  * (SR). Does not support these features found in newer SR bitfields:

@@ -334,9 +321,10 @@ static int stm_is_locked(struct spi_nor *nor, u32 ofs, size_t len)
  *
  * Returns negative on errors, 0 on success.
  */
-static int stm_lock(struct spi_nor *nor, u32 ofs, size_t len)
+static int stm_lock(struct spi_nor *nor, loff_t ofs, uint64_t len)
 {
-	u8 status_old, status_new;
+	struct mtd_info *mtd = nor->mtd;
+	int status_old, status_new;
 	u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
 	u8 shift = ffs(mask) - 1, pow, val;
 

@@ -345,12 +333,12 @@ static int stm_lock(struct spi_nor *nor, u32 ofs, size_t len)
 		return status_old;
 
 	/* SPI NOR always locks to the end */
-	if (ofs + len != flash->size) {
+	if (ofs + len != mtd->size) {
 		/* Does combined region extend to end? */
-		if (!stm_is_locked_sr(nor, ofs + len, flash->size - ofs - len,
+		if (!stm_is_locked_sr(nor, ofs + len, mtd->size - ofs - len,
 				      status_old))
 			return -EINVAL;
-		len = flash->size - ofs;
+		len = mtd->size - ofs;
 	}
 
 	/*

@@ -362,11 +350,10 @@ static int stm_lock(struct spi_nor *nor, u32 ofs, size_t len)
 	 *
 	 *   pow = ceil(log2(size / len)) = log2(size) - floor(log2(len))
 	 */
-	pow = ilog2(flash->size) - ilog2(len);
+	pow = ilog2(mtd->size) - ilog2(len);
 	val = mask - (pow << shift);
 	if (val & ~mask)
 		return -EINVAL;
-
 	/* Don't "lock" with no region! */
 	if (!(val & mask))
 		return -EINVAL;

@@ -386,20 +373,22 @@ static int stm_lock(struct spi_nor *nor, u32 ofs, size_t len)
  *
  * Returns negative on errors, 0 on success.
  */
-static int stm_unlock(struct spi_nor *nor, u32 ofs, size_t len)
+static int stm_unlock(struct spi_nor *nor, loff_t ofs, uint64_t len)
 {
-	uint8_t status_old, status_new;
+	struct mtd_info *mtd = nor->mtd;
+	int status_old, status_new;
 	u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
 	u8 shift = ffs(mask) - 1, pow, val;
 
 	status_old = read_sr(nor);
-	if (status_old  < 0)
+	if (status_old < 0)
 		return status_old;
 
 	/* Cannot unlock; would unlock larger region than requested */
-	if (stm_is_locked_sr(nor, status_old, ofs - flash->erase_size,
-			     nor->erase_size))
+	if (stm_is_locked_sr(nor, status_old, ofs - mtd->erasesize,
+			     mtd->erasesize))
 		return -EINVAL;
+
 	/*
 	 * Need largest pow such that:
 	 *

@@ -409,8 +398,8 @@ static int stm_unlock(struct spi_nor *nor, u32 ofs, size_t len)
 	 *
 	 *   pow = floor(log2(size / len)) = log2(size) - ceil(log2(len))
 	 */
-	pow = ilog2(flash->size) - order_base_2(flash->size - (ofs + len));
-	if (ofs + len == flash->size) {
+	pow = ilog2(mtd->size) - order_base_2(mtd->size - (ofs + len));
+	if (ofs + len == mtd->size) {
 		val = 0; /* fully unlocked */
 	} else {
 		val = mask - (pow << shift);

@@ -428,8 +417,47 @@ static int stm_unlock(struct spi_nor *nor, u32 ofs, size_t len)
 	write_enable(nor);
 	return write_sr(nor, status_new);
 }
+
+/*
+ * Check if a region of the flash is (completely) locked. See stm_lock() for
+ * more info.
+ *
+ * Returns 1 if entire region is locked, 0 if any portion is unlocked, and
+ * negative on errors.
+ */
+static int stm_is_locked(struct spi_nor *nor, loff_t ofs, uint64_t len)
+{
+	int status;
+
+	status = read_sr(nor);
+	if (status < 0)
+		return status;
+
+	return stm_is_locked_sr(nor, ofs, len, status);
+}
 #endif
 
+static int spi_nor_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
+{
+	struct spi_nor *nor = mtd->priv;
+
+	return nor->flash_lock(nor, ofs, len);
+}
+
+static int spi_nor_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
+{
+	struct spi_nor *nor = mtd->priv;
+
+	return nor->flash_unlock(nor, ofs, len);
+}
+
+static int spi_nor_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len)
+{
+	struct spi_nor *nor = mtd->priv;
+
+	return nor->flash_is_locked(nor, ofs, len);
+}
+
 static const struct spi_nor_info *spi_nor_id(struct spi_nor *nor)
 {
 	int				tmp;

@@ -455,30 +483,32 @@ static const struct spi_nor_info *spi_nor_id(struct spi_nor *nor)
 	return ERR_PTR(-ENODEV);
 }
 
-static int spi_nor_erase(struct spi_flash *flash, u32 offset, size_t len)
+static int spi_nor_erase(struct mtd_info *mtd, struct erase_info *instr)
 {
-	struct spi_nor *nor = flash->nor;
-	u32 erase_size, erase_addr;
+	struct spi_nor *nor = mtd->priv;
+	u32 addr, len, erase_addr;
 	u8 cmd[SNOR_MAX_CMD_SIZE];
+	uint32_t rem;
 	int ret = -1;
 
-	erase_size = nor->erase_size;
-	if (offset % erase_size || len % erase_size) {
-		debug("spi-nor: Erase offset/length not multiple of erase size\n");
-		return -1;
-	}
+	div_u64_rem(instr->len, mtd->erasesize, &rem);
+	if (rem)
+		return -EINVAL;
 
-	if (flash->flash_is_locked) {
-		if (flash->flash_is_locked(flash, offset, len) > 0) {
+	addr = instr->addr;
+	len = instr->len;
+
+	if (mtd->_is_locked) {
+		if (mtd->_is_locked(mtd, addr, len) > 0) {
 			printf("offset 0x%x is protected and cannot be erased\n",
-			       offset);
+			       addr);
 			return -EINVAL;
 		}
 	}
 
-	cmd[0] = flash->erase_opcode;
+	cmd[0] = nor->erase_opcode;
 	while (len) {
-		erase_addr = offset;
+		erase_addr = addr;
 
 #ifdef CONFIG_SF_DUAL_FLASH
 		if (nor->dual > SNOR_DUAL_SINGLE)

@@ -498,39 +528,47 @@ static int spi_nor_erase(struct spi_flash *flash, u32 offset, size_t len)
 
 		ret = nor->write(nor, cmd, sizeof(cmd), NULL, 0);
 		if (ret < 0)
-			break;
+			goto erase_err;
 
 		ret = spi_nor_wait_till_ready(nor, SNOR_READY_WAIT_ERASE);
 		if (ret < 0)
-			return ret;
+			goto erase_err;
 
-		offset += erase_size;
-		len -= erase_size;
+		addr += mtd->erasesize;
+		len -= mtd->erasesize;
 	}
 
+	write_disable(nor);
+
+	instr->state = MTD_ERASE_DONE;
+	mtd_erase_callback(instr);
+
+	return ret;
+
+erase_err:
+	instr->state = MTD_ERASE_FAILED;
 	return ret;
 }
 
-int spi_nor_write(struct spi_flash *flash, u32 offset,
-		  size_t len, const void *buf)
+static int spi_nor_write(struct mtd_info *mtd, loff_t offset, size_t len,
+			 size_t *retlen, const u_char *buf)
 {
-	struct spi_nor *nor = flash->nor;
-	unsigned long byte_addr, page_size;
-	u32 write_addr;
+	struct spi_nor *nor = mtd->priv;
+	u32 byte_addr, page_size, write_addr;
 	size_t chunk_len, actual;
 	u8 cmd[SNOR_MAX_CMD_SIZE];
 	int ret = -1;
 
-	page_size = nor->page_size;
-
-	if (flash->flash_is_locked) {
-		if (flash->flash_is_locked(flash, offset, len) > 0) {
-			printf("offset 0x%x is protected and cannot be written\n",
+	if (mtd->_is_locked) {
+		if (mtd->_is_locked(mtd, offset, len) > 0) {
+			printf("offset 0x%llx is protected and cannot be written\n",
 			       offset);
 			return -EINVAL;
 		}
 	}
 
+	page_size = nor->page_size;
+
 	cmd[0] = nor->program_opcode;
 	for (actual = 0; actual < len; actual += chunk_len) {
 		write_addr = offset;

@@ -568,14 +606,16 @@ int spi_nor_write(struct spi_flash *flash, u32 offset,
 			return ret;
 
 		offset += chunk_len;
+		*retlen += chunk_len;
 	}
 
 	return ret;
 }
 
-int spi_nor_read(struct spi_flash *flash, u32 offset, size_t len, void *data)
+static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len,
+			size_t *retlen, u_char *buf)
 {
-	struct spi_nor *nor = flash->nor;
+	struct spi_nor *nor = mtd->priv;
 	u32 remain_len, read_len, read_addr;
 	u8 *cmd, cmdsz;
 	int bank_sel = 0;

@@ -583,7 +623,7 @@ int spi_nor_read(struct spi_flash *flash, u32 offset, size_t len, void *data)
 
 	/* Handle memory-mapped SPI */
 	if (nor->memory_map) {
-		ret = nor->read_mmap(nor, data, nor->memory_map + offset, len);
+		ret = nor->read_mmap(nor, buf, nor->memory_map + from, len);
 		if (ret) {
 			debug("spi-nor: mmap read failed\n");
 			return ret;

@@ -601,7 +641,7 @@ int spi_nor_read(struct spi_flash *flash, u32 offset, size_t len, void *data)
 
 	cmd[0] = nor->read_opcode;
 	while (len) {
-		read_addr = offset;
+		read_addr = from;
 
 #ifdef CONFIG_SF_DUAL_FLASH
 		if (nor->dual > SNOR_DUAL_SINGLE)

@@ -614,7 +654,7 @@ int spi_nor_read(struct spi_flash *flash, u32 offset, size_t len, void *data)
 		bank_sel = nor->bank_curr;
 #endif
 		remain_len = ((SNOR_16MB_BOUN << nor->shift) *
-				(bank_sel + 1)) - offset;
+				(bank_sel + 1)) - from;
 		if (len < remain_len)
 			read_len = len;
 		else

@@ -622,13 +662,14 @@ int spi_nor_read(struct spi_flash *flash, u32 offset, size_t len, void *data)
 
 		spi_nor_addr(read_addr, cmd);
 
-		ret = nor->read(nor, cmd, cmdsz, data, read_len);
+		ret = nor->read(nor, cmd, cmdsz, buf, read_len);
 		if (ret < 0)
 			break;
 
-		offset += read_len;
+		from += read_len;
 		len -= read_len;
-		data += read_len;
+		buf += read_len;
+		*retlen += read_len;
 	}
 
 	free(cmd);

@@ -636,7 +677,8 @@ int spi_nor_read(struct spi_flash *flash, u32 offset, size_t len, void *data)
 }
 
 #ifdef CONFIG_SPI_FLASH_SST
-static int sst_byte_write(struct spi_nor *nor, u32 offset, const void *buf)
+static int sst_byte_write(struct spi_nor *nor, u32 offset,
+			  const void *buf, size_t *retlen)
 {
 	int ret;
 	u8 cmd[4] = {

@@ -657,12 +699,15 @@ static int sst_byte_write(struct spi_nor *nor, u32 offset, const void *buf)
 	if (ret)
 		return ret;
 
+	*retlen += 1;
+
 	return spi_nor_wait_till_ready(nor, SNOR_READY_WAIT_PROG);
 }
 
-int sst_write_wp(struct spi_nor *nor, u32 offset, size_t len, const void *buf)
+static int sst_write_wp(struct mtd_info *mtd, loff_t offset, size_t len,
+			size_t *retlen, const u_char *buf)
 {
-	struct spi_nor *nor = flash->nor;
+	struct spi_nor *nor = mtd->priv;
 	size_t actual, cmd_len;
 	int ret;
 	u8 cmd[4];

@@ -670,7 +715,7 @@ int sst_write_wp(struct spi_nor *nor, u32 offset, size_t len, const void *buf)
 	/* If the data is not word aligned, write out leading single byte */
 	actual = offset % 2;
 	if (actual) {
-		ret = sst_byte_write(nor, offset, buf);
+		ret = sst_byte_write(nor, offset, buf, retlen);
 		if (ret)
 			goto done;
 	}

@@ -687,7 +732,7 @@ int sst_write_wp(struct spi_nor *nor, u32 offset, size_t len, const void *buf)
 	cmd[3] = offset;
 
 	for (; actual < len - 1; actual += 2) {
-		debug("spi-nor: 0x%p => cmd = { 0x%02x 0x%06x }\n",
+		debug("spi-nor: 0x%p => cmd = { 0x%02x 0x%06llx }\n",
 		      buf + actual, cmd[0], offset);
 
 		ret = nor->write(nor, cmd, cmd_len, buf + actual, 2);

@@ -702,6 +747,7 @@ int sst_write_wp(struct spi_nor *nor, u32 offset, size_t len, const void *buf)
 
 		cmd_len = 1;
 		offset += 2;
+		*retlen += 2;
 	}
 
 	if (!ret)

@@ -709,20 +755,21 @@ int sst_write_wp(struct spi_nor *nor, u32 offset, size_t len, const void *buf)
 
 	/* If there is a single trailing byte, write it out */
 	if (!ret && actual != len)
-		ret = sst_byte_write(nor, offset, buf + actual);
+		ret = sst_byte_write(nor, offset, buf + actual, retlen);
 
  done:
 	return ret;
 }
 
-int sst_write_bp(struct spi_nor *nor, u32 offset, size_t len, const void *buf)
+static int sst_write_bp(struct mtd_info *mtd, loff_t offset, size_t len,
+			size_t *retlen, const u_char *buf)
 {
-	struct spi_nor *nor = flash->nor;
+	struct spi_nor *nor = mtd->priv;
 	size_t actual;
 	int ret;
 
 	for (actual = 0; actual < len; actual++) {
-		ret = sst_byte_write(nor, offset, buf + actual);
+		ret = sst_byte_write(nor, offset, buf + actual, retlen);
 		if (ret) {
 			debug("spi-nor: sst byte program failed\n");
 			break;

@@ -853,6 +900,7 @@ static int set_quad_mode(struct spi_nor *nor, const struct spi_nor_info *info)
 #if CONFIG_IS_ENABLED(OF_CONTROL)
 int spi_nor_decode_fdt(const void *blob, struct spi_nor *nor)
 {
+	struct mtd_info *mtd = nor->mtd;
 	fdt_addr_t addr;
 	fdt_size_t size;
 	int node;

@@ -868,7 +916,7 @@ int spi_nor_decode_fdt(const void *blob, struct spi_nor *nor)
 		return 0;
 	}
 
-	if (flash->size != size) {
+	if (mtd->size != size) {
 		debug("%s: Memory map must cover entire device\n", __func__);
 		return -1;
 	}

@@ -891,6 +939,7 @@ static int spi_nor_check(struct spi_nor *nor)
 
 int spi_nor_scan(struct spi_nor *nor)
 {
+	struct mtd_info *mtd = nor->mtd;
 	const struct spi_nor_info *info = NULL;
 	static u8 flash_read_cmd[] = {
 		SNOR_OP_READ,

@@ -921,7 +970,13 @@ int spi_nor_scan(struct spi_nor *nor)
 		write_sr(nor, 0);
 	}
 
-	flash->name = info->name;
+	mtd->name = info->name;
+	mtd->priv = nor;
+	mtd->type = MTD_NORFLASH;
+	mtd->writesize = 1;
+	mtd->flags = MTD_CAP_NORFLASH;
+	mtd->_erase = spi_nor_erase;
+	mtd->_read = spi_nor_read;
 
 	if (info->flags & USE_FSR)
 		nor->flags |= SNOR_F_USE_FSR;

@@ -929,15 +984,13 @@ int spi_nor_scan(struct spi_nor *nor)
 	if (info->flags & SST_WRITE)
 		nor->flags |= SNOR_F_SST_WRITE;
 
-	flash->write = spi_nor_write;
-	flash->erase = spi_nor_erase;
-	flash->read = spi_nor_read;
+	mtd->_write = spi_nor_write;
 #if defined(CONFIG_SPI_FLASH_SST)
 	if (nor->flags & SNOR_F_SST_WRITE) {
 		if (nor->mode & SNOR_WRITE_1_1_BYTE)
-			flash->write = sst_write_bp;
+			mtd->_write = sst_write_bp;
 		else
-			flash->write = sst_write_wp;
+			mtd->_write = sst_write_wp;
 	}
 #endif
 

@@ -951,10 +1004,10 @@ int spi_nor_scan(struct spi_nor *nor)
 	}
 #endif
 
-	if (flash->flash_lock && flash->flash_unlock && flash->flash_is_locked) {
-		flash->flash_lock = spi_nor_lock;
-		flash->flash_unlock = spi_nor_unlock;
-		flash->flash_is_locked = spi_nor_is_locked;
+	if (nor->flash_lock && nor->flash_unlock && nor->flash_is_locked) {
+		mtd->_lock = spi_nor_lock;
+		mtd->_unlock = spi_nor_unlock;
+		mtd->_is_locked = spi_nor_is_locked;
 	}
 
 	/* Compute the flash size */

@@ -972,30 +1025,30 @@ int spi_nor_scan(struct spi_nor *nor)
 			nor->page_size = 512;
 	}
 	nor->page_size <<= nor->shift;
-	flash->sector_size = info->sector_size << nor->shift;
-	flash->size = flash->sector_size * info->n_sectors << nor->shift;
+	mtd->writebufsize = nor->page_size;
+	mtd->size = (info->sector_size * info->n_sectors) << nor->shift;
 #ifdef CONFIG_SF_DUAL_FLASH
 	if (nor->dual & SNOR_DUAL_STACKED)
-		flash->size <<= 1;
+		mtd->size <<= 1;
 #endif
 
 #ifdef CONFIG_MTD_SPI_NOR_USE_4K_SECTORS
 	/* prefer "small sector" erase if possible */
 	if (info->flags & SECT_4K) {
 		nor->erase_opcode = SNOR_OP_BE_4K;
-		nor->erase_size = 4096 << nor->shift;
+		mtd->erasesize = 4096 << nor->shift;
 	} else if (info->flags & SECT_4K_PMC) {
 		nor->erase_opcode = SNOR_OP_BE_4K_PMC;
-		nor->erase_size = 4096;
+		mtd->erasesize = 4096;
 	} else
 #endif
 	{
 		nor->erase_opcode = SNOR_OP_SE;
-		nor->erase_size = flash->sector_size;
+		mtd->erasesize = info->sector_size << nor->shift;
 	}
 
-	/* Now erase size becomes valid sector size */
-	flash->sector_size = nor->erase_size;
+	if (info->flags & SPI_NOR_NO_ERASE)
+		mtd->flags |= MTD_NO_ERASE;
 
 	/* Look for the fastest read cmd */
 	cmd = fls(info->flash_read & nor->read_mode);

@@ -1007,6 +1060,10 @@ int spi_nor_scan(struct spi_nor *nor)
 		nor->read_opcode = SNOR_OP_READ_FAST;
 	}
 
+	/* Some devices cannot do fast-read */
+	if (info->flags & SPI_NOR_NO_FR)
+		nor->read_opcode = SNOR_OP_READ;
+
 	/* Not require to look for fastest only two write cmds yet */
 	if (info->flags & SNOR_WRITE_QUAD && nor->mode & SNOR_WRITE_1_1_4)
 		nor->program_opcode = SNOR_OP_QPP;

@@ -1061,10 +1118,10 @@ int spi_nor_scan(struct spi_nor *nor)
 #endif
 
 #ifndef CONFIG_SPL_BUILD
-	printf("spi-nor: detected %s with page size ", flash->name);
+	printf("spi-nor: detected %s with page size ", mtd->name);
 	print_size(nor->page_size, ", erase size ");
-	print_size(nor->erase_size, ", total ");
-	print_size(flash->size, "");
+	print_size(mtd->erasesize, ", total ");
+	print_size(mtd->size, "");
 	if (nor->memory_map)
 		printf(", mapped at %p", nor->memory_map);
 	puts("\n");

@@ -1072,9 +1129,9 @@ int spi_nor_scan(struct spi_nor *nor)
 
 #ifndef CONFIG_SPI_FLASH_BAR
 	if (((nor->dual == SNOR_DUAL_SINGLE) &&
-	     (flash->size > SNOR_16MB_BOUN)) ||
+	     (mtd->size > SNOR_16MB_BOUN)) ||
 	     ((nor->dual > SNOR_DUAL_SINGLE) &&
-	     (flash->size > SNOR_16MB_BOUN << 1))) {
+	     (mtd->size > SNOR_16MB_BOUN << 1))) {
 		puts("spi-nor: Warning - Only lower 16MiB accessible,");
 		puts(" Full access #define CONFIG_SPI_FLASH_BAR\n");
 	}

index 833a9c3..57e54d0 100644
@@ -10,14 +10,249 @@
 #include <dm.h>
 #include <errno.h>
 #include <spi.h>
+
+#include <dm/device-internal.h>
+
 #include <linux/mtd/mtd.h>
+#include <linux/mtd/spi-nor.h>
+
+struct m25p {
+	struct spi_slave	*spi;
+	struct spi_nor		spi_nor;
+};
+
+static int spi_read_then_write(struct spi_slave *spi, const u8 *cmd,
+			       size_t cmd_len, const u8 *data_out,
+			       u8 *data_in, size_t data_len)
+{
+	unsigned long flags = SPI_XFER_BEGIN;
+	int ret;
+
+	if (data_len == 0)
+		flags |= SPI_XFER_END;
+
+	ret = spi_xfer(spi, cmd_len * 8, cmd, NULL, flags);
+	if (ret) {
+		debug("SF: Failed to send command (%zu bytes): %d\n",
+		      cmd_len, ret);
+	} else if (data_len != 0) {
+		ret = spi_xfer(spi, data_len * 8, data_out, data_in,
+					SPI_XFER_END);
+		if (ret)
+			debug("SF: Failed to transfer %zu bytes of data: %d\n",
+			      data_len, ret);
+	}
+
+	return ret;
+}
+
+static int m25p80_read_reg(struct spi_nor *nor, u8 cmd, u8 *val, int len)
+{
+	struct m25p *flash = nor->priv;
+	struct spi_slave *spi = flash->spi;
+	int ret;
+
+	ret = spi_claim_bus(spi);
+	if (ret < 0) {
+		debug("m25p80: unable to claim SPI bus\n");
+		return ret;
+	}
+
+	if (nor->flags & SNOR_F_U_PAGE)
+		spi->flags |= SPI_XFER_U_PAGE;
+
+	ret = spi_read_then_write(spi, &cmd, 1, NULL, val, len);
+	if (ret < 0) {
+		debug("m25p80: error %d reading register %x\n", ret, cmd);
+		return ret;
+	}
+
+	spi_release_bus(spi);
+
+	return ret;
+}
+
+static int m25p80_write_reg(struct spi_nor *nor, u8 cmd, u8 *buf, int len)
+{
+	struct m25p *flash = nor->priv;
+	struct spi_slave *spi = flash->spi;
+	int ret;
+
+	ret = spi_claim_bus(spi);
+	if (ret < 0) {
+		debug("m25p80: unable to claim SPI bus\n");
+		return ret;
+	}
+
+	if (nor->flags & SNOR_F_U_PAGE)
+		spi->flags |= SPI_XFER_U_PAGE;
+
+	ret = spi_read_then_write(spi, &cmd, 1, buf, NULL, len);
+	if (ret < 0) {
+		debug("m25p80: error %d writing register %x\n", ret, cmd);
+		return ret;
+	}
+
+	spi_release_bus(spi);
+
+	return ret;
+}
+
+void __weak flash_copy_mmap(void *data, void *offset, size_t len)
+{
+	memcpy(data, offset, len);
+}
+
+static int m25p80_read_mmap(struct spi_nor *nor, void *data,
+			    void *offset, size_t len)
+{
+	struct m25p *flash = nor->priv;
+	struct spi_slave *spi = flash->spi;
+	int ret;
+
+	ret = spi_claim_bus(spi);
+	if (ret) {
+		debug("m25p80: unable to claim SPI bus\n");
+		return ret;
+	}
+
+	spi_xfer(spi, 0, NULL, NULL, SPI_XFER_MMAP);
+	flash_copy_mmap(data, offset, len);
+	spi_xfer(spi, 0, NULL, NULL, SPI_XFER_MMAP_END);
+
+	spi_release_bus(spi);
+
+	return ret;
+}
+
+static int m25p80_read(struct spi_nor *nor, const u8 *cmd, size_t cmd_len,
+				void *data, size_t data_len)
+{
+	struct m25p *flash = nor->priv;
+	struct spi_slave *spi = flash->spi;
+	int ret;
+
+	ret = spi_claim_bus(spi);
+	if (ret < 0) {
+		debug("m25p80: unable to claim SPI bus\n");
+		return ret;
+	}
+
+	if (nor->flags & SNOR_F_U_PAGE)
+		spi->flags |= SPI_XFER_U_PAGE;
+
+	ret = spi_read_then_write(spi, cmd, cmd_len, NULL, data, data_len);
+	if (ret < 0) {
+		debug("m25p80: error %d reading %x\n", ret, *cmd);
+		return ret;
+	}
+
+	spi_release_bus(spi);
+
+	return ret;
+}
+
+static int m25p80_write(struct spi_nor *nor, const u8 *cmd, size_t cmd_len,
+				const void *data, size_t data_len)
+{
+	struct m25p *flash = nor->priv;
+	struct spi_slave *spi = flash->spi;
+	int ret;
+
+	ret = spi_claim_bus(spi);
+	if (ret < 0) {
+		debug("m25p80: unable to claim SPI bus\n");
+		return ret;
+	}
+
+	if (nor->flags & SNOR_F_U_PAGE)
+		spi->flags |= SPI_XFER_U_PAGE;
+
+	ret = spi_read_then_write(spi, cmd, cmd_len, data, NULL, data_len);
+	if (ret < 0) {
+		debug("m25p80: error %d writing %x\n", ret, *cmd);
+		return ret;
+	}
+
+	spi_release_bus(spi);
+
+	return ret;
+}
 
 static int m25p_probe(struct udevice *dev)
 {
 	struct spi_slave *spi = dev_get_parent_priv(dev);
 	struct mtd_info	*mtd = dev_get_uclass_priv(dev);
+	struct m25p *flash = dev_get_priv(dev);
+	struct spi_nor *nor;
+	int ret;
+
+	nor = &flash->spi_nor;
+
+	/* install hooks */
+	nor->read_mmap = m25p80_read_mmap;
+	nor->read = m25p80_read;
+	nor->write = m25p80_write;
+	nor->read_reg = m25p80_read_reg;
+	nor->write_reg = m25p80_write_reg;
+
+	nor->mtd = mtd;
+	nor->priv = flash;
+	flash->spi = spi;
+
+	/* claim spi bus */
+	ret = spi_claim_bus(spi);
+	if (ret) {
+		debug("m25p80: failed to claim SPI bus: %d\n", ret);
+		return ret;
+	}
+
+	switch (spi->mode_rx) {
+	case SPI_RX_SLOW:
+		nor->read_mode = SNOR_READ;
+		break;
+	case SPI_RX_DUAL:
+		nor->read_mode = SNOR_READ_1_1_2;
+		break;
+	case SPI_RX_QUAD:
+		nor->read_mode = SNOR_READ_1_1_4;
+		break;
+	}
+
+	switch (spi->mode) {
+	case SPI_TX_BYTE:
+		nor->mode = SNOR_WRITE_1_1_BYTE;
+		break;
+	case SPI_TX_QUAD:
+		nor->mode = SNOR_WRITE_1_1_4;
+		break;
+	}
+
+	nor->memory_map = spi->memory_map;
+	nor->max_write_size = spi->max_write_size;
+
+	/* TODO: unrelated to spi_slave{} */
+	if (spi->option & SPI_CONN_DUAL_SHARED)
+		nor->dual = SNOR_DUAL_STACKED;
+	else if (spi->option & SPI_CONN_DUAL_SEPARATED)
+		nor->dual = SNOR_DUAL_PARALLEL;
+
+	ret = spi_nor_scan(nor);
+	if (ret)
+		goto err_scan;
+
+	ret = add_mtd_device(mtd);
+	if (ret)
+		goto err_mtd;
 
 	return 0;
+
+err_scan:
+	spi_release_bus(spi);
+err_mtd:
+	spi_free_slave(spi);
+	device_remove(dev);
+	return ret;
 }
 
 static const struct udevice_id m25p_ids[] = {

@@ -34,4 +269,5 @@ U_BOOT_DRIVER(m25p80) = {
 	.id		= UCLASS_MTD,
 	.of_match	= m25p_ids,
 	.probe		= m25p_probe,
+	.priv_auto_alloc_size = sizeof(struct m25p),
 };

index 42862d9..e4d1274 100644
@@ -85,7 +85,7 @@ static int do_spi_flash_probe(int argc, char * const argv[])
 	unsigned int speed = CONFIG_SF_DEFAULT_SPEED;
 	unsigned int mode = CONFIG_SF_DEFAULT_MODE;
 	char *endp;
-#ifdef CONFIG_DM_SPI_FLASH
+#if defined(CONFIG_DM_SPI_FLASH) || defined (CONFIG_MTD_DM_SPI_NOR)
 	struct udevice *new, *bus_dev;
 	int ret;
 #else

@@ -118,7 +118,7 @@ static int do_spi_flash_probe(int argc, char * const argv[])
 			return -1;
 	}
 
-#ifdef CONFIG_DM_SPI_FLASH
+#if defined(CONFIG_DM_SPI_FLASH) || defined (CONFIG_MTD_DM_SPI_NOR)
 	/* Remove the old device, otherwise probe will just be a nop */
 	ret = spi_find_bus_and_cs(bus, cs, &bus_dev, &new);
 	if (!ret) {

index 892e6cb..6d5d847 100644
@@ -52,7 +52,7 @@ int saveenv(void)
 	char	*saved_buffer = NULL, flag = OBSOLETE_FLAG;
 	u32	saved_size, saved_offset, sector = 1;
 	int	ret;
-#ifdef CONFIG_DM_SPI_FLASH
+#if defined(CONFIG_DM_SPI_FLASH) || defined (CONFIG_MTD_DM_SPI_NOR)
 	struct udevice *new;
 
 	ret = spi_flash_probe_bus_cs(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS,

@@ -242,7 +242,7 @@ int saveenv(void)
 	char	*saved_buffer = NULL;
 	int	ret = 1;
 	env_t	env_new;
-#ifdef CONFIG_DM_SPI_FLASH
+#if defined(CONFIG_DM_SPI_FLASH) || defined (CONFIG_MTD_DM_SPI_NOR)
 	struct udevice *new;
 
 	ret = spi_flash_probe_bus_cs(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS,

new file mode 100644
index 0000000..c808a7d
@@ -0,0 +1,30 @@
+/*
+ * Copyright (c) 2014 Google, Inc
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <spi.h>
+#include <spi_flash.h>
+
+int spi_flash_probe_bus_cs(unsigned int busnum, unsigned int cs,
+			   unsigned int max_hz, unsigned int spi_mode,
+			   struct udevice **devp)
+{
+	struct spi_slave *slave;
+	struct udevice *bus;
+	char name[30], *str;
+	int ret;
+
+	snprintf(name, sizeof(name), "spi-nor@%d:%d", busnum, cs);
+	str = strdup(name);
+	ret = spi_get_bus_and_cs(busnum, cs, max_hz, spi_mode,
+				 "m25p80", str, &bus, &slave);
+	if (ret)
+		return ret;
+
+	*devp = slave->dev;
+	return 0;
+}

index d0ce9e7..db07b99 100644
@@ -108,6 +108,14 @@ struct spi_flash {
 #endif
 };
 
+#if defined(CONFIG_MTD_SPI_NOR) && defined(CONFIG_MTD_DM_SPI_NOR)
+
+int spi_flash_probe_bus_cs(unsigned int busnum, unsigned int cs,
+			   unsigned int max_hz, unsigned int spi_mode,
+			   struct udevice **devp);
+
+#endif
+
 struct dm_spi_flash_ops {
 	int (*read)(struct udevice *dev, u32 offset, size_t len, void *buf);
 	int (*write)(struct udevice *dev, u32 offset, size_t len,

@@ -190,7 +198,8 @@ int sandbox_sf_bind_emul(struct sandbox_state *state, int busnum, int cs,
 
 void sandbox_sf_unbind_emul(struct sandbox_state *state, int busnum, int cs);
 
-#else
+#elif !defined(CONFIG_MTD_SPI_NOR)
+
 struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
 		unsigned int max_hz, unsigned int spi_mode);
 

index c808a7d..9bc61ea 100644
@@ -9,6 +9,21 @@
 #include <spi.h>
 #include <spi_flash.h>
 
+/*
+ * TODO(sjg at chromium.org): This is an old-style function. We should remove
+ * it when all SPI flash drivers use dm
+ */
+spi_flash_t *spi_flash_probe(unsigned int bus, unsigned int cs,
+			     unsigned int max_hz, unsigned int spi_mode)
+{
+	struct udevice *dev;
+
+	if (spi_flash_probe_bus_cs(bus, cs, max_hz, spi_mode, &dev))
+		return NULL;
+
+	return dev_get_uclass_priv(dev);
+}
+
 int spi_flash_probe_bus_cs(unsigned int busnum, unsigned int cs,
 			   unsigned int max_hz, unsigned int spi_mode,
 			   struct udevice **devp)

index db07b99..45fda7a 100644
@@ -110,10 +110,16 @@ struct spi_flash {
 
 #if defined(CONFIG_MTD_SPI_NOR) && defined(CONFIG_MTD_DM_SPI_NOR)
 
+typedef struct mtd_info spi_flash_t;
+
 int spi_flash_probe_bus_cs(unsigned int busnum, unsigned int cs,
 			   unsigned int max_hz, unsigned int spi_mode,
 			   struct udevice **devp);
 
+/* Compatibility function - this is the old U-Boot API */
+spi_flash_t *spi_flash_probe(unsigned int bus, unsigned int cs,
+			     unsigned int max_hz, unsigned int spi_mode);
+
 #endif
 
 struct dm_spi_flash_ops {

index 9bc61ea..ccc3b6c 100644
@@ -9,6 +9,8 @@
 #include <spi.h>
 #include <spi_flash.h>
 
+#include <dm/device-internal.h>
+
 /*
  * TODO(sjg at chromium.org): This is an old-style function. We should remove
  * it when all SPI flash drivers use dm

@@ -24,6 +26,11 @@ spi_flash_t *spi_flash_probe(unsigned int bus, unsigned int cs,
 	return dev_get_uclass_priv(dev);
 }
 
+void spi_flash_free(spi_flash_t *flash)
+{
+	device_remove(flash->dev);
+}
+
 int spi_flash_probe_bus_cs(unsigned int busnum, unsigned int cs,
 			   unsigned int max_hz, unsigned int spi_mode,
 			   struct udevice **devp)

index 45fda7a..e76ea11 100644
@@ -120,6 +120,9 @@ int spi_flash_probe_bus_cs(unsigned int busnum, unsigned int cs,
 spi_flash_t *spi_flash_probe(unsigned int bus, unsigned int cs,
 			     unsigned int max_hz, unsigned int spi_mode);
 
+/* Compatibility function - this is the old U-Boot API */
+void spi_flash_free(spi_flash_t *flash);
+
 #endif
 
 struct dm_spi_flash_ops {

index 57e54d0..f0340a5 100644
@@ -19,6 +19,9 @@
 struct m25p {
 	struct spi_slave	*spi;
 	struct spi_nor		spi_nor;
+#ifndef CONFIG_MTD_DM_SPI_NOR
+	struct mtd_info		mtd;
+#endif
 };
 
 static int spi_read_then_write(struct spi_slave *spi, const u8 *cmd,

@@ -179,16 +182,13 @@ static int m25p80_write(struct spi_nor *nor, const u8 *cmd, size_t cmd_len,
 	return ret;
 }
 
-static int m25p_probe(struct udevice *dev)
+static int m25p80_spi_nor(struct spi_nor *nor)
 {
-	struct spi_slave *spi = dev_get_parent_priv(dev);
-	struct mtd_info	*mtd = dev_get_uclass_priv(dev);
-	struct m25p *flash = dev_get_priv(dev);
-	struct spi_nor *nor;
+	struct mtd_info *mtd = nor->mtd;
+	struct m25p *flash = nor->priv;
+	struct spi_slave *spi = flash->spi;
 	int ret;
 
-	nor = &flash->spi_nor;
-
 	/* install hooks */
 	nor->read_mmap = m25p80_read_mmap;
 	nor->read = m25p80_read;

@@ -196,10 +196,6 @@ static int m25p_probe(struct udevice *dev)
 	nor->read_reg = m25p80_read_reg;
 	nor->write_reg = m25p80_write_reg;
 
-	nor->mtd = mtd;
-	nor->priv = flash;
-	flash->spi = spi;
-
 	/* claim spi bus */
 	ret = spi_claim_bus(spi);
 	if (ret) {

@@ -251,10 +247,33 @@ err_scan:
 	spi_release_bus(spi);
 err_mtd:
 	spi_free_slave(spi);
-	device_remove(dev);
 	return ret;
 }
 
+#ifdef CONFIG_MTD_DM_SPI_NOR
+static int m25p_probe(struct udevice *dev)
+{
+	struct spi_slave *spi = dev_get_parent_priv(dev);
+	struct mtd_info	*mtd = dev_get_uclass_priv(dev);
+	struct m25p *flash = dev_get_priv(dev);
+	struct spi_nor *nor;
+	int ret;
+
+	nor = &flash->spi_nor;
+
+	nor->mtd = mtd;
+	nor->priv = flash;
+	flash->spi = spi;
+
+	ret = m25p80_spi_nor(nor);
+	if (ret) {
+		device_remove(dev);
+		return ret;
+	}
+
+	return 0;
+}
+
 static const struct udevice_id m25p_ids[] = {
 	/*
 	 * Generic compatibility for SPI NOR that can be identified by the

@@ -271,3 +290,68 @@ U_BOOT_DRIVER(m25p80) = {
 	.probe		= m25p_probe,
 	.priv_auto_alloc_size = sizeof(struct m25p),
 };
+
+#else
+
+static struct mtd_info *m25p80_probe_tail(struct spi_slave *bus)
+{
+	struct m25p *flash;
+	struct spi_nor *nor;
+	int ret;
+
+	flash = calloc(1, sizeof(*flash));
+	if (!flash) {
+		debug("mp25p80: failed to allocate m25p\n");
+		return NULL;
+	}
+
+	nor = &flash->spi_nor;
+	nor->mtd = &flash->mtd;
+
+	nor->priv = flash;
+	flash->spi = bus;
+
+	ret = m25p80_spi_nor(nor);
+	if (ret) {
+		free(flash);
+		return NULL;
+	}
+
+	return nor->mtd;
+}
+
+struct mtd_info *spi_flash_probe(unsigned int busnum, unsigned int cs,
+				 unsigned int max_hz, unsigned int spi_mode)
+{
+	struct spi_slave *bus;
+
+	bus = spi_setup_slave(busnum, cs, max_hz, spi_mode);
+	if (!bus)
+		return NULL;
+	return m25p80_probe_tail(bus);
+}
+
+#ifdef CONFIG_OF_SPI_FLASH
+struct mtd_info *spi_flash_probe_fdt(const void *blob, int slave_node,
+				     int spi_node)
+{
+	struct spi_slave *bus;
+
+	bus = spi_setup_slave_fdt(blob, slave_node, spi_node);
+	if (!bus)
+		return NULL;
+	return m25p80_probe_tail(bus);
+}
+#endif
+
+void spi_flash_free(struct mtd_info *info)
+{
+	struct spi_nor *nor = info->priv;
+	struct m25p *flash = nor->priv;
+
+	del_mtd_device(info);
+	spi_free_slave(flash->spi);
+	free(flash);
+}
+
+#endif /* CONFIG_MTD_DM_SPI_NOR */

index e76ea11..1165199 100644
@@ -108,10 +108,12 @@ struct spi_flash {
 #endif
 };
 
-#if defined(CONFIG_MTD_SPI_NOR) && defined(CONFIG_MTD_DM_SPI_NOR)
+#ifdef CONFIG_MTD_SPI_NOR
 
 typedef struct mtd_info spi_flash_t;
 
+#ifdef CONFIG_MTD_DM_SPI_NOR
+
 int spi_flash_probe_bus_cs(unsigned int busnum, unsigned int cs,
 			   unsigned int max_hz, unsigned int spi_mode,
 			   struct udevice **devp);

@@ -123,7 +125,19 @@ spi_flash_t *spi_flash_probe(unsigned int bus, unsigned int cs,
 /* Compatibility function - this is the old U-Boot API */
 void spi_flash_free(spi_flash_t *flash);
 
-#endif
+#else
+
+spi_flash_t *spi_flash_probe(unsigned int bus, unsigned int cs,
+			     unsigned int max_hz, unsigned int spi_mode);
+
+spi_flash_t *spi_flash_probe_fdt(const void *blob, int slave_node,
+				 int spi_node);
+
+void spi_flash_free(spi_flash_t *flash);
+
+#endif /* CONFIG_MTD_DM_SPI_NOR */
+
+#endif /* CONFIG_MTD_SPI_NOR */
 
 struct dm_spi_flash_ops {
 	int (*read)(struct udevice *dev, u32 offset, size_t len, void *buf);

index b2a56da..0f66b99 100644
@@ -427,12 +427,12 @@ static int add_dataflash(struct udevice *dev, char *name, int nr_pages,
 	spi_flash->name = name;
 	spi_flash->page_size = pagesize;
 	spi_flash->size = nr_pages * pagesize;
-	spi_flash->erase_size = pagesize;
+	spi_flash->erasesize = pagesize;
 
 #ifndef CONFIG_SPL_BUILD
 	printf("SPI DataFlash: Detected %s with page size ", spi_flash->name);
 	print_size(spi_flash->page_size, ", erase size ");
-	print_size(spi_flash->erase_size, ", total ");
+	print_size(spi_flash->erasesize, ", total ");
 	print_size(spi_flash->size, "");
 	printf(", revision %c", revision);
 	puts("\n");

index 8a60c72..17eb0e9 100644
@@ -328,7 +328,7 @@ int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)
 	u8 cmd[SPI_FLASH_CMD_LEN];
 	int ret = -1;
 
-	erase_size = flash->erase_size;
+	erase_size = flash->erasesize;
 	if (offset % erase_size || len % erase_size) {
 		debug("SF: Erase offset/length not multiple of erase size\n");
 		return -1;

@@ -795,7 +795,7 @@ int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len)
 		return ret;
 
 	/* Cannot unlock; would unlock larger region than requested */
-	if (stm_is_locked_sr(flash, ofs - flash->erase_size, flash->erase_size,
+	if (stm_is_locked_sr(flash, ofs - flash->erasesize, flash->erasesize,
 			     status_old))
 		return -EINVAL;
 	/*

@@ -1082,17 +1082,17 @@ int spi_flash_scan(struct spi_flash *flash)
 	/* Compute erase sector and command */
 	if (params->flags & SECT_4K) {
 		flash->erase_cmd = CMD_ERASE_4K;
-		flash->erase_size = 4096 << flash->shift;
+		flash->erasesize = 4096 << flash->shift;
 	} else if (params->flags & SECT_32K) {
 		flash->erase_cmd = CMD_ERASE_32K;
-		flash->erase_size = 32768 << flash->shift;
+		flash->erasesize = 32768 << flash->shift;
 	} else {
 		flash->erase_cmd = CMD_ERASE_64K;
-		flash->erase_size = flash->sector_size;
+		flash->erasesize = flash->sector_size;
 	}
 
 	/* Now erase size becomes valid sector size */
-	flash->sector_size = flash->erase_size;
+	flash->sector_size = flash->erasesize;
 
 	/* Look for the fastest read cmd */
 	cmd = fls(params->e_rd_cmd & spi->mode_rx);

@@ -1164,7 +1164,7 @@ int spi_flash_scan(struct spi_flash *flash)
 #ifndef CONFIG_SPL_BUILD
 	printf("SF: Detected %s with page size ", flash->name);
 	print_size(flash->page_size, ", erase size ");
-	print_size(flash->erase_size, ", total ");
+	print_size(flash->erasesize, ", total ");
 	print_size(flash->size, "");
 	if (flash->memory_map)
 		printf(", mapped at %p", flash->memory_map);

index 1165199..c68df26 100644
@@ -40,7 +40,7 @@ struct spi_slave;
  * @size:		Total flash size
  * @page_size:		Write (page) size
  * @sector_size:	Sector size
- * @erase_size:		Erase size
+ * @erasesize:		Erase size
  * @bank_read_cmd:	Bank read cmd
  * @bank_write_cmd:	Bank write cmd
  * @bank_curr:		Current flash bank

@@ -73,7 +73,7 @@ struct spi_flash {
 	u32 size;
 	u32 page_size;
 	u32 sector_size;
-	u32 erase_size;
+	u32 erasesize;
 #ifdef CONFIG_SPI_FLASH_BAR
 	u8 bank_read_cmd;
 	u8 bank_write_cmd;

index e4d1274..c20c901 100644
@@ -53,8 +53,8 @@ static int sf_parse_len_arg(char *arg, ulong *len)
 	if (ep == arg || *ep != '\0')
 		return -1;
 
-	if (round_up_len && flash->sector_size > 0)
-		*len = ROUND(len_arg, flash->sector_size);
+	if (round_up_len && flash->erasesize > 0)
+		*len = ROUND(len_arg, flash->erasesize);
 	else
 		*len = len_arg;
 

@@ -171,10 +171,10 @@ static const char *spi_flash_update_block(struct spi_flash *flash, u32 offset,
 {
 	char *ptr = (char *)buf;
 
-	debug("offset=%#x, sector_size=%#x, len=%#zx\n",
-	      offset, flash->sector_size, len);
+	debug("offset=%#x, erasesize=%#x, len=%#zx\n",
+	      offset, flash->erasesize, len);
 	/* Read the entire sector so to allow for rewriting */
-	if (spi_flash_read(flash, offset, flash->sector_size, cmp_buf))
+	if (spi_flash_read(flash, offset, flash->erasesize, cmp_buf))
 		return "read";
 	/* Compare only what is meaningful (len) */
 	if (memcmp(cmp_buf, buf, len) == 0) {

@@ -184,15 +184,15 @@ static const char *spi_flash_update_block(struct spi_flash *flash, u32 offset,
 		return NULL;
 	}
 	/* Erase the entire sector */
-	if (spi_flash_erase(flash, offset, flash->sector_size))
+	if (spi_flash_erase(flash, offset, flash->erasesize))
 		return "erase";
 	/* If it's a partial sector, copy the data into the temp-buffer */
-	if (len != flash->sector_size) {
+	if (len != flash->erasesize) {
 		memcpy(cmp_buf, buf, len);
 		ptr = cmp_buf;
 	}
 	/* Write one complete sector */
-	if (spi_flash_write(flash, offset, flash->sector_size, ptr))
+	if (spi_flash_write(flash, offset, flash->erasesize, ptr))
 		return "write";
 
 	return NULL;

@@ -223,12 +223,12 @@ static int spi_flash_update(struct spi_flash *flash, u32 offset,
 
 	if (end - buf >= 200)
 		scale = (end - buf) / 100;
-	cmp_buf = memalign(ARCH_DMA_MINALIGN, flash->sector_size);
+	cmp_buf = memalign(ARCH_DMA_MINALIGN, flash->erasesize);
 	if (cmp_buf) {
 		ulong last_update = get_timer(0);
 
 		for (; buf < end && !err_oper; buf += todo, offset += todo) {
-			todo = min_t(size_t, end - buf, flash->sector_size);
+			todo = min_t(size_t, end - buf, flash->erasesize);
 			if (get_timer(last_update) > 100) {
 				printf("   \rUpdating, %zu%% %lu B/s",
 				       100 - (end - buf) / scale,

index 9702eee..13e7f92 100644
@@ -25,8 +25,8 @@ static int dfu_read_medium_sf(struct dfu_entity *dfu, u64 offset, void *buf,
 
 static u64 find_sector(struct dfu_entity *dfu, u64 start, u64 offset)
 {
-	return (lldiv((start + offset), dfu->data.sf.dev->sector_size)) *
-		dfu->data.sf.dev->sector_size;
+	return (lldiv((start + offset), dfu->data.sf.dev->erasesize)) *
+		dfu->data.sf.dev->erasesize;
 }
 
 static int dfu_write_medium_sf(struct dfu_entity *dfu,

@@ -36,7 +36,7 @@ static int dfu_write_medium_sf(struct dfu_entity *dfu,
 
 	ret = spi_flash_erase(dfu->data.sf.dev,
 			      find_sector(dfu, dfu->data.sf.start, offset),
-			      dfu->data.sf.dev->sector_size);
+			      dfu->data.sf.dev->erasesize);
 	if (ret)
 		return ret;
 

@@ -123,7 +123,7 @@ int dfu_fill_entity_sf(struct dfu_entity *dfu, char *devstr, char *s)
 		return -ENODEV;
 
 	dfu->dev_type = DFU_DEV_SF;
-	dfu->max_buf_size = dfu->data.sf.dev->sector_size;
+	dfu->max_buf_size = dfu->data.sf.dev->erasesize;
 
 	st = strsep(&s, " ");
 	if (!strcmp(st, "raw")) {

index 0b9cb62..9a8302d 100644
@@ -93,7 +93,7 @@ int spi_flash_mtd_register(struct spi_flash *flash)
 
 	/* Only uniform flash devices for now */
 	sf_mtd_info.numeraseregions = 0;
-	sf_mtd_info.erasesize = flash->sector_size;
+	sf_mtd_info.erasesize = flash->erasesize;
 
 	return add_mtd_device(&sf_mtd_info);
 }

index 17eb0e9..891e1ec 100644
@@ -1091,9 +1091,6 @@ int spi_flash_scan(struct spi_flash *flash)
 		flash->erasesize = flash->sector_size;
 	}
 
-	/* Now erase size becomes valid sector size */
-	flash->sector_size = flash->erasesize;
-
 	/* Look for the fastest read cmd */
 	cmd = fls(params->e_rd_cmd & spi->mode_rx);
 	if (cmd) {

index c20c901..0fda27c 100644
@@ -280,7 +280,7 @@ static int do_spi_flash_read_write(int argc, char * const argv[])
 
 	/* Consistency checking */
 	if (offset + len > flash->size) {
-		printf("ERROR: attempting %s past flash size (%#x)\n",
+		printf("ERROR: attempting %s past flash size (%#llx)\n",
 		       argv[0], flash->size);
 		return 1;
 	}

@@ -336,7 +336,7 @@ static int do_spi_flash_erase(int argc, char * const argv[])
 
 	/* Consistency checking */
 	if (offset + size > flash->size) {
-		printf("ERROR: attempting %s past flash size (%#x)\n",
+		printf("ERROR: attempting %s past flash size (%#llx)\n",
 		       argv[0], flash->size);
 		return 1;
 	}

index c68df26..e4d1d78 100644
@@ -70,7 +70,7 @@ struct spi_flash {
 	u8 shift;
 	u16 flags;
 
-	u32 size;
+	uint64_t size;
 	u32 page_size;
 	u32 sector_size;
 	u32 erasesize;

index e4d1d78..9c8e52c 100644
@@ -12,6 +12,7 @@
 
 #include <dm.h>	/* Because we dereference struct udevice here */
 #include <linux/types.h>
+#include <linux/mtd/mtd.h>
 
 #ifndef CONFIG_SF_DEFAULT_SPEED
 # define CONFIG_SF_DEFAULT_SPEED	1000000

@@ -112,6 +113,39 @@ struct spi_flash {
 
 typedef struct mtd_info spi_flash_t;
 
+static inline int spi_flash_read(spi_flash_t *info, u32 offset,
+				 size_t len, void *buf)
+{
+	return mtd_read(info, offset, len, &len, (u_char *)buf);
+}
+
+static inline int spi_flash_write(spi_flash_t *info, u32 offset,
+				  size_t len, const void *buf)
+{
+	return mtd_write(info, offset, len, &len, (u_char *)buf);
+}
+
+static inline int spi_flash_erase(spi_flash_t *info, u32 offset, size_t len)
+{
+	struct erase_info instr;
+
+	instr.mtd = info;
+	instr.addr = offset;
+	instr.len = len;
+	instr.callback = 0;
+
+	return mtd_erase(info, &instr);
+}
+
+static inline int spi_flash_protect(spi_flash_t *info, u32 ofs,
+				    u32 len, bool prot)
+{
+	if (prot)
+		return mtd_lock(info, ofs, len);
+	else
+		return mtd_unlock(info, ofs, len);
+}
+
 #ifdef CONFIG_MTD_DM_SPI_NOR
 
 int spi_flash_probe_bus_cs(unsigned int busnum, unsigned int cs,

@@ -137,6 +171,20 @@ void spi_flash_free(spi_flash_t *flash);
 
 #endif /* CONFIG_MTD_DM_SPI_NOR */
 
+#else
+
+static inline int spi_flash_protect(struct spi_flash *flash, u32 ofs, u32 len,
+					bool prot)
+{
+	if (!flash->flash_lock || !flash->flash_unlock)
+		return -EOPNOTSUPP;
+
+	if (prot)
+		return flash->flash_lock(flash, ofs, len);
+	else
+		return flash->flash_unlock(flash, ofs, len);
+}
+
 #endif /* CONFIG_MTD_SPI_NOR */
 
 struct dm_spi_flash_ops {

@@ -259,18 +307,6 @@ static inline int spi_flash_erase(struct spi_flash *flash, u32 offset,
 }
 #endif
 
-static inline int spi_flash_protect(struct spi_flash *flash, u32 ofs, u32 len,
-					bool prot)
-{
-	if (!flash->flash_lock || !flash->flash_unlock)
-		return -EOPNOTSUPP;
-
-	if (prot)
-		return flash->flash_lock(flash, ofs, len);
-	else
-		return flash->flash_unlock(flash, ofs, len);
-}
-
 void spi_boot(void) __noreturn;
 void spi_spl_load_image(uint32_t offs, unsigned int size, void *vdst);
 

index 0fda27c..5dd7177 100644
@@ -19,7 +19,7 @@
 #include <asm/io.h>
 #include <dm/device-internal.h>
 
-static struct spi_flash *flash;
+static spi_flash_t *flash;
 
 /*
  * This function computes the length argument for the erase command.

@@ -89,7 +89,7 @@ static int do_spi_flash_probe(int argc, char * const argv[])
 	struct udevice *new, *bus_dev;
 	int ret;
 #else
-	struct spi_flash *new;
+	spi_flash_t *new;
 #endif
 
 	if (argc >= 2) {

@@ -166,7 +166,7 @@ static int do_spi_flash_probe(int argc, char * const argv[])
  * @param skipped	Count of skipped data (incremented by this function)
  * @return NULL if OK, else a string containing the stage which failed
  */
-static const char *spi_flash_update_block(struct spi_flash *flash, u32 offset,
+static const char *spi_flash_update_block(spi_flash_t *flash, u32 offset,
 		size_t len, const char *buf, char *cmp_buf, size_t *skipped)
 {
 	char *ptr = (char *)buf;

@@ -208,7 +208,7 @@ static const char *spi_flash_update_block(struct spi_flash *flash, u32 offset,
  * @param buf		buffer to write from
  * @return 0 if ok, 1 on error
  */
-static int spi_flash_update(struct spi_flash *flash, u32 offset,
+static int spi_flash_update(spi_flash_t *flash, u32 offset,
 		size_t len, const char *buf)
 {
 	const char *err_oper = NULL;

@@ -436,7 +436,7 @@ static void spi_test_next_stage(struct test_info *test)
  * @param vbuf		Verification buffer
  * @return 0 if ok, -1 on error
  */
-static int spi_flash_test(struct spi_flash *flash, uint8_t *buf, ulong len,
+static int spi_flash_test(spi_flash_t *flash, uint8_t *buf, ulong len,
 			   ulong offset, uint8_t *vbuf)
 {
 	struct test_info test;

index 6d5d847..cf909c0 100644
@@ -43,7 +43,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 char *env_name_spec = "SPI Flash";
 
-static struct spi_flash *env_flash;
+static spi_flash_t *env_flash;
 
 #if defined(CONFIG_ENV_OFFSET_REDUND)
 int saveenv(void)

index 9c8e52c..29c07f5 100644
@@ -173,6 +173,8 @@ void spi_flash_free(spi_flash_t *flash);
 
 #else
 
+typedef struct spi_flash spi_flash_t;
+
 static inline int spi_flash_protect(struct spi_flash *flash, u32 ofs, u32 len,
 					bool prot)
 {

index f0340a5..4aefe93 100644
@@ -24,31 +24,6 @@ struct m25p {
 #endif
 };
 
-static int spi_read_then_write(struct spi_slave *spi, const u8 *cmd,
-			       size_t cmd_len, const u8 *data_out,
-			       u8 *data_in, size_t data_len)
-{
-	unsigned long flags = SPI_XFER_BEGIN;
-	int ret;
-
-	if (data_len == 0)
-		flags |= SPI_XFER_END;
-
-	ret = spi_xfer(spi, cmd_len * 8, cmd, NULL, flags);
-	if (ret) {
-		debug("SF: Failed to send command (%zu bytes): %d\n",
-		      cmd_len, ret);
-	} else if (data_len != 0) {
-		ret = spi_xfer(spi, data_len * 8, data_out, data_in,
-					SPI_XFER_END);
-		if (ret)
-			debug("SF: Failed to transfer %zu bytes of data: %d\n",
-			      data_len, ret);
-	}
-
-	return ret;
-}
-
 static int m25p80_read_reg(struct spi_nor *nor, u8 cmd, u8 *val, int len)
 {
 	struct m25p *flash = nor->priv;

index 677c020..7728eac 100644
@@ -95,6 +95,31 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
 	return spi_get_ops(bus)->xfer(dev, bitlen, dout, din, flags);
 }
 
+int spi_read_then_write(struct spi_slave *spi, const u8 *cmd,
+			size_t cmd_len, const u8 *data_out,
+			u8 *data_in, size_t data_len)
+{
+	unsigned long flags = SPI_XFER_BEGIN;
+	int ret;
+
+	if (data_len == 0)
+		flags |= SPI_XFER_END;
+
+	ret = spi_xfer(spi, cmd_len * 8, cmd, NULL, flags);
+	if (ret) {
+		debug("spi: failed to send command (%zu bytes): %d\n",
+		      cmd_len, ret);
+	} else if (data_len != 0) {
+		ret = spi_xfer(spi, data_len * 8, data_out, data_in,
+			       SPI_XFER_END);
+		if (ret)
+			debug("spi: failed to transfer %zu bytes of data: %d\n",
+			      data_len, ret);
+	}
+
+	return ret;
+}
+
 static int spi_post_bind(struct udevice *dev)
 {
 	/* Scan the bus for devices */

index 7d81fbd..a050386 100644
@@ -39,6 +39,31 @@ void *spi_do_alloc_slave(int offset, int size, unsigned int bus,
 	return ptr;
 }
 
+int spi_read_then_write(struct spi_slave *spi, const u8 *cmd,
+			size_t cmd_len, const u8 *data_out,
+			u8 *data_in, size_t data_len)
+{
+	unsigned long flags = SPI_XFER_BEGIN;
+	int ret;
+
+	if (data_len == 0)
+		flags |= SPI_XFER_END;
+
+	ret = spi_xfer(spi, cmd_len * 8, cmd, NULL, flags);
+	if (ret) {
+		debug("spi: failed to send command (%zu bytes): %d\n",
+		      cmd_len, ret);
+	} else if (data_len != 0) {
+		ret = spi_xfer(spi, data_len * 8, data_out, data_in,
+					SPI_XFER_END);
+		if (ret)
+			debug("spi: failed to transfer %zu bytes of data: %d\n",
+			      data_len, ret);
+	}
+
+	return ret;
+}
+
 #ifdef CONFIG_OF_SPI
 struct spi_slave *spi_base_setup_slave_fdt(const void *blob, int busnum,
 					   int node)

index 4b88d39..19589aa 100644
@@ -265,6 +265,11 @@ int spi_set_wordlen(struct spi_slave *slave, unsigned int wordlen);
 int  spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
 		void *din, unsigned long flags);
 
+/* spi_write_then_read - SPI synchronous read followed by write */
+int spi_read_then_write(struct spi_slave *spi, const u8 *cmd,
+                        size_t cmd_len, const u8 *data_out,
+                        u8 *data_in, size_t data_len);
+
 /* Copy memory mapped data */
 void spi_flash_copy_mmap(void *data, void *offset, size_t len);
 

index 4aefe93..7e2702d 100644
@@ -39,7 +39,7 @@ static int m25p80_read_reg(struct spi_nor *nor, u8 cmd, u8 *val, int len)
 	if (nor->flags & SNOR_F_U_PAGE)
 		spi->flags |= SPI_XFER_U_PAGE;
 
-	ret = spi_read_then_write(spi, &cmd, 1, NULL, val, len);
+	ret = spi_write_then_read(spi, &cmd, 1, NULL, val, len);
 	if (ret < 0) {
 		debug("m25p80: error %d reading register %x\n", ret, cmd);
 		return ret;

@@ -65,7 +65,7 @@ static int m25p80_write_reg(struct spi_nor *nor, u8 cmd, u8 *buf, int len)
 	if (nor->flags & SNOR_F_U_PAGE)
 		spi->flags |= SPI_XFER_U_PAGE;
 
-	ret = spi_read_then_write(spi, &cmd, 1, buf, NULL, len);
+	ret = spi_write_then_read(spi, &cmd, 1, buf, NULL, len);
 	if (ret < 0) {
 		debug("m25p80: error %d writing register %x\n", ret, cmd);
 		return ret;

@@ -119,7 +119,7 @@ static int m25p80_read(struct spi_nor *nor, const u8 *cmd, size_t cmd_len,
 	if (nor->flags & SNOR_F_U_PAGE)
 		spi->flags |= SPI_XFER_U_PAGE;
 
-	ret = spi_read_then_write(spi, cmd, cmd_len, NULL, data, data_len);
+	ret = spi_write_then_read(spi, cmd, cmd_len, NULL, data, data_len);
 	if (ret < 0) {
 		debug("m25p80: error %d reading %x\n", ret, *cmd);
 		return ret;

@@ -146,7 +146,7 @@ static int m25p80_write(struct spi_nor *nor, const u8 *cmd, size_t cmd_len,
 	if (nor->flags & SNOR_F_U_PAGE)
 		spi->flags |= SPI_XFER_U_PAGE;
 
-	ret = spi_read_then_write(spi, cmd, cmd_len, data, NULL, data_len);
+	ret = spi_write_then_read(spi, cmd, cmd_len, data, NULL, data_len);
 	if (ret < 0) {
 		debug("m25p80: error %d writing %x\n", ret, *cmd);
 		return ret;

index 7728eac..0dfdd8b 100644
@@ -95,26 +95,25 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
 	return spi_get_ops(bus)->xfer(dev, bitlen, dout, din, flags);
 }
 
-int spi_read_then_write(struct spi_slave *spi, const u8 *cmd,
-			size_t cmd_len, const u8 *data_out,
-			u8 *data_in, size_t data_len)
+int spi_write_then_read(struct spi_slave *slave, const u8 *opcode,
+			size_t n_opcode, const u8 *txbuf, u8 *rxbuf,
+			size_t n_buf)
 {
 	unsigned long flags = SPI_XFER_BEGIN;
 	int ret;
 
-	if (data_len == 0)
+	if (n_buf == 0)
 		flags |= SPI_XFER_END;
 
-	ret = spi_xfer(spi, cmd_len * 8, cmd, NULL, flags);
+	ret = spi_xfer(slave, n_opcode * 8, opcode, NULL, flags);
 	if (ret) {
 		debug("spi: failed to send command (%zu bytes): %d\n",
-		      cmd_len, ret);
-	} else if (data_len != 0) {
-		ret = spi_xfer(spi, data_len * 8, data_out, data_in,
-			       SPI_XFER_END);
+		      n_opcode, ret);
+	} else if (n_buf != 0) {
+		ret = spi_xfer(slave, n_buf * 8, txbuf, rxbuf, SPI_XFER_END);
 		if (ret)
 			debug("spi: failed to transfer %zu bytes of data: %d\n",
-			      data_len, ret);
+			      n_buf, ret);
 	}
 
 	return ret;

index a050386..c8051f9 100644
@@ -39,26 +39,25 @@ void *spi_do_alloc_slave(int offset, int size, unsigned int bus,
 	return ptr;
 }
 
-int spi_read_then_write(struct spi_slave *spi, const u8 *cmd,
-			size_t cmd_len, const u8 *data_out,
-			u8 *data_in, size_t data_len)
+int spi_write_then_read(struct spi_slave *slave, const u8 *opcode,
+			size_t n_opcode, const u8 *txbuf, u8 *rxbuf,
+			size_t n_buf)
 {
 	unsigned long flags = SPI_XFER_BEGIN;
 	int ret;
 
-	if (data_len == 0)
+	if (n_buf == 0)
 		flags |= SPI_XFER_END;
 
-	ret = spi_xfer(spi, cmd_len * 8, cmd, NULL, flags);
+	ret = spi_xfer(slave, n_opcode * 8, opcode, NULL, flags);
 	if (ret) {
 		debug("spi: failed to send command (%zu bytes): %d\n",
-		      cmd_len, ret);
-	} else if (data_len != 0) {
-		ret = spi_xfer(spi, data_len * 8, data_out, data_in,
-					SPI_XFER_END);
+		      n_opcode, ret);
+	} else if (n_buf != 0) {
+		ret = spi_xfer(slave, n_buf * 8, txbuf, rxbuf, SPI_XFER_END);
 		if (ret)
 			debug("spi: failed to transfer %zu bytes of data: %d\n",
-			      data_len, ret);
+			      n_buf, ret);
 	}
 
 	return ret;

index 19589aa..dd0b11b 100644
@@ -265,10 +265,25 @@ int spi_set_wordlen(struct spi_slave *slave, unsigned int wordlen);
 int  spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
 		void *din, unsigned long flags);
 
-/* spi_write_then_read - SPI synchronous read followed by write */
-int spi_read_then_write(struct spi_slave *spi, const u8 *cmd,
-                        size_t cmd_len, const u8 *data_out,
-                        u8 *data_in, size_t data_len);
+/**
+ * spi_write_then_read - SPI synchronous write followed by read
+ *
+ * This performs a half duplex transaction in which the first transaction
+ * is to send the opcode and if the length of buf is non-zero then it start
+ * the second transaction as tx or rx based on the need from respective slave.
+ *
+ * @slave:	slave device with which opcode/data will be exchanged
+ * @opcode:	opcode used for specific transfer
+ * @n_opcode:	size of opcode, in bytes
+ * @txbuf:	buffer into which data to be written
+ * @rxbuf:	buffer into which data will be read
+ * @n_buf:	size of buf (whether it's [tx|rx]buf), in bytes
+ *
+ * Returns: 0 on success, not 0 on failure
+ */
+int spi_write_then_read(struct spi_slave *slave, const u8 *opcode,
+			size_t n_opcode, const u8 *txbuf, u8 *rxbuf,
+			size_t n_buf);
 
 /* Copy memory mapped data */
 void spi_flash_copy_mmap(void *data, void *offset, size_t len);

index b867ce9..130f7af 100644
@@ -181,7 +181,7 @@ static int spi_nor_wait_till_ready(struct spi_nor *nor, unsigned long timeout)
 	return -ETIMEDOUT;
 }
 
-#ifdef CONFIG_SPI_FLASH_BAR
+#ifdef CONFIG_SPI_NOR_BAR
 static int spi_nor_write_bar(struct spi_nor *nor, u32 offset)
 {
 	u8 bank_sel;

@@ -514,7 +514,7 @@ static int spi_nor_erase(struct mtd_info *mtd, struct erase_info *instr)
 		if (nor->dual > SNOR_DUAL_SINGLE)
 			spi_nor_dual(nor, &erase_addr);
 #endif
-#ifdef CONFIG_SPI_FLASH_BAR
+#ifdef CONFIG_SPI_NOR_BAR
 		ret = spi_nor_write_bar(nor, erase_addr);
 		if (ret < 0)
 			return ret;

@@ -577,7 +577,7 @@ static int spi_nor_write(struct mtd_info *mtd, loff_t offset, size_t len,
 		if (nor->dual > SNOR_DUAL_SINGLE)
 			spi_nor_dual(nor, &write_addr);
 #endif
-#ifdef CONFIG_SPI_FLASH_BAR
+#ifdef CONFIG_SPI_NOR_BAR
 		ret = spi_nor_write_bar(nor, write_addr);
 		if (ret < 0)
 			return ret;

@@ -647,7 +647,7 @@ static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len,
 		if (nor->dual > SNOR_DUAL_SINGLE)
 			spi_nor_dual(nor, &read_addr);
 #endif
-#ifdef CONFIG_SPI_FLASH_BAR
+#ifdef CONFIG_SPI_NOR_BAR
 		ret = spi_nor_write_bar(nor, read_addr);
 		if (ret < 0)
 			return ret;

@@ -1103,7 +1103,7 @@ int spi_nor_scan(struct spi_nor *nor)
 	}
 
 	/* Configure the BAR - discover bank cmds and read current bank */
-#ifdef CONFIG_SPI_FLASH_BAR
+#ifdef CONFIG_SPI_NOR_BAR
 	ret = spi_nor_read_bar(nor, info);
 	if (ret < 0)
 		return ret;

@@ -1127,13 +1127,13 @@ int spi_nor_scan(struct spi_nor *nor)
 	puts("\n");
 #endif
 
-#ifndef CONFIG_SPI_FLASH_BAR
+#ifndef CONFIG_SPI_NOR_BAR
 	if (((nor->dual == SNOR_DUAL_SINGLE) &&
 	     (mtd->size > SNOR_16MB_BOUN)) ||
 	     ((nor->dual > SNOR_DUAL_SINGLE) &&
 	     (mtd->size > SNOR_16MB_BOUN << 1))) {
 		puts("spi-nor: Warning - Only lower 16MiB accessible,");
-		puts(" Full access #define CONFIG_SPI_FLASH_BAR\n");
+		puts(" Full access #define CONFIG_SPI_NOR_BAR\n");
 	}
 #endif
 

90 lines not on this page · raw message

90 lines not on this page · raw message

index b915469..7c40245 100644
@@ -5,8 +5,8 @@
  */
 
 #include <common.h>
-#include <spi_flash.h>
 #include <malloc.h>
+#include <spi_flash.h>
 
 #define ESPI_BOOT_IMAGE_SIZE	0x48
 #define ESPI_BOOT_IMAGE_ADDR	0x50

index ca56fe9..285b6da 100644
@@ -10,9 +10,9 @@
  */
 
 #include <common.h>
+#include <errno.h>
 #include <spi.h>
 #include <spi_flash.h>
-#include <errno.h>
 #include <spl.h>
 
 #ifdef CONFIG_SPL_OS_BOOT

index 7c40245..93b0b2e 100644
@@ -14,7 +14,7 @@
 
 void spi_spl_load_image(uint32_t offs, unsigned int size, void *vdst)
 {
-	struct spi_flash *flash;
+	spi_flash_t *flash;
 
 	flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS,
 			CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE);

@@ -38,7 +38,7 @@ void spi_boot(void)
 #ifndef CONFIG_FSL_CORENET
 	unsigned char *buf = NULL;
 #endif
-	struct spi_flash *flash;
+	spi_flash_t *flash;
 
 	flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS,
 			CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE);

index 285b6da..9f33826 100644
@@ -20,8 +20,7 @@
  * Load the kernel, check for a valid header we can parse, and if found load
  * the kernel and then device tree.
  */
-static int spi_load_image_os(struct spi_flash *flash,
-			     struct image_header *header)
+static int spi_load_image_os(spi_flash_t *flash, struct image_header *header)
 {
 	/* Read for a header, parse or error out. */
 	spi_flash_read(flash, CONFIG_SYS_SPI_KERNEL_OFFS, 0x40,

@@ -52,7 +51,7 @@ static int spi_load_image_os(struct spi_flash *flash,
 int spl_spi_load_image(void)
 {
 	int err = 0;
-	struct spi_flash *flash;
+	spi_flash_t *flash;
 	struct image_header *header;
 
 	/*

index e8c3ef0..7427d22 100644
@@ -346,7 +346,7 @@
 #ifdef CONFIG_ZYNQ_QSPI
 #define CONFIG_SPL_SPI_SUPPORT
 #define CONFIG_SPL_SPI_LOAD
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
+#define CONFIG_SPL_SPI_NOR_SUPPORT
 #define CONFIG_SYS_SPI_U_BOOT_OFFS	0x100000
 #define CONFIG_SYS_SPI_ARGS_OFFS	0x200000
 #define CONFIG_SYS_SPI_ARGS_SIZE	0x80000

index 7427d22..582b2a3 100644
@@ -347,6 +347,7 @@
 #define CONFIG_SPL_SPI_SUPPORT
 #define CONFIG_SPL_SPI_LOAD
 #define CONFIG_SPL_SPI_NOR_SUPPORT
+#define CONFIG_SPL_MTD_SUPPORT
 #define CONFIG_SYS_SPI_U_BOOT_OFFS	0x100000
 #define CONFIG_SYS_SPI_ARGS_OFFS	0x200000
 #define CONFIG_SYS_SPI_ARGS_SIZE	0x80000

new file mode 100644
index 0000000..b2a56da
@@ -0,0 +1,701 @@
+/*
+ *
+ * Atmel DataFlash probing
+ *
+ * Copyright (C) 2004-2009, 2015 Freescale Semiconductor, Inc.
+ * Haikun Wang (haikun.wang at freescale.com)
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+*/
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <fdtdec.h>
+#include <spi.h>
+#include <spi_flash.h>
+#include <div64.h>
+#include <linux/err.h>
+#include <linux/math64.h>
+
+#include "sf_internal.h"
+
+/* reads can bypass the buffers */
+#define OP_READ_CONTINUOUS	0xE8
+#define OP_READ_PAGE		0xD2
+
+/* group B requests can run even while status reports "busy" */
+#define OP_READ_STATUS		0xD7	/* group B */
+
+/* move data between host and buffer */
+#define OP_READ_BUFFER1		0xD4	/* group B */
+#define OP_READ_BUFFER2		0xD6	/* group B */
+#define OP_WRITE_BUFFER1	0x84	/* group B */
+#define OP_WRITE_BUFFER2	0x87	/* group B */
+
+/* erasing flash */
+#define OP_ERASE_PAGE		0x81
+#define OP_ERASE_BLOCK		0x50
+
+/* move data between buffer and flash */
+#define OP_TRANSFER_BUF1	0x53
+#define OP_TRANSFER_BUF2	0x55
+#define OP_MREAD_BUFFER1	0xD4
+#define OP_MREAD_BUFFER2	0xD6
+#define OP_MWERASE_BUFFER1	0x83
+#define OP_MWERASE_BUFFER2	0x86
+#define OP_MWRITE_BUFFER1	0x88	/* sector must be pre-erased */
+#define OP_MWRITE_BUFFER2	0x89	/* sector must be pre-erased */
+
+/* write to buffer, then write-erase to flash */
+#define OP_PROGRAM_VIA_BUF1	0x82
+#define OP_PROGRAM_VIA_BUF2	0x85
+
+/* compare buffer to flash */
+#define OP_COMPARE_BUF1		0x60
+#define OP_COMPARE_BUF2		0x61
+
+/* read flash to buffer, then write-erase to flash */
+#define OP_REWRITE_VIA_BUF1	0x58
+#define OP_REWRITE_VIA_BUF2	0x59
+
+/*
+ * newer chips report JEDEC manufacturer and device IDs; chip
+ * serial number and OTP bits; and per-sector writeprotect.
+ */
+#define OP_READ_ID		0x9F
+#define OP_READ_SECURITY	0x77
+#define OP_WRITE_SECURITY_REVC	0x9A
+#define OP_WRITE_SECURITY	0x9B	/* revision D */
+
+
+struct dataflash {
+	uint8_t			command[16];
+	unsigned short		page_offset;	/* offset in flash address */
+};
+
+/*
+ * Return the status of the DataFlash device.
+ */
+static inline int dataflash_status(struct spi_slave *spi)
+{
+	int ret;
+	u8 status;
+	/*
+	 * NOTE:  at45db321c over 25 MHz wants to write
+	 * a dummy byte after the opcode...
+	 */
+	ret = spi_flash_cmd(spi, OP_READ_STATUS, &status, 1);
+	return ret ? -EIO : status;
+}
+
+/*
+ * Poll the DataFlash device until it is READY.
+ * This usually takes 5-20 msec or so; more for sector erase.
+ * ready: return > 0
+ */
+static int dataflash_waitready(struct spi_slave *spi)
+{
+	int status;
+	int timeout = 2 * CONFIG_SYS_HZ;
+	int timebase;
+
+	timebase = get_timer(0);
+	do {
+		status = dataflash_status(spi);
+		if (status < 0)
+			status = 0;
+
+		if (status & (1 << 7))	/* RDY/nBSY */
+			return status;
+
+		mdelay(3);
+	} while (get_timer(timebase) < timeout);
+
+	return -ETIME;
+}
+
+/*
+ * Erase pages of flash.
+ */
+static int spi_dataflash_erase(struct udevice *dev, u32 offset, size_t len)
+{
+	struct dataflash	*dataflash;
+	struct spi_flash	*spi_flash;
+	struct spi_slave	*spi;
+	unsigned		blocksize;
+	uint8_t			*command;
+	uint32_t		rem;
+	int			status;
+
+	dataflash = dev_get_priv(dev);
+	spi_flash = dev_get_uclass_priv(dev);
+	spi = spi_flash->spi;
+
+	blocksize = spi_flash->page_size << 3;
+
+	memset(dataflash->command, 0 , sizeof(dataflash->command));
+	command = dataflash->command;
+
+	debug("%s: erase addr=0x%x len 0x%x\n", dev->name, offset, len);
+
+	div_u64_rem(len, spi_flash->page_size, &rem);
+	if (rem)
+		return -EINVAL;
+	div_u64_rem(offset, spi_flash->page_size, &rem);
+	if (rem)
+		return -EINVAL;
+
+	status = spi_claim_bus(spi);
+	if (status) {
+		debug("SPI DATAFLASH: unable to claim SPI bus\n");
+		return status;
+	}
+
+	while (len > 0) {
+		unsigned int	pageaddr;
+		int		do_block;
+		/*
+		 * Calculate flash page address; use block erase (for speed) if
+		 * we're at a block boundary and need to erase the whole block.
+		 */
+		pageaddr = div_u64(offset, spi_flash->page_size);
+		do_block = (pageaddr & 0x7) == 0 && len >= blocksize;
+		pageaddr = pageaddr << dataflash->page_offset;
+
+		command[0] = do_block ? OP_ERASE_BLOCK : OP_ERASE_PAGE;
+		command[1] = (uint8_t)(pageaddr >> 16);
+		command[2] = (uint8_t)(pageaddr >> 8);
+		command[3] = 0;
+
+		debug("%s ERASE %s: (%x) %x %x %x [%d]\n",
+		      dev->name, do_block ? "block" : "page",
+		      command[0], command[1], command[2], command[3],
+		      pageaddr);
+
+		status = spi_flash_cmd_write(spi, command, 4, NULL, 0);
+		if (status < 0) {
+			debug("%s: erase send command error!\n", dev->name);
+			return -EIO;
+		}
+
+		status = dataflash_waitready(spi);
+		if (status < 0) {
+			debug("%s: erase waitready error!\n", dev->name);
+			return status;
+		}
+
+		if (do_block) {
+			offset += blocksize;
+			len -= blocksize;
+		} else {
+			offset += spi_flash->page_size;
+			len -= spi_flash->page_size;
+		}
+	}
+
+	spi_release_bus(spi);
+
+	return 0;
+}
+
+/*
+ * Read from the DataFlash device.
+ *   offset : Start offset in flash device
+ *   len    : Amount to read
+ *   buf    : Buffer containing the data
+ */
+static int spi_dataflash_read(struct udevice *dev, u32 offset, size_t len,
+			      void *buf)
+{
+	struct dataflash	*dataflash;
+	struct spi_flash	*spi_flash;
+	struct spi_slave	*spi;
+	unsigned int		addr;
+	uint8_t			*command;
+	int			status;
+
+	dataflash = dev_get_priv(dev);
+	spi_flash = dev_get_uclass_priv(dev);
+	spi = spi_flash->spi;
+
+	memset(dataflash->command, 0 , sizeof(dataflash->command));
+	command = dataflash->command;
+
+	debug("%s: erase addr=0x%x len 0x%x\n", dev->name, offset, len);
+	debug("READ: (%x) %x %x %x\n",
+	      command[0], command[1], command[2], command[3]);
+
+	/* Calculate flash page/byte address */
+	addr = (((unsigned)offset / spi_flash->page_size)
+	       << dataflash->page_offset)
+	       + ((unsigned)offset % spi_flash->page_size);
+
+	status = spi_claim_bus(spi);
+	if (status) {
+		debug("SPI DATAFLASH: unable to claim SPI bus\n");
+		return status;
+	}
+
+	/*
+	 * Continuous read, max clock = f(car) which may be less than
+	 * the peak rate available.  Some chips support commands with
+	 * fewer "don't care" bytes.  Both buffers stay unchanged.
+	 */
+	command[0] = OP_READ_CONTINUOUS;
+	command[1] = (uint8_t)(addr >> 16);
+	command[2] = (uint8_t)(addr >> 8);
+	command[3] = (uint8_t)(addr >> 0);
+
+	/* plus 4 "don't care" bytes, command len: 4 + 4 "don't care" bytes */
+	status = spi_flash_cmd_read(spi, command, 8, buf, len);
+
+	spi_release_bus(spi);
+
+	return status;
+}
+
+/*
+ * Write to the DataFlash device.
+ *   offset     : Start offset in flash device
+ *   len    : Amount to write
+ *   buf    : Buffer containing the data
+ */
+int spi_dataflash_write(struct udevice *dev, u32 offset, size_t len,
+			const void *buf)
+{
+	struct dataflash	*dataflash;
+	struct spi_flash	*spi_flash;
+	struct spi_slave	*spi;
+	uint8_t			*command;
+	unsigned int		pageaddr, addr, to, writelen;
+	size_t			remaining = len;
+	u_char			*writebuf = (u_char *)buf;
+	int			status = -EINVAL;
+
+	dataflash = dev_get_priv(dev);
+	spi_flash = dev_get_uclass_priv(dev);
+	spi = spi_flash->spi;
+
+	memset(dataflash->command, 0 , sizeof(dataflash->command));
+	command = dataflash->command;
+
+	debug("%s: write 0x%x..0x%x\n", dev->name, offset, (offset + len));
+
+	pageaddr = ((unsigned)offset / spi_flash->page_size);
+	to = ((unsigned)offset % spi_flash->page_size);
+	if (to + len > spi_flash->page_size)
+		writelen = spi_flash->page_size - to;
+	else
+		writelen = len;
+
+	status = spi_claim_bus(spi);
+	if (status) {
+		debug("SPI DATAFLASH: unable to claim SPI bus\n");
+		return status;
+	}
+
+	while (remaining > 0) {
+		debug("write @ %d:%d len=%d\n", pageaddr, to, writelen);
+
+		/*
+		 * REVISIT:
+		 * (a) each page in a sector must be rewritten at least
+		 *     once every 10K sibling erase/program operations.
+		 * (b) for pages that are already erased, we could
+		 *     use WRITE+MWRITE not PROGRAM for ~30% speedup.
+		 * (c) WRITE to buffer could be done while waiting for
+		 *     a previous MWRITE/MWERASE to complete ...
+		 * (d) error handling here seems to be mostly missing.
+		 *
+		 * Two persistent bits per page, plus a per-sector counter,
+		 * could support (a) and (b) ... we might consider using
+		 * the second half of sector zero, which is just one block,
+		 * to track that state.  (On AT91, that sector should also
+		 * support boot-from-DataFlash.)
+		 */
+
+		addr = pageaddr << dataflash->page_offset;
+
+		/* (1) Maybe transfer partial page to Buffer1 */
+		if (writelen != spi_flash->page_size) {
+			command[0] = OP_TRANSFER_BUF1;
+			command[1] = (addr & 0x00FF0000) >> 16;
+			command[2] = (addr & 0x0000FF00) >> 8;
+			command[3] = 0;
+
+			debug("TRANSFER: (%x) %x %x %x\n",
+			      command[0], command[1], command[2], command[3]);
+
+			status = spi_flash_cmd_write(spi, command, 4, NULL, 0);
+			if (status < 0) {
+				debug("%s: write(<pagesize) command error!\n",
+				      dev->name);
+				return -EIO;
+			}
+
+			status = dataflash_waitready(spi);
+			if (status < 0) {
+				debug("%s: write(<pagesize) waitready error!\n",
+				      dev->name);
+				return status;
+			}
+		}
+
+		/* (2) Program full page via Buffer1 */
+		addr += to;
+		command[0] = OP_PROGRAM_VIA_BUF1;
+		command[1] = (addr & 0x00FF0000) >> 16;
+		command[2] = (addr & 0x0000FF00) >> 8;
+		command[3] = (addr & 0x000000FF);
+
+		debug("PROGRAM: (%x) %x %x %x\n",
+		      command[0], command[1], command[2], command[3]);
+
+		status = spi_flash_cmd_write(spi, command,
+					     4, writebuf, writelen);
+		if (status < 0) {
+			debug("%s: write send command error!\n", dev->name);
+			return -EIO;
+		}
+
+		status = dataflash_waitready(spi);
+		if (status < 0) {
+			debug("%s: write waitready error!\n", dev->name);
+			return status;
+		}
+
+#ifdef CONFIG_SPI_DATAFLASH_WRITE_VERIFY
+		/* (3) Compare to Buffer1 */
+		addr = pageaddr << dataflash->page_offset;
+		command[0] = OP_COMPARE_BUF1;
+		command[1] = (addr & 0x00FF0000) >> 16;
+		command[2] = (addr & 0x0000FF00) >> 8;
+		command[3] = 0;
+
+		debug("COMPARE: (%x) %x %x %x\n",
+		      command[0], command[1], command[2], command[3]);
+
+		status = spi_flash_cmd_write(spi, command,
+					     4, writebuf, writelen);
+		if (status < 0) {
+			debug("%s: write(compare) send command error!\n",
+			      dev->name);
+			return -EIO;
+		}
+
+		status = dataflash_waitready(spi);
+
+		/* Check result of the compare operation */
+		if (status & (1 << 6)) {
+			printf("SPI DataFlash: write compare page %u, err %d\n",
+			       pageaddr, status);
+			remaining = 0;
+			status = -EIO;
+			break;
+		} else {
+			status = 0;
+		}
+
+#endif	/* CONFIG_SPI_DATAFLASH_WRITE_VERIFY */
+		remaining = remaining - writelen;
+		pageaddr++;
+		to = 0;
+		writebuf += writelen;
+
+		if (remaining > spi_flash->page_size)
+			writelen = spi_flash->page_size;
+		else
+			writelen = remaining;
+	}
+
+	spi_release_bus(spi);
+
+	return 0;
+}
+
+static int add_dataflash(struct udevice *dev, char *name, int nr_pages,
+			     int pagesize, int pageoffset, char revision)
+{
+	struct spi_flash *spi_flash;
+	struct dataflash *dataflash;
+
+	dataflash = dev_get_priv(dev);
+	spi_flash = dev_get_uclass_priv(dev);
+
+	dataflash->page_offset = pageoffset;
+
+	spi_flash->name = name;
+	spi_flash->page_size = pagesize;
+	spi_flash->size = nr_pages * pagesize;
+	spi_flash->erase_size = pagesize;
+
+#ifndef CONFIG_SPL_BUILD
+	printf("SPI DataFlash: Detected %s with page size ", spi_flash->name);
+	print_size(spi_flash->page_size, ", erase size ");
+	print_size(spi_flash->erase_size, ", total ");
+	print_size(spi_flash->size, "");
+	printf(", revision %c", revision);
+	puts("\n");
+#endif
+
+	return 0;
+}
+
+struct flash_info {
+	char		*name;
+
+	/*
+	 * JEDEC id has a high byte of zero plus three data bytes:
+	 * the manufacturer id, then a two byte device id.
+	 */
+	uint32_t	jedec_id;
+
+	/* The size listed here is what works with OP_ERASE_PAGE. */
+	unsigned	nr_pages;
+	uint16_t	pagesize;
+	uint16_t	pageoffset;
+
+	uint16_t	flags;
+#define SUP_POW2PS	0x0002		/* supports 2^N byte pages */
+#define IS_POW2PS	0x0001		/* uses 2^N byte pages */
+};
+
+static struct flash_info dataflash_data[] = {
+	/*
+	 * NOTE:  chips with SUP_POW2PS (rev D and up) need two entries,
+	 * one with IS_POW2PS and the other without.  The entry with the
+	 * non-2^N byte page size can't name exact chip revisions without
+	 * losing backwards compatibility for cmdlinepart.
+	 *
+	 * Those two entries have different name spelling format in order to
+	 * show their difference obviously.
+	 * The upper case refer to the chip isn't in normal 2^N bytes page-size
+	 * mode.
+	 * The lower case refer to the chip is in normal 2^N bytes page-size
+	 * mode.
+	 *
+	 * These newer chips also support 128-byte security registers (with
+	 * 64 bytes one-time-programmable) and software write-protection.
+	 */
+	{ "AT45DB011B",  0x1f2200, 512, 264, 9, SUP_POW2PS},
+	{ "at45db011d",  0x1f2200, 512, 256, 8, SUP_POW2PS | IS_POW2PS},
+
+	{ "AT45DB021B",  0x1f2300, 1024, 264, 9, SUP_POW2PS},
+	{ "at45db021d",  0x1f2300, 1024, 256, 8, SUP_POW2PS | IS_POW2PS},
+
+	{ "AT45DB041x",  0x1f2400, 2048, 264, 9, SUP_POW2PS},
+	{ "at45db041d",  0x1f2400, 2048, 256, 8, SUP_POW2PS | IS_POW2PS},
+
+	{ "AT45DB081B",  0x1f2500, 4096, 264, 9, SUP_POW2PS},
+	{ "at45db081d",  0x1f2500, 4096, 256, 8, SUP_POW2PS | IS_POW2PS},
+
+	{ "AT45DB161x",  0x1f2600, 4096, 528, 10, SUP_POW2PS},
+	{ "at45db161d",  0x1f2600, 4096, 512, 9, SUP_POW2PS | IS_POW2PS},
+
+	{ "AT45DB321x",  0x1f2700, 8192, 528, 10, 0},		/* rev C */
+
+	{ "AT45DB321x",  0x1f2701, 8192, 528, 10, SUP_POW2PS},
+	{ "at45db321d",  0x1f2701, 8192, 512, 9, SUP_POW2PS | IS_POW2PS},
+
+	{ "AT45DB642x",  0x1f2800, 8192, 1056, 11, SUP_POW2PS},
+	{ "at45db642d",  0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS},
+};
+
+static struct flash_info *jedec_probe(struct spi_slave *spi, u8 *id)
+{
+	int			tmp;
+	uint32_t		jedec;
+	struct flash_info	*info;
+	int status;
+
+	/*
+	 * JEDEC also defines an optional "extended device information"
+	 * string for after vendor-specific data, after the three bytes
+	 * we use here.  Supporting some chips might require using it.
+	 *
+	 * If the vendor ID isn't Atmel's (0x1f), assume this call failed.
+	 * That's not an error; only rev C and newer chips handle it, and
+	 * only Atmel sells these chips.
+	 */
+	if (id[0] != 0x1f)
+		return NULL;
+
+	jedec = id[0];
+	jedec = jedec << 8;
+	jedec |= id[1];
+	jedec = jedec << 8;
+	jedec |= id[2];
+
+	for (tmp = 0, info = dataflash_data;
+			tmp < ARRAY_SIZE(dataflash_data);
+			tmp++, info++) {
+		if (info->jedec_id == jedec) {
+			if (info->flags & SUP_POW2PS) {
+				status = dataflash_status(spi);
+				if (status < 0) {
+					debug("SPI DataFlash: status error %d\n",
+					      status);
+					return NULL;
+				}
+				if (status & 0x1) {
+					if (info->flags & IS_POW2PS)
+						return info;
+				} else {
+					if (!(info->flags & IS_POW2PS))
+						return info;
+				}
+			} else {
+				return info;
+			}
+		}
+	}
+
+	/*
+	 * Treat other chips as errors ... we won't know the right page
+	 * size (it might be binary) even when we can tell which density
+	 * class is involved (legacy chip id scheme).
+	 */
+	printf("SPI DataFlash: Unsupported flash IDs: ");
+	printf("manuf %02x, jedec %04x, ext_jedec %04x\n",
+	       id[0], jedec, id[3] << 8 | id[4]);
+	return NULL;
+}
+
+/*
+ * Detect and initialize DataFlash device, using JEDEC IDs on newer chips
+ * or else the ID code embedded in the status bits:
+ *
+ *   Device      Density         ID code          #Pages PageSize  Offset
+ *   AT45DB011B  1Mbit   (128K)  xx0011xx (0x0c)    512    264      9
+ *   AT45DB021B  2Mbit   (256K)  xx0101xx (0x14)   1024    264      9
+ *   AT45DB041B  4Mbit   (512K)  xx0111xx (0x1c)   2048    264      9
+ *   AT45DB081B  8Mbit   (1M)    xx1001xx (0x24)   4096    264      9
+ *   AT45DB0161B 16Mbit  (2M)    xx1011xx (0x2c)   4096    528     10
+ *   AT45DB0321B 32Mbit  (4M)    xx1101xx (0x34)   8192    528     10
+ *   AT45DB0642  64Mbit  (8M)    xx111xxx (0x3c)   8192   1056     11
+ *   AT45DB1282  128Mbit (16M)   xx0100xx (0x10)  16384   1056     11
+ */
+static int spi_dataflash_probe(struct udevice *dev)
+{
+	struct spi_slave *spi = dev_get_parent_priv(dev);
+	struct spi_flash *spi_flash;
+	struct flash_info *info;
+	u8 idcode[5];
+	int ret, status = 0;
+
+	spi_flash = dev_get_uclass_priv(dev);
+	spi_flash->dev = dev;
+
+	ret = spi_claim_bus(spi);
+	if (ret)
+		return ret;
+
+	ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
+	if (ret) {
+		printf("SPI DataFlash: Failed to get idcodes\n");
+		goto err_read_cmd;
+	}
+
+	/*
+	 * Try to detect dataflash by JEDEC ID.
+	 * If it succeeds we know we have either a C or D part.
+	 * D will support power of 2 pagesize option.
+	 * Both support the security register, though with different
+	 * write procedures.
+	 */
+	info = jedec_probe(spi, idcode);
+	if (info != NULL)
+		add_dataflash(dev, info->name, info->nr_pages,
+			      info->pagesize, info->pageoffset,
+			      (info->flags & SUP_POW2PS) ? 'd' : 'c');
+	else {
+		/*
+		* Older chips support only legacy commands, identifing
+		* capacity using bits in the status byte.
+		*/
+		status = dataflash_status(spi);
+		if (status <= 0 || status == 0xff) {
+			printf("SPI DataFlash: read status error %d\n", status);
+			if (status == 0 || status == 0xff)
+				status = -ENODEV;
+			goto err_read_cmd;
+		}
+		/*
+		* if there's a device there, assume it's dataflash.
+		* board setup should have set spi->max_speed_max to
+		* match f(car) for continuous reads, mode 0 or 3.
+		*/
+		switch (status & 0x3c) {
+		case 0x0c:	/* 0 0 1 1 x x */
+			status = add_dataflash(dev, "AT45DB011B",
+					       512, 264, 9, 0);
+			break;
+		case 0x14:	/* 0 1 0 1 x x */
+			status = add_dataflash(dev, "AT45DB021B",
+					       1024, 264, 9, 0);
+			break;
+		case 0x1c:	/* 0 1 1 1 x x */
+			status = add_dataflash(dev, "AT45DB041x",
+					       2048, 264, 9, 0);
+			break;
+		case 0x24:	/* 1 0 0 1 x x */
+			status = add_dataflash(dev, "AT45DB081B",
+					       4096, 264, 9, 0);
+			break;
+		case 0x2c:	/* 1 0 1 1 x x */
+			status = add_dataflash(dev, "AT45DB161x",
+					       4096, 528, 10, 0);
+			break;
+		case 0x34:	/* 1 1 0 1 x x */
+			status = add_dataflash(dev, "AT45DB321x",
+					       8192, 528, 10, 0);
+			break;
+		case 0x38:	/* 1 1 1 x x x */
+		case 0x3c:
+			status = add_dataflash(dev, "AT45DB642x",
+					       8192, 1056, 11, 0);
+			break;
+		/* obsolete AT45DB1282 not (yet?) supported */
+		default:
+			dev_info(&spi->dev, "unsupported device (%x)\n",
+				 status & 0x3c);
+			status = -ENODEV;
+			goto err_read_cmd;
+		}
+	}
+
+	/* Assign spi data */
+	spi_flash->spi = spi;
+	spi_flash->memory_map = spi->memory_map;
+	spi_flash->dual_flash = spi->option;
+
+	spi_release_bus(spi);
+
+	return 0;
+
+err_read_cmd:
+	spi_release_bus(spi);
+
+	return status;
+}
+
+static const struct dm_spi_flash_ops spi_dataflash_ops = {
+	.read = spi_dataflash_read,
+	.write = spi_dataflash_write,
+	.erase = spi_dataflash_erase,
+};
+
+static const struct udevice_id spi_dataflash_ids[] = {
+	{ .compatible = "atmel,at45", },
+	{ .compatible = "atmel,dataflash", },
+	{ }
+};
+
+U_BOOT_DRIVER(spi_dataflash) = {
+	.name		= "spi_dataflash",
+	.id		= UCLASS_SPI_FLASH,
+	.of_match	= spi_dataflash_ids,
+	.probe		= spi_dataflash_probe,
+	.priv_auto_alloc_size = sizeof(struct dataflash),
+	.ops		= &spi_dataflash_ops,
+};