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Patch "drm/radeon: Fix "slow" audio over DP on DCE8+" has been added to the 4.4-stable tree

PATCH [email protected] 1 participant 1 message Mar 1, 2016

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Stable branch DRM drivers Radeon and amdgpu DRM drivers
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This is a note to let you know that I've just added the patch titled

drm/radeon: Fix "slow" audio over DP on DCE8+

to the 4.4-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
drm-radeon-fix-slow-audio-over-dp-on-dce8.patch
and it can be found in the queue-4.4 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.

Quoted 1 line

From ac4a9350abddc51ccb897abf0d9f3fd592b97e0b Mon Sep 17 00:00:00 2001

From: Slava Grigorev <[email protected]>
Date: Thu, 17 Dec 2015 11:09:58 -0500
Subject: drm/radeon: Fix "slow" audio over DP on DCE8+

From: Slava Grigorev <[email protected]>

commit ac4a9350abddc51ccb897abf0d9f3fd592b97e0b upstream.

DP audio is derived from the dfs clock.

Signed-off-by Slava Grigorev <[email protected]>
Reviewed-by Alex Deucher <[email protected]>
Signed-off-by Greg Kroah-Hartman <[email protected]>
---
 drivers/gpu/drm/radeon/dce6_afmt.c       |   16 ++++++++++++++++
 drivers/gpu/drm/radeon/radeon.h          |    1 +
 drivers/gpu/drm/radeon/radeon_atombios.c |    7 +++++++
 drivers/gpu/drm/radeon/sid.h             |    5 +++++
 4 files changed, 29 insertions(+)
drivers/gpu/drm/radeon/dce6_afmt.c +16 -0
@@ -301,6 +301,22 @@ void dce6_dp_audio_set_dto(struct radeon
 	 * is the numerator, DCCG_AUDIO_DTOx_MODULE is the denominator
 	 */
 	if (ASIC_IS_DCE8(rdev)) {
+		unsigned int div = (RREG32(DENTIST_DISPCLK_CNTL) &
+			DENTIST_DPREFCLK_WDIVIDER_MASK) >>
+			DENTIST_DPREFCLK_WDIVIDER_SHIFT;
+
+		if (div < 128 && div >= 96)
+			div -= 64;
+		else if (div >= 64)
+			div = div / 2 - 16;
+		else if (div >= 8)
+			div /= 4;
+		else
+			div = 0;
+
+		if (div)
+			clock = rdev->clock.gpupll_outputfreq * 10 / div;
+
 		WREG32(DCE8_DCCG_AUDIO_DTO1_PHASE, 24000);
 		WREG32(DCE8_DCCG_AUDIO_DTO1_MODULE, clock);
 	} else {
drivers/gpu/drm/radeon/radeon.h +1 -0
@@ -268,6 +268,7 @@ struct radeon_clock {
 	uint32_t current_dispclk;
 	uint32_t dp_extclk;
 	uint32_t max_pixel_clock;
+	uint32_t gpupll_outputfreq;
 };
 
 /*
drivers/gpu/drm/radeon/radeon_atombios.c +7 -0
@@ -1263,6 +1263,13 @@ bool radeon_atom_get_clock_info(struct d
 		rdev->mode_info.firmware_flags =
 			le16_to_cpu(firmware_info->info.usFirmwareCapability.susAccess);
 
+		if (ASIC_IS_DCE8(rdev)) {
+			rdev->clock.gpupll_outputfreq =
+				le32_to_cpu(firmware_info->info_22.ulGPUPLL_OutputFreq);
+			if (rdev->clock.gpupll_outputfreq == 0)
+				rdev->clock.gpupll_outputfreq = 360000;	/* 3.6 GHz */
+		}
+
 		return true;
 	}
drivers/gpu/drm/radeon/sid.h +5 -0
@@ -915,6 +915,11 @@
 #define DCCG_AUDIO_DTO1_PHASE                           0x05c0
 #define DCCG_AUDIO_DTO1_MODULE                          0x05c4
 
+#define DENTIST_DISPCLK_CNTL				0x0490
+#	define DENTIST_DPREFCLK_WDIVIDER(x)		(((x) & 0x7f) << 24)
+#	define DENTIST_DPREFCLK_WDIVIDER_MASK		(0x7f << 24)
+#	define DENTIST_DPREFCLK_WDIVIDER_SHIFT		24
+
 #define AFMT_AUDIO_SRC_CONTROL                          0x713c
 #define		AFMT_AUDIO_SRC_SELECT(x)		(((x) & 7) << 0)
 /* AFMT_AUDIO_SRC_SELECT

Patches currently in stable-queue which might be from [email protected] are

queue-4.4/drm-radeon-fix-dp-audio-support-for-apu-with-dce4.1-display-engine.patch queue-4.4/drm-radeon-cleaned-up-vco-output-settings-for-dp-audio.patch queue-4.4/drm-radeon-fix-slow-audio-over-dp-on-dce8.patch queue-4.4/drm-radeon-add-a-common-function-for-dfs-handling.patch