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turbostat updates available for upstream

PATCH New Len Brown 1 participant 8 messages Apr 6, 2016

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Len Brown

author maintainer
#0 lore raw

cover turbostat updates available for upstream

Couple of bug fixes, and add some model#'s to work properly on some newer platforms.

These patches:

[PATCH 1/7] tools/power turbostat: SGX state should print only if [PATCH 2/7] tools/power turbostat: print IRTL MSRs
[PATCH 3/7] tools/power turbostat: initial BXT support [PATCH 4/7] tools/power turbostat: decode BXT TSC frequency via CPUID [PATCH 5/7] tools/power turbostat: initial SKX support [PATCH 6/7] tools/power turbostat: initial KBL support [PATCH 7/7] tools/power turbostat: work around RC6 counter wrap

are available on this git branch:

git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux.git turbostat

Please let me know if you see troubles with any of them.

thanks,
Len Brown, Intel Open Source Technology Center

author maintainer
#1 lore raw

PATCH 1/7 tools/power turbostat: SGX state should print only if --debug

From: Len Brown <[email protected]>

The CPUID.SGX bit was printed, even if --debug was used

---
 tools/power/x86/turbostat/turbostat.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
tools/power/x86/turbostat/turbostat.c +1 -1
index 20a257a..f7616f3 100644
@@ -3187,7 +3187,7 @@ void process_cpuid()
 	if (debug)
 		decode_misc_enable_msr();
 
-	if (max_level >= 0x7) {
+	if (max_level >= 0x7 && debug) {
 		int has_sgx;
 
 		ecx = 0;
Signature · 1 line
2.8.0.rc4.16.g56331f8
author maintainer
#2 lore raw

PATCH 2/7 tools/power turbostat: print IRTL MSRs

In reply to Len Brown

From: Len Brown <[email protected]>

Some processors use the Interrupt Response Time Limit (IRTL) MSR value to describe the maximum IRQ response time latency for deep package C-states. (Though others have the register, but do not use it) Lets print it out to give insight into the cases where it is used.

IRTL begain in SNB, with PC3/PC6/PC7, and HSW added PC8/PC9/PC10.

---
 arch/x86/include/asm/msr-index.h      |  8 +++++
 tools/power/x86/turbostat/turbostat.c | 59 +++++++++++++++++++++++++++++++++--
 2 files changed, 64 insertions(+), 3 deletions(-)
arch/x86/include/asm/msr-index.h +8 -0
index 2da46ac..1e81927 100644
@@ -167,6 +167,14 @@
 #define MSR_PKG_C9_RESIDENCY		0x00000631
 #define MSR_PKG_C10_RESIDENCY		0x00000632
 
+/* Interrupt Response Limit */
+#define MSR_PKGC3_IRTL			0x0000060a
+#define MSR_PKGC6_IRTL			0x0000060b
+#define MSR_PKGC7_IRTL			0x0000060c
+#define MSR_PKGC8_IRTL			0x00000633
+#define MSR_PKGC9_IRTL			0x00000634
+#define MSR_PKGC10_IRTL			0x00000635
+
 /* Run Time Average Power Limiting (RAPL) Interface */
 
 #define MSR_RAPL_POWER_UNIT		0x00000606
tools/power/x86/turbostat/turbostat.c +56 -3

94 lines not on this page · raw message

Signature · 1 line
2.8.0.rc4.16.g56331f8
author maintainer
#3 lore raw

PATCH 3/7 tools/power turbostat: initial BXT support

In reply to Len Brown

From: Len Brown <[email protected]>

Broxton has a lot in common with SKL

---
 tools/power/x86/turbostat/turbostat.c | 9 +++++++++
 1 file changed, 9 insertions(+)
tools/power/x86/turbostat/turbostat.c +9 -0
index 2d5a27f..1561ac5 100644
@@ -1298,6 +1298,7 @@ int hsw_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S,
 int slv_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
 int amt_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
 int phi_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
+int bxt_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
 
 
 static void
@@ -2199,6 +2200,9 @@ int probe_nhm_msrs(unsigned int family, unsigned int model)
 	case 0x57:	/* PHI */
 		pkg_cstate_limits = phi_pkg_cstate_limits;
 		break;
+	case 0x5C:	/* BXT */
+		pkg_cstate_limits = bxt_pkg_cstate_limits;
+		break;
 	default:
 		return 0;
 	}
@@ -2628,6 +2632,9 @@ void rapl_probe(unsigned int family, unsigned int model)
 	case 0x47:	/* BDW */
 		do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO;
 		break;
+	case 0x5C:	/* BXT */
+		do_rapl = RAPL_PKG | RAPL_PKG_POWER_INFO;
+		break;
 	case 0x4E:	/* SKL */
 	case 0x5E:	/* SKL */
 		do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
@@ -2914,6 +2921,7 @@ int has_snb_msrs(unsigned int family, unsigned int model)
 	case 0x56:	/* BDX-DE */
 	case 0x4E:	/* SKL */
 	case 0x5E:	/* SKL */
+	case 0x5C:	/* BXT */
 		return 1;
 	}
 	return 0;
@@ -2941,6 +2949,7 @@ int has_hsw_msrs(unsigned int family, unsigned int model)
 	case 0x3D:	/* BDW */
 	case 0x4E:	/* SKL */
 	case 0x5E:	/* SKL */
+	case 0x5C:	/* BXT */
 		return 1;
 	}
 	return 0;
Signature · 1 line
2.8.0.rc4.16.g56331f8
author maintainer
#4 lore raw

PATCH 4/7 tools/power turbostat: decode BXT TSC frequency via CPUID

In reply to Len Brown

From: Len Brown <[email protected]>

Hard-code BXT ART to 19200MHz, so turbostat --debug can fully enumerate TSC:

CPUID(0x15): eax_crystal: 3 ebx_tsc: 186 ecx_crystal_hz: 0
TSC: 1190 MHz (19200000 Hz * 186 / 3 / 1000000)

---
 tools/power/x86/turbostat/turbostat.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)
tools/power/x86/turbostat/turbostat.c +4 -1
index 1561ac5..751bbcb 100644
@@ -3278,7 +3278,10 @@ void process_cpuid()
 				switch(model) {
 				case 0x4E:	/* SKL */
 				case 0x5E:	/* SKL */
-					crystal_hz = 24000000;	/* 24 MHz */
+					crystal_hz = 24000000;	/* 24.0 MHz */
+					break;
+				case 0x5C:	/* BXT */
+					crystal_hz = 19200000;	/* 19.2 MHz */
 					break;
 				default:
 					crystal_hz = 0;
Signature · 1 line
2.8.0.rc4.16.g56331f8
author maintainer
#5 lore raw

PATCH 5/7 tools/power turbostat: initial SKX support

In reply to Len Brown

From: Len Brown <[email protected]>

SKX has a lot in common with HSX

---
 tools/power/x86/turbostat/turbostat.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)
tools/power/x86/turbostat/turbostat.c +8 -1
index 751bbcb..4950cdf 100644
@@ -2188,6 +2188,7 @@ int probe_nhm_msrs(unsigned int family, unsigned int model)
 	case 0x56:	/* BDX-DE */
 	case 0x4E:	/* SKL */
 	case 0x5E:	/* SKL */
+	case 0x55:	/* SKX */
 		pkg_cstate_limits = hsw_pkg_cstate_limits;
 		break;
 	case 0x37:	/* BYT */
@@ -2295,6 +2296,7 @@ int has_config_tdp(unsigned int family, unsigned int model)
 	case 0x56:	/* BDX-DE */
 	case 0x4E:	/* SKL */
 	case 0x5E:	/* SKL */
+	case 0x55:	/* SKX */
 
 	case 0x57:	/* Knights Landing */
 		return 1;
@@ -2642,6 +2644,7 @@ void rapl_probe(unsigned int family, unsigned int model)
 	case 0x3F:	/* HSX */
 	case 0x4F:	/* BDX */
 	case 0x56:	/* BDX-DE */
+	case 0x55:	/* SKX */
 	case 0x57:	/* KNL */
 		do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
 		break;
@@ -2921,6 +2924,7 @@ int has_snb_msrs(unsigned int family, unsigned int model)
 	case 0x56:	/* BDX-DE */
 	case 0x4E:	/* SKL */
 	case 0x5E:	/* SKL */
+	case 0x55:	/* SKX */
 	case 0x5C:	/* BXT */
 		return 1;
 	}
@@ -3280,6 +3284,9 @@ void process_cpuid()
 				case 0x5E:	/* SKL */
 					crystal_hz = 24000000;	/* 24.0 MHz */
 					break;
+				case 0x55:	/* SKX */
+					crystal_hz = 25000000;	/* 25.0 MHz */
+					break;
 				case 0x5C:	/* BXT */
 					crystal_hz = 19200000;	/* 19.2 MHz */
 					break;
@@ -3694,7 +3701,7 @@ int get_and_dump_counters(void)
 }
 
 void print_version() {
-	fprintf(outf, "turbostat version 4.11 27 Feb 2016"
+	fprintf(outf, "turbostat version 4.12 5 Apr 2016"
 		" - Len Brown <[email protected]>\n");
 }
 
Signature · 1 line
2.8.0.rc4.16.g56331f8
author maintainer
#6 lore raw

PATCH 6/7 tools/power turbostat: initial KBL support

In reply to Len Brown

From: Len Brown <[email protected]>

KBL is similar to SKL

---
 tools/power/x86/turbostat/turbostat.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)
tools/power/x86/turbostat/turbostat.c +14 -0
index 4950cdf..e3b803b 100644
@@ -2188,6 +2188,8 @@ int probe_nhm_msrs(unsigned int family, unsigned int model)
 	case 0x56:	/* BDX-DE */
 	case 0x4E:	/* SKL */
 	case 0x5E:	/* SKL */
+	case 0x8E:	/* KBL */
+	case 0x9E:	/* KBL */
 	case 0x55:	/* SKX */
 		pkg_cstate_limits = hsw_pkg_cstate_limits;
 		break;
@@ -2296,6 +2298,8 @@ int has_config_tdp(unsigned int family, unsigned int model)
 	case 0x56:	/* BDX-DE */
 	case 0x4E:	/* SKL */
 	case 0x5E:	/* SKL */
+	case 0x8E:	/* KBL */
+	case 0x9E:	/* KBL */
 	case 0x55:	/* SKX */
 
 	case 0x57:	/* Knights Landing */
@@ -2639,6 +2643,8 @@ void rapl_probe(unsigned int family, unsigned int model)
 		break;
 	case 0x4E:	/* SKL */
 	case 0x5E:	/* SKL */
+	case 0x8E:	/* KBL */
+	case 0x9E:	/* KBL */
 		do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
 		break;
 	case 0x3F:	/* HSX */
@@ -2924,6 +2930,8 @@ int has_snb_msrs(unsigned int family, unsigned int model)
 	case 0x56:	/* BDX-DE */
 	case 0x4E:	/* SKL */
 	case 0x5E:	/* SKL */
+	case 0x8E:	/* KBL */
+	case 0x9E:	/* KBL */
 	case 0x55:	/* SKX */
 	case 0x5C:	/* BXT */
 		return 1;
@@ -2953,6 +2961,8 @@ int has_hsw_msrs(unsigned int family, unsigned int model)
 	case 0x3D:	/* BDW */
 	case 0x4E:	/* SKL */
 	case 0x5E:	/* SKL */
+	case 0x8E:	/* KBL */
+	case 0x9E:	/* KBL */
 	case 0x5C:	/* BXT */
 		return 1;
 	}
@@ -2975,6 +2985,8 @@ int has_skl_msrs(unsigned int family, unsigned int model)
 	switch (model) {
 	case 0x4E:	/* SKL */
 	case 0x5E:	/* SKL */
+	case 0x8E:	/* KBL */
+	case 0x9E:	/* KBL */
 		return 1;
 	}
 	return 0;
@@ -3282,6 +3294,8 @@ void process_cpuid()
 				switch(model) {
 				case 0x4E:	/* SKL */
 				case 0x5E:	/* SKL */
+				case 0x8E:	/* KBL */
+				case 0x9E:	/* KBL */
 					crystal_hz = 24000000;	/* 24.0 MHz */
 					break;
 				case 0x55:	/* SKX */
Signature · 1 line
2.8.0.rc4.16.g56331f8
author maintainer
#7 lore raw

PATCH 7/7 tools/power turbostat: work around RC6 counter wrap

In reply to Len Brown

From: Len Brown <[email protected]>

Sometimes the rc6 sysfs counter spontaneously resets, causing turbostat prints a very large number
as it tries to calcuate % = 100 * (old - new) / interval

When we see (old > new), print ***.**% instead
of a bogus huge number.

Note that this detection is not fool-proof, as the counter could reset several times and still result in new > old.

---
 tools/power/x86/turbostat/turbostat.c | 19 +++++++++++++++----
 1 file changed, 15 insertions(+), 4 deletions(-)
tools/power/x86/turbostat/turbostat.c +15 -4
index e3b803b..acbf7ff 100644
@@ -189,7 +189,7 @@ struct pkg_data {
 	unsigned long long pkg_any_core_c0;
 	unsigned long long pkg_any_gfxe_c0;
 	unsigned long long pkg_both_core_gfxe_c0;
-	unsigned long long gfx_rc6_ms;
+	long long gfx_rc6_ms;
 	unsigned int gfx_mhz;
 	unsigned int package_id;
 	unsigned int energy_pkg;	/* MSR_PKG_ENERGY_STATUS */
@@ -623,8 +623,14 @@ int format_counters(struct thread_data *t, struct core_data *c,
 		outp += sprintf(outp, "%8d", p->pkg_temp_c);
 
 	/* GFXrc6 */
-	if (do_gfx_rc6_ms)
-		outp += sprintf(outp, "%8.2f", 100.0 * p->gfx_rc6_ms / 1000.0 / interval_float);
+	if (do_gfx_rc6_ms) {
+		if (p->gfx_rc6_ms == -1) {	/* detect counter reset */
+			outp += sprintf(outp, "  ***.**");
+		} else {
+			outp += sprintf(outp, "%8.2f",
+				p->gfx_rc6_ms / 10.0 / interval_float);
+		}
+	}
 
 	/* GFXMHz */
 	if (do_gfx_mhz)
@@ -768,7 +774,12 @@ delta_package(struct pkg_data *new, struct pkg_data *old)
 	old->pc10 = new->pc10 - old->pc10;
 	old->pkg_temp_c = new->pkg_temp_c;
 
-	old->gfx_rc6_ms = new->gfx_rc6_ms - old->gfx_rc6_ms;
+	/* flag an error when rc6 counter resets/wraps */
+	if (old->gfx_rc6_ms >  new->gfx_rc6_ms)
+		old->gfx_rc6_ms = -1;
+	else
+		old->gfx_rc6_ms = new->gfx_rc6_ms - old->gfx_rc6_ms;
+
 	old->gfx_mhz = new->gfx_mhz;
 
 	DELTA_WRAP32(new->energy_pkg, old->energy_pkg);
Signature · 1 line
2.8.0.rc4.16.g56331f8