Fixes / cleanups in dw_dmac (affects on few subsystems)

PATCH Superseded Andy Shevchenko 1 participant 6 messages Apr 21, 2016

Subsystems (2)

dmaengine Synopsys DesignWare DMAC driver

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Andy Shevchenko

author reviewer

2016-04-21 15:04 UTC #0 lore raw

v4 cover Fixes / cleanups in dw_dmac (affects on few subsystems)

This patch series (v3: http://www.spinics.net/lists/kernel/msg2215303.html)
contains a number of mostly minor fixes and cleanups for the DW DMA driver. A couple of them affect the DT binding so these may need to be updated to maintain compatibility (old format is still supported though). The rest should be relatively straight-forward.

This version has been tested on the following bare metal platforms:
- ATNGW100 (avr32 based platform) with dmatest
- Sam460ex (powerpc 44x based platform) with SATA
- Intel Braswell with UART
- Intel Galileo (Intel Quark based platform) with UART

(SATA driver and Intel Galileo UART support are based on this series and not
available in upstream yet)

Vinod, there are few patch sets developed on top of this one, so, the idea is to keep this in an immuutable branch / tag.

Changes since v2:
- add patch 1 to fix master selection which was broken for long time
- remove "use field-by-field initialization" patch since like Mans metioned in has mostly no value and even might increase error prone
- rebase on top of recent linux-next
- wide testing on several platforms

Changes since v1:
- zeroing struct dw_dma_slave before use
- fall back to old data_width property if data-width is not found
- append tags for few patches
- correct title of cover letter
- rebase on top of recent linux-next

Andy Shevchenko (4):
dmaengine: dw: keep copy of custom slave config in dwc
dmaengine: dw: provide probe(), remove() stubs for users
dmaengine: dw: set polarity of handshake interface
dmaengine: dw: override LLP support if asked in platform data

 drivers/dma/dw/core.c                | 41 +++++++++++++++++-------------------
 drivers/dma/dw/regs.h                |  5 +----
 include/linux/dma/dw.h               |  5 +++++
 include/linux/platform_data/dma-dw.h |  4 ++++
 4 files changed, 29 insertions(+), 26 deletions(-)

Signature · 1 line

2.8.0.rc3

Andy Shevchenko

author reviewer

2016-04-21 15:03 UTC #1 lore raw

PATCH v4 1/4 dmaengine: dw: keep copy of custom slave config in dwc

It seems we need to extend custom slave configuration by one more member to support Intel Quart UART. It becomes a burden to manage all members of struct dw_dma_slave one-by-one.

Replace set of fields by embedding struct dw_dma_slave into struct dw_dma_chan.

Signed-off-by Andy Shevchenko <[email protected]>

---
 drivers/dma/dw/core.c | 29 ++++++++++-------------------
 drivers/dma/dw/regs.h |  5 +----
 2 files changed, 11 insertions(+), 23 deletions(-)

drivers/dma/dw/core.c +10 ~~-19~~

index edf053f..81b06df 100644
@@ -46,9 +46,9 @@
 		u8 _dmsize = _is_slave ? _sconfig->dst_maxburst :	\
 			DW_DMA_MSIZE_16;			\
 		u8 _dms = (_dwc->direction == DMA_MEM_TO_DEV) ?		\
-			_dwc->p_master : _dwc->m_master;		\
+			_dwc->dws.p_master : _dwc->dws.m_master;	\
 		u8 _sms = (_dwc->direction == DMA_DEV_TO_MEM) ?		\
-			_dwc->p_master : _dwc->m_master;		\
+			_dwc->dws.p_master : _dwc->dws.m_master;	\
 								\
 		(DWC_CTLL_DST_MSIZE(_dmsize)			\
 		 | DWC_CTLL_SRC_MSIZE(_smsize)			\

@@ -147,8 +147,8 @@ static void dwc_initialize(struct dw_dma_chan *dwc)
 	if (test_bit(DW_DMA_IS_INITIALIZED, &dwc->flags))
 		return;
 
-	cfghi |= DWC_CFGH_DST_PER(dwc->dst_id);
-	cfghi |= DWC_CFGH_SRC_PER(dwc->src_id);
+	cfghi |= DWC_CFGH_DST_PER(dwc->dws.dst_id);
+	cfghi |= DWC_CFGH_SRC_PER(dwc->dws.src_id);
 
 	channel_writel(dwc, CFG_LO, cfglo);
 	channel_writel(dwc, CFG_HI, cfghi);

@@ -209,7 +209,7 @@ static inline void dwc_do_single_block(struct dw_dma_chan *dwc,
 static void dwc_dostart(struct dw_dma_chan *dwc, struct dw_desc *first)
 {
 	struct dw_dma	*dw = to_dw_dma(dwc->chan.device);
-	u8		lms = DWC_LLP_LMS(dwc->m_master);
+	u8		lms = DWC_LLP_LMS(dwc->dws.m_master);
 	unsigned long	was_soft_llp;
 
 	/* ASSERT:  channel is idle */

@@ -662,7 +662,7 @@ dwc_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
 	struct dw_desc		*prev;
 	size_t			xfer_count;
 	size_t			offset;
-	u8			m_master = dwc->m_master;
+	u8			m_master = dwc->dws.m_master;
 	unsigned int		src_width;
 	unsigned int		dst_width;
 	unsigned int		data_width = dw->pdata->data_width[m_master];

@@ -740,7 +740,7 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
 	struct dw_desc		*prev;
 	struct dw_desc		*first;
 	u32			ctllo;
-	u8			m_master = dwc->m_master;
+	u8			m_master = dwc->dws.m_master;
 	u8			lms = DWC_LLP_LMS(m_master);
 	dma_addr_t		reg;
 	unsigned int		reg_width;

@@ -895,12 +895,7 @@ bool dw_dma_filter(struct dma_chan *chan, void *param)
 		return false;
 
 	/* We have to copy data since dws can be temporary storage */
-
-	dwc->src_id = dws->src_id;
-	dwc->dst_id = dws->dst_id;
-
-	dwc->m_master = dws->m_master;
-	dwc->p_master = dws->p_master;
+	memcpy(&dwc->dws, dws, sizeof(struct dw_dma_slave));
 
 	return true;
 }

@@ -1167,11 +1162,7 @@ static void dwc_free_chan_resources(struct dma_chan *chan)
 	spin_lock_irqsave(&dwc->lock, flags);
 
 	/* Clear custom channel configuration */
-	dwc->src_id = 0;
-	dwc->dst_id = 0;
-
-	dwc->m_master = 0;
-	dwc->p_master = 0;
+	memset(&dwc->dws, 0, sizeof(struct dw_dma_slave));
 
 	clear_bit(DW_DMA_IS_INITIALIZED, &dwc->flags);

@@ -1264,7 +1255,7 @@ struct dw_cyclic_desc *dw_dma_cyclic_prep(struct dma_chan *chan,
 	struct dw_cyclic_desc		*retval = NULL;
 	struct dw_desc			*desc;
 	struct dw_desc			*last = NULL;
-	u8				lms = DWC_LLP_LMS(dwc->m_master);
+	u8				lms = DWC_LLP_LMS(dwc->dws.m_master);
 	unsigned long			was_cyclic;
 	unsigned int			reg_width;
 	unsigned int			periods;

drivers/dma/dw/regs.h +1 -4

index 4b7bd78..f65dd10 100644
@@ -245,10 +245,7 @@ struct dw_dma_chan {
 	bool			nollp;
 
 	/* custom slave configuration */
-	u8			src_id;
-	u8			dst_id;
-	u8			m_master;
-	u8			p_master;
+	struct dw_dma_slave	dws;
 
 	/* configuration passed via .device_config */
 	struct dma_slave_config dma_sconfig;

Signature · 1 line

2.8.0.rc3

Andy Shevchenko

author reviewer

2016-04-21 15:03 UTC #2 lore raw

PATCH v4 2/4 dmaengine: dw: provide probe(), remove() stubs for users

In reply to Andy Shevchenko

Some users consider DMA optional, thus when driver is not compiled we shouldn't prevent compilation of the users. Add stubs for dw_dma_probe() and dw_dma_remove().

Signed-off-by Andy Shevchenko <[email protected]>

---
 include/linux/dma/dw.h | 5 +++++
 1 file changed, 5 insertions(+)

include/linux/dma/dw.h +5 -0

index f2e538a..ccfd0c3 100644
@@ -40,8 +40,13 @@ struct dw_dma_chip {
 };
 
 /* Export to the platform drivers */
+#if IS_ENABLED(CONFIG_DW_DMAC_CORE)
 int dw_dma_probe(struct dw_dma_chip *chip);
 int dw_dma_remove(struct dw_dma_chip *chip);
+#else
+static inline int dw_dma_probe(struct dw_dma_chip *chip) { return -ENODEV; }
+static inline int dw_dma_remove(struct dw_dma_chip *chip) { return 0; }
+#endif /* CONFIG_DW_DMAC_CORE */
 
 /* DMA API extensions */
 struct dw_desc;

Signature · 1 line

2.8.0.rc3

Andy Shevchenko

author reviewer

2016-04-21 15:03 UTC #3 lore raw

PATCH v4 3/4 dmaengine: dw: set polarity of handshake interface

In reply to Andy Shevchenko

Intel Quark UART uses DesignWare DMA IP. Though the DMA IP is connected in such way that handshake interface uses inverted polarity. We have to provide a possibility to set this in the DMA driver when configuring a channel.

Introduce a new member of custom slave configuration called 'polarity' and set active low polarity in case this value is 'true'.

Signed-off-by Andy Shevchenko <[email protected]>

---
 drivers/dma/dw/core.c                | 2 ++
 include/linux/platform_data/dma-dw.h | 2 ++
 2 files changed, 4 insertions(+)

drivers/dma/dw/core.c +2 -0

index 81b06df..9c7bc7a 100644
@@ -150,6 +150,8 @@ static void dwc_initialize(struct dw_dma_chan *dwc)
 	cfghi |= DWC_CFGH_DST_PER(dwc->dws.dst_id);
 	cfghi |= DWC_CFGH_SRC_PER(dwc->dws.src_id);
 
+	cfglo |= dwc->dws.polarity ? DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL : 0;
+
 	channel_writel(dwc, CFG_LO, cfglo);
 	channel_writel(dwc, CFG_HI, cfghi);

include/linux/platform_data/dma-dw.h +2 -0

index d15d8ba..192f3a2 100644
@@ -23,6 +23,7 @@
  * @dst_id:	dst request line
  * @m_master:	memory master for transfers on allocated channel
  * @p_master:	peripheral master for transfers on allocated channel
+ * @polarity:	set active low polarity of handshake interface
  */
 struct dw_dma_slave {
 	struct device		*dma_dev;

@@ -30,6 +31,7 @@ struct dw_dma_slave {
 	u8			dst_id;
 	u8			m_master;
 	u8			p_master;
+	bool			polarity;
 };
 
 /**

Signature · 1 line

2.8.0.rc3

Andy Shevchenko

author reviewer

2016-04-21 15:04 UTC #4 lore raw

PATCH v4 4/4 dmaengine: dw: override LLP support if asked in platform data

In reply to Andy Shevchenko

There is at least one known device, i.e. UART on Intel Galileo, that works unreliably in case of use of multi block transfer support in DMA mode.

Override autodetection by user provided data.

Signed-off-by Andy Shevchenko <[email protected]>

---
 drivers/dma/dw/core.c                | 10 +++++++---
 include/linux/platform_data/dma-dw.h |  2 ++
 2 files changed, 9 insertions(+), 3 deletions(-)

drivers/dma/dw/core.c +7 -3

index 9c7bc7a..f66d104 100644
@@ -1571,9 +1571,13 @@ int dw_dma_probe(struct dw_dma_chip *chip)
 			dwc->block_size = pdata->block_size;
 
 			/* Check if channel supports multi block transfer */
-			channel_writel(dwc, LLP, DWC_LLP_LOC(0xffffffff));
-			dwc->nollp = DWC_LLP_LOC(channel_readl(dwc, LLP)) == 0;
-			channel_writel(dwc, LLP, 0);
+			if (pdata->is_nollp) {
+				dwc->nollp = pdata->is_nollp;
+			} else {
+				channel_writel(dwc, LLP, DWC_LLP_LOC(0xffffffff));
+				dwc->nollp = DWC_LLP_LOC(channel_readl(dwc, LLP)) == 0;
+				channel_writel(dwc, LLP, 0);
+			}
 		}
 	}

include/linux/platform_data/dma-dw.h +2 -0

index 192f3a2..ec7f7d3 100644
@@ -40,6 +40,7 @@ struct dw_dma_slave {
  * @is_private: The device channels should be marked as private and not for
  *	by the general purpose DMA channel allocator.
  * @is_memcpy: The device channels do support memory-to-memory transfers.
+ * @is_nollp: The device channels does not support multi block transfers.
  * @chan_allocation_order: Allocate channels starting from 0 or 7
  * @chan_priority: Set channel priority increasing from 0 to 7 or 7 to 0.
  * @block_size: Maximum block size supported by the controller

@@ -51,6 +52,7 @@ struct dw_dma_platform_data {
 	unsigned int	nr_channels;
 	bool		is_private;
 	bool		is_memcpy;
+	bool		is_nollp;
 #define CHAN_ALLOCATION_ASCENDING	0	/* zero to seven */
 #define CHAN_ALLOCATION_DESCENDING	1	/* seven to zero */
 	unsigned char	chan_allocation_order;

Signature · 1 line

2.8.0.rc3

Andy Shevchenko

author reviewer

2016-04-21 15:05 UTC #5 lore raw

In reply to Andy Shevchenko

Quoted 9 lines · Andy Shevchenko

This patch series (v3: http://www.spinics.net/lists/kernel/msg2215303.
html)
contains a number of mostly minor fixes and cleanups for the DW DMA driver. A
couple of them affect the DT binding so these may need to be updated to
maintain compatibility (old format is still supported though). The rest should
be relatively straight-forward.

Oops, wrong set and no changelog.
Please ignore this version.

Quoted 43 lines

This version has been tested on the following bare metal platforms:
- ATNGW100 (avr32 based platform) with dmatest
- Sam460ex (powerpc 44x based platform) with SATA
- Intel Braswell with UART
- Intel Galileo (Intel Quark based platform) with UART
(SATA driver and Intel Galileo UART support are based on this series and not
available in upstream yet)
Vinod, there are few patch sets developed on top of this one, so, the idea is
to keep this in an immuutable branch / tag.
Changes since v2:
- add patch 1 to fix master selection which was broken for long time
- remove "use field-by-field initialization" patch since like Mans metioned in
has mostly no value and even might increase error prone
- rebase on top of recent linux-next
- wide testing on several platforms
Changes since v1:
- zeroing struct dw_dma_slave before use
- fall back to old data_width property if data-width is not found
- append tags for few patches
- correct title of cover letter
- rebase on top of recent linux-next
Andy Shevchenko (4):
dmaengine: dw: keep copy of custom slave config in dwc
dmaengine: dw: provide probe(), remove() stubs for users
dmaengine: dw: set polarity of handshake interface
dmaengine: dw: override LLP support if asked in platform data
drivers/dma/dw/core.c | 41 +++++++++++++++++--------
-----------
drivers/dma/dw/regs.h | 5 +---- include/linux/dma/dw.h | 5 +++++ include/linux/platform_data/dma-dw.h | 4 ++++
 4 files changed, 29 insertions(+), 26 deletions(-)

Signature · 2 lines

Andy Shevchenko <[email protected]>
Intel Finland Oy