Skip to contentSkip to conversation

ARM: dts: lpc32xx: nonfunctional updates to ea3250 and phy3250 dts

PATCH New Vladimir Zapolskiy 2 participants 10 messages Apr 26, 2016 – Apr 27, 2016

Subsystems (2)
lore
Share & tools
lore
#0 lore raw

v2 cover ARM: dts: lpc32xx: nonfunctional updates to ea3250 and phy3250 dts

The change updates DTS files of PHY3250 and EA3250 boards powered by NXP LPC3250 SoC:
* flatten board DTS files by exploiting device node labels,
* add 'partitions' device node for MTD OF,
* correct Atmel vendor prefix,
* rename board DTS files by adding SoC name prefix.

The change is wanted to have to prevent similar issues on copy-paste in case if more DTS files for LPC32xx boards are submitted.

No functional changes are intended.

Changes from v1 to v2:
* on move of NAND partitions to a 'partitions' subnode added missing 'compatible = "fixed-partitions";' properties,
* since file renaming closes two subseries of changes, rebased the rest on top the changes above,
* added Acked-by tag to the changes acknowledged by Sylvain.

Thanks to Sylvain for review and finding an issue which is by the way seems to be a checkpatch's false negative.

v1 of the changeset can be found here:

http://www.spinics.net/lists/devicetree/msg124209.html

Vladimir Zapolskiy (7):
ARM: dts: lpc32xx: ea3250: avoid extension of device nodes by absolute path
ARM: dts: lpc32xx: ea3250: add NAND partitions device node
ARM: dts: lpc32xx: ea3250: fix Atmel at24 eeprom vendor
ARM: dts: lpc32xx: ea3250: add SoC name prefix to board dts file
ARM: dts: lpc32xx: phy3250: avoid extension of device nodes by absolute path
ARM: dts: lpc32xx: phy3250: add NAND partitions device node
ARM: dts: lpc32xx: phy3250: add SoC name prefix to board dts file

 arch/arm/boot/dts/Makefile                         |   3 +-
 .../boot/dts/{ea3250.dts => lpc3250-ea3250.dts}    | 230 ++++++++---------
 .../boot/dts/{phy3250.dts => lpc3250-phy3250.dts}  | 286 ++++++++++-----------
 3 files changed, 258 insertions(+), 261 deletions(-)
 rename arch/arm/boot/dts/{ea3250.dts => lpc3250-ea3250.dts} (61%)
 rename arch/arm/boot/dts/{phy3250.dts => lpc3250-phy3250.dts} (43%)
Signature · 1 line
2.1.4
#1 lore raw

PATCH v2 1/7 ARM: dts: lpc32xx: ea3250: avoid extension of device nodes by absolute path

The change simplifies layout of EA3250 board description by referencing device nodes of LPC32xx controllers by label.

No functional change intended.

---
Changes from v1 to v2:
* added Sylvain's acked-by.

 arch/arm/boot/dts/ea3250.dts | 226 +++++++++++++++++++++----------------------
 1 file changed, 110 insertions(+), 116 deletions(-)
arch/arm/boot/dts/ea3250.dts +110 -116
index a4a281f..7cf815a 100644
@@ -25,119 +25,6 @@
 		reg = <0x80000000 0x4000000>;
 	};
 
-	ahb {
-		mac: ethernet at 31060000 {
-			phy-mode = "rmii";
-			use-iram;
-		};
-
-		/* 128MB Flash via SLC NAND controller */
-		slc: flash at 20020000 {
-			status = "okay";
-			#address-cells = <1>;
-			#size-cells = <1>;
-
-			nxp,wdr-clks = <14>;
-			nxp,wwidth = <260000000>;
-			nxp,whold = <104000000>;
-			nxp,wsetup = <200000000>;
-			nxp,rdr-clks = <14>;
-			nxp,rwidth = <34666666>;
-			nxp,rhold = <104000000>;
-			nxp,rsetup = <200000000>;
-			nand-on-flash-bbt;
-			gpios = <&gpio 5 19 1>; /* GPO_P3 19, active low */
-
-			mtd0 at 00000000 {
-				label = "ea3250-boot";
-				reg = <0x00000000 0x00080000>;
-				read-only;
-			};
-
-			mtd1 at 00080000 {
-				label = "ea3250-uboot";
-				reg = <0x00080000 0x000c0000>;
-				read-only;
-			};
-
-			mtd2 at 00140000 {
-				label = "ea3250-kernel";
-				reg = <0x00140000 0x00400000>;
-			};
-
-			mtd3 at 00540000 {
-				label = "ea3250-rootfs";
-				reg = <0x00540000 0x07ac0000>;
-			};
-		};
-
-		apb {
-			uart5: serial at 40090000 {
-				status = "okay";
-			};
-
-			uart3: serial at 40080000 {
-				status = "okay";
-			};
-
-			uart6: serial at 40098000 {
-				status = "okay";
-			};
-
-			i2c1: i2c at 400A0000 {
-				clock-frequency = <100000>;
-
-				eeprom at 50 {
-					compatible = "at,24c256";
-					reg = <0x50>;
-				};
-
-				eeprom at 57 {
-					compatible = "at,24c64";
-					reg = <0x57>;
-				};
-
-				uda1380: uda1380 at 18 {
-					compatible = "nxp,uda1380";
-					reg = <0x18>;
-					power-gpio = <&gpio 0x59 0>;
-					reset-gpio = <&gpio 0x51 0>;
-					dac-clk = "wspll";
-				};
-
-				pca9532: pca9532 at 60 {
-					compatible = "nxp,pca9532";
-					gpio-controller;
-					#gpio-cells = <2>;
-					reg = <0x60>;
-				};
-			};
-
-			i2c2: i2c at 400A8000 {
-				clock-frequency = <100000>;
-			};
-
-			sd at 20098000 {
-				wp-gpios = <&pca9532 5 0>;
-				cd-gpios = <&pca9532 4 0>;
-				cd-inverted;
-				bus-width = <4>;
-				status = "okay";
-			};
-		};
-
-		fab {
-			uart1: serial at 40014000 {
-				status = "okay";
-			};
-
-			/* 3-axis accelerometer X,Y,Z (or AD-IN instead of Z) */
-			adc at 40048000 {
-				status = "okay";
-			};
-		};
-	};
-
 	gpio_keys {
 		compatible = "gpio-keys";
 		#address-cells = <1>;
@@ -258,12 +145,44 @@
 	};
 };
 
-/* Here, choose exactly one from: ohci, usbd */
-&ohci /* &usbd */ {
-	transceiver = <&isp1301>;
+/* 3-axis accelerometer X,Y,Z (or AD-IN instead of Z) */
+&adc {
 	status = "okay";
 };
 
+&i2c1 {
+	clock-frequency = <100000>;
+
+	uda1380: uda1380 at 18 {
+		compatible = "nxp,uda1380";
+		reg = <0x18>;
+		power-gpio = <&gpio 0x59 0>;
+		reset-gpio = <&gpio 0x51 0>;
+		dac-clk = "wspll";
+	};
+
+	eeprom at 50 {
+		compatible = "at,24c256";
+		reg = <0x50>;
+	};
+
+	eeprom at 57 {
+		compatible = "at,24c64";
+		reg = <0x57>;
+	};
+
+	pca9532: pca9532 at 60 {
+		compatible = "nxp,pca9532";
+		gpio-controller;
+		#gpio-cells = <2>;
+		reg = <0x60>;
+	};
+};
+
+&i2c2 {
+	clock-frequency = <100000>;
+};
+
 &i2cusb {
 	clock-frequency = <100000>;
 
@@ -272,3 +191,78 @@
 		reg = <0x2d>;
 	};
 };
+
+&mac {
+	phy-mode = "rmii";
+	use-iram;
+};
+
+/* Here, choose exactly one from: ohci, usbd */
+&ohci /* &usbd */ {
+	transceiver = <&isp1301>;
+	status = "okay";
+};
+
+&sd {
+	wp-gpios = <&pca9532 5 0>;
+	cd-gpios = <&pca9532 4 0>;
+	cd-inverted;
+	bus-width = <4>;
+	status = "okay";
+};
+
+/* 128MB Flash via SLC NAND controller */
+&slc {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	status = "okay";
+
+	nxp,wdr-clks = <14>;
+	nxp,wwidth = <260000000>;
+	nxp,whold = <104000000>;
+	nxp,wsetup = <200000000>;
+	nxp,rdr-clks = <14>;
+	nxp,rwidth = <34666666>;
+	nxp,rhold = <104000000>;
+	nxp,rsetup = <200000000>;
+	nand-on-flash-bbt;
+	gpios = <&gpio 5 19 1>; /* GPO_P3 19, active low */
+
+	mtd0 at 00000000 {
+		label = "ea3250-boot";
+		reg = <0x00000000 0x00080000>;
+		read-only;
+	};
+
+	mtd1 at 00080000 {
+		label = "ea3250-uboot";
+		reg = <0x00080000 0x000c0000>;
+		read-only;
+	};
+
+	mtd2 at 00140000 {
+		label = "ea3250-kernel";
+		reg = <0x00140000 0x00400000>;
+	};
+
+	mtd3 at 00540000 {
+		label = "ea3250-rootfs";
+		reg = <0x00540000 0x07ac0000>;
+	};
+};
+
+&uart1 {
+	status = "okay";
+};
+
+&uart3 {
+	status = "okay";
+};
+
+&uart5 {
+	status = "okay";
+};
+
+&uart6 {
+	status = "okay";
+};
Signature · 1 line
2.1.4
#2 lore raw

PATCH v2 2/7 ARM: dts: lpc32xx: ea3250: add NAND partitions device node

In reply to Vladimir Zapolskiy

To declare MTD OF partitions NAND controller device node should have a special 'partitions' subnode, the change removes a debug message from mtd/ofpart on boot:

nxp_lpc3220_slc: 'partitions' subnode not found on /ahb/flash at 20020000. Trying to parse direct subnodes as partitions.

---
* on conversion added missing 'compatible = "fixed-partitions";', thanks to Sylvain for finding

 arch/arm/boot/dts/ea3250.dts | 42 +++++++++++++++++++++++-------------------
 1 file changed, 23 insertions(+), 19 deletions(-)
arch/arm/boot/dts/ea3250.dts +23 -19
index 7cf815a..9637ac5 100644
@@ -213,8 +213,6 @@
 
 /* 128MB Flash via SLC NAND controller */
 &slc {
-	#address-cells = <1>;
-	#size-cells = <1>;
 	status = "okay";
 
 	nxp,wdr-clks = <14>;
@@ -228,26 +226,32 @@
 	nand-on-flash-bbt;
 	gpios = <&gpio 5 19 1>; /* GPO_P3 19, active low */
 
-	mtd0 at 00000000 {
-		label = "ea3250-boot";
-		reg = <0x00000000 0x00080000>;
-		read-only;
-	};
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
 
-	mtd1 at 00080000 {
-		label = "ea3250-uboot";
-		reg = <0x00080000 0x000c0000>;
-		read-only;
-	};
+		mtd0 at 00000000 {
+			label = "ea3250-boot";
+			reg = <0x00000000 0x00080000>;
+			read-only;
+		};
 
-	mtd2 at 00140000 {
-		label = "ea3250-kernel";
-		reg = <0x00140000 0x00400000>;
-	};
+		mtd1 at 00080000 {
+			label = "ea3250-uboot";
+			reg = <0x00080000 0x000c0000>;
+			read-only;
+		};
 
-	mtd3 at 00540000 {
-		label = "ea3250-rootfs";
-		reg = <0x00540000 0x07ac0000>;
+		mtd2 at 00140000 {
+			label = "ea3250-kernel";
+			reg = <0x00140000 0x00400000>;
+		};
+
+		mtd3 at 00540000 {
+			label = "ea3250-rootfs";
+			reg = <0x00540000 0x07ac0000>;
+		};
 	};
 };
 
Signature · 1 line
2.1.4
#3 lore raw

PATCH v2 2/7 ARM: dts: lpc32xx: ea3250: add NAND partitions device node

Quoted 7 lines · Vladimir Zapolskiy

To declare MTD OF partitions NAND controller device node should have a special 'partitions' subnode, the change removes a debug message from mtd/ofpart on boot:

nxp_lpc3220_slc: 'partitions' subnode not found on /ahb/flash at 20020000. Trying to parse direct subnodes as partitions.

Quoted 8 lines

---
* on conversion added missing 'compatible = "fixed-partitions";', thanks to Sylvain for finding

 arch/arm/boot/dts/ea3250.dts | 42 +++++++++++++++++++++++-------------------
 1 file changed, 23 insertions(+), 19 deletions(-)
#4 lore raw

PATCH v2 3/7 ARM: dts: lpc32xx: ea3250: fix Atmel at24 eeprom vendor

In reply to Vladimir Zapolskiy

There is no 'at' hardware vendor defined yet, correct vendor prefix for Atmel is 'atmel'.

---
Changes from v1 to v2:
* added Sylvain's acked-by.
* rebased on top of v2 2/7 changes

 arch/arm/boot/dts/ea3250.dts | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm/boot/dts/ea3250.dts +2 -2
index 9637ac5..52b3ed1 100644
@@ -162,12 +162,12 @@
 	};
 
 	eeprom at 50 {
-		compatible = "at,24c256";
+		compatible = "atmel,24c256";
 		reg = <0x50>;
 	};
 
 	eeprom at 57 {
-		compatible = "at,24c64";
+		compatible = "atmel,24c64";
 		reg = <0x57>;
 	};
 
Signature · 1 line
2.1.4
#5 lore raw

PATCH v2 4/7 ARM: dts: lpc32xx: ea3250: add SoC name prefix to board dts file

In reply to Vladimir Zapolskiy

To simplify matching of DTS files of all NXP LPC32xx powered boards by a file name add 'lpc3250' prefix to Embedded Artists LPC3250 board dts file.

---
Changes from v1 to v2:
* added Sylvain's acked-by.
* rebased on top of v2 2/7 changes

 arch/arm/boot/dts/Makefile                           | 3 ++-
 arch/arm/boot/dts/{ea3250.dts => lpc3250-ea3250.dts} | 0
 2 files changed, 2 insertions(+), 1 deletion(-)
 rename arch/arm/boot/dts/{ea3250.dts => lpc3250-ea3250.dts} (100%)
arch/arm/boot/dts/Makefile +2 -1
index 95c1923..9f8b14f 100644
@@ -241,7 +241,8 @@ dtb-$(CONFIG_ARCH_LPC18XX) += \
 	lpc4350-hitex-eval.dtb \
 	lpc4357-ea4357-devkit.dtb
 dtb-$(CONFIG_ARCH_LPC32XX) += \
-	ea3250.dtb phy3250.dtb
+	lpc3250-ea3250.dtb \
+	phy3250.dtb
 dtb-$(CONFIG_MACH_MESON6) += \
 	meson6-atv1200.dtb
 dtb-$(CONFIG_MACH_MESON8) += \
arch/arm/boot/dts/lpc3250-ea3250.dts renamed from arch/arm/boot/dts/ea3250.dts +0 -0
similarity index 100%
rename from arch/arm/boot/dts/ea3250.dts
rename to arch/arm/boot/dts/lpc3250-ea3250.dts
Signature · 1 line
2.1.4
#6 lore raw

PATCH v2 5/7 ARM: dts: lpc32xx: phy3250: avoid extension of device nodes by absolute path

In reply to Vladimir Zapolskiy

The change simplifies layout of PHY3250 board description by referencing device nodes of LPC32xx controllers by label.

No functional change intended.

---
Changes from v1 to v2:
* added Sylvain's acked-by.

 arch/arm/boot/dts/phy3250.dts | 282 +++++++++++++++++++++---------------------
 1 file changed, 138 insertions(+), 144 deletions(-)
arch/arm/boot/dts/phy3250.dts +138 -144
index 26e070f..c1a6e62 100644
@@ -56,147 +56,6 @@
 		};
 	};
 
-	ahb {
-		mac: ethernet at 31060000 {
-			phy-mode = "rmii";
-			use-iram;
-		};
-
-		clcd at 31040000 {
-			status = "okay";
-		};
-
-		/* 64MB Flash via SLC NAND controller */
-		slc: flash at 20020000 {
-			status = "okay";
-			#address-cells = <1>;
-			#size-cells = <1>;
-
-			nxp,wdr-clks = <14>;
-			nxp,wwidth = <40000000>;
-			nxp,whold = <100000000>;
-			nxp,wsetup = <100000000>;
-			nxp,rdr-clks = <14>;
-			nxp,rwidth = <40000000>;
-			nxp,rhold = <66666666>;
-			nxp,rsetup = <100000000>;
-			nand-on-flash-bbt;
-			gpios = <&gpio 5 19 1>; /* GPO_P3 19, active low */
-
-			mtd0 at 00000000 {
-				label = "phy3250-boot";
-				reg = <0x00000000 0x00064000>;
-				read-only;
-			};
-
-			mtd1 at 00064000 {
-				label = "phy3250-uboot";
-				reg = <0x00064000 0x00190000>;
-				read-only;
-			};
-
-			mtd2 at 001f4000 {
-				label = "phy3250-ubt-prms";
-				reg = <0x001f4000 0x00010000>;
-			};
-
-			mtd3 at 00204000 {
-				label = "phy3250-kernel";
-				reg = <0x00204000 0x00400000>;
-			};
-
-			mtd4 at 00604000 {
-				label = "phy3250-rootfs";
-				reg = <0x00604000 0x039fc000>;
-			};
-		};
-
-		apb {
-			uart5: serial at 40090000 {
-				status = "okay";
-			};
-
-			uart3: serial at 40080000 {
-				status = "okay";
-			};
-
-			i2c1: i2c at 400A0000 {
-				clock-frequency = <100000>;
-
-				pcf8563: rtc at 51 {
-					compatible = "nxp,pcf8563";
-					reg = <0x51>;
-				};
-
-				uda1380: uda1380 at 18 {
-					compatible = "nxp,uda1380";
-					reg = <0x18>;
-					power-gpio = <&gpio 0x59 0>;
-					reset-gpio = <&gpio 0x51 0>;
-					dac-clk = "wspll";
-				};
-			};
-
-			i2c2: i2c at 400A8000 {
-				clock-frequency = <100000>;
-			};
-
-			ssp0: ssp at 20084000 {
-				#address-cells = <1>;
-				#size-cells = <0>;
-				num-cs = <1>;
-				cs-gpios = <&gpio 3 5 0>;
-				status = "okay";
-
-				eeprom: at25 at 0 {
-					pl022,interface = <0>;
-					pl022,com-mode = <0>;
-					pl022,rx-level-trig = <1>;
-					pl022,tx-level-trig = <1>;
-					pl022,ctrl-len = <11>;
-					pl022,wait-state = <0>;
-					pl022,duplex = <0>;
-
-					at25,byte-len = <0x8000>;
-					at25,addr-mode = <2>;
-					at25,page-size = <64>;
-
-					compatible = "atmel,at25";
-					reg = <0>;
-					spi-max-frequency = <5000000>;
-				};
-			};
-
-			sd at 20098000 {
-				wp-gpios = <&gpio 3 0 0>;
-				cd-gpios = <&gpio 3 1 0>;
-				cd-inverted;
-				bus-width = <4>;
-				vmmc-supply = <&sd_reg>;
-				status = "okay";
-			};
-		};
-
-		fab {
-			uart2: serial at 40018000 {
-				status = "okay";
-			};
-
-			tsc at 40048000 {
-				status = "okay";
-			};
-
-			key at 40050000 {
-				status = "okay";
-				keypad,num-rows = <1>;
-				keypad,num-columns = <1>;
-				nxp,debounce-delay-ms = <3>;
-				nxp,scan-delay-ms = <34>;
-				linux,keymap = <0x00000002>;
-			};
-		};
-	};
-
 	leds {
 		compatible = "gpio-leds";
 
@@ -212,12 +71,31 @@
 	};
 };
 
-/* Here, choose exactly one from: ohci, usbd */
-&ohci /* &usbd */ {
-	transceiver = <&isp1301>;
+&clcd {
 	status = "okay";
 };
 
+&i2c1 {
+	clock-frequency = <100000>;
+
+	uda1380: uda1380 at 18 {
+		compatible = "nxp,uda1380";
+		reg = <0x18>;
+		power-gpio = <&gpio 0x59 0>;
+		reset-gpio = <&gpio 0x51 0>;
+		dac-clk = "wspll";
+	};
+
+	pcf8563: rtc at 51 {
+		compatible = "nxp,pcf8563";
+		reg = <0x51>;
+	};
+};
+
+&i2c2 {
+	clock-frequency = <100000>;
+};
+
 &i2cusb {
 	clock-frequency = <100000>;
 
@@ -226,3 +104,119 @@
 		reg = <0x2c>;
 	};
 };
+
+&key {
+	keypad,num-rows = <1>;
+	keypad,num-columns = <1>;
+	nxp,debounce-delay-ms = <3>;
+	nxp,scan-delay-ms = <34>;
+	linux,keymap = <0x00000002>;
+	status = "okay";
+};
+
+&mac {
+	phy-mode = "rmii";
+	use-iram;
+};
+
+/* Here, choose exactly one from: ohci, usbd */
+&ohci /* &usbd */ {
+	transceiver = <&isp1301>;
+	status = "okay";
+};
+
+&sd {
+	wp-gpios = <&gpio 3 0 0>;
+	cd-gpios = <&gpio 3 1 0>;
+	cd-inverted;
+	bus-width = <4>;
+	vmmc-supply = <&sd_reg>;
+	status = "okay";
+};
+
+/* 64MB Flash via SLC NAND controller */
+&slc {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	status = "okay";
+
+	nxp,wdr-clks = <14>;
+	nxp,wwidth = <40000000>;
+	nxp,whold = <100000000>;
+	nxp,wsetup = <100000000>;
+	nxp,rdr-clks = <14>;
+	nxp,rwidth = <40000000>;
+	nxp,rhold = <66666666>;
+	nxp,rsetup = <100000000>;
+	nand-on-flash-bbt;
+	gpios = <&gpio 5 19 1>; /* GPO_P3 19, active low */
+
+	mtd0 at 00000000 {
+		label = "phy3250-boot";
+		reg = <0x00000000 0x00064000>;
+		read-only;
+	};
+
+	mtd1 at 00064000 {
+		label = "phy3250-uboot";
+		reg = <0x00064000 0x00190000>;
+		read-only;
+	};
+
+	mtd2 at 001f4000 {
+		label = "phy3250-ubt-prms";
+		reg = <0x001f4000 0x00010000>;
+	};
+
+	mtd3 at 00204000 {
+		label = "phy3250-kernel";
+		reg = <0x00204000 0x00400000>;
+	};
+
+	mtd4 at 00604000 {
+		label = "phy3250-rootfs";
+		reg = <0x00604000 0x039fc000>;
+	};
+};
+
+&ssp0 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	num-cs = <1>;
+	cs-gpios = <&gpio 3 5 0>;
+	status = "okay";
+
+	eeprom: at25 at 0 {
+		compatible = "atmel,at25";
+		reg = <0>;
+		spi-max-frequency = <5000000>;
+
+		pl022,interface = <0>;
+		pl022,com-mode = <0>;
+		pl022,rx-level-trig = <1>;
+		pl022,tx-level-trig = <1>;
+		pl022,ctrl-len = <11>;
+		pl022,wait-state = <0>;
+		pl022,duplex = <0>;
+
+		at25,byte-len = <0x8000>;
+		at25,addr-mode = <2>;
+		at25,page-size = <64>;
+	};
+};
+
+&tsc {
+	status = "okay";
+};
+
+&uart2 {
+	status = "okay";
+};
+
+&uart3 {
+	status = "okay";
+};
+
+&uart5 {
+	status = "okay";
+};
Signature · 1 line
2.1.4
#7 lore raw

PATCH v2 6/7 ARM: dts: lpc32xx: phy3250: add NAND partitions device node

In reply to Vladimir Zapolskiy

To declare MTD OF partitions NAND controller device node should have a special 'partitions' subnode, the change removes a debug message from mtd/ofpart on boot:

nxp_lpc3220_slc: 'partitions' subnode not found on /ahb/flash at 20020000. Trying to parse direct subnodes as partitions.

---
* on conversion added missing 'compatible = "fixed-partitions";', thanks to Sylvain for finding

 arch/arm/boot/dts/phy3250.dts | 50 +++++++++++++++++++++++--------------------
 1 file changed, 27 insertions(+), 23 deletions(-)
arch/arm/boot/dts/phy3250.dts +27 -23
index c1a6e62..fd95e2b 100644
@@ -136,8 +136,6 @@
 
 /* 64MB Flash via SLC NAND controller */
 &slc {
-	#address-cells = <1>;
-	#size-cells = <1>;
 	status = "okay";
 
 	nxp,wdr-clks = <14>;
@@ -151,31 +149,37 @@
 	nand-on-flash-bbt;
 	gpios = <&gpio 5 19 1>; /* GPO_P3 19, active low */
 
-	mtd0 at 00000000 {
-		label = "phy3250-boot";
-		reg = <0x00000000 0x00064000>;
-		read-only;
-	};
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
 
-	mtd1 at 00064000 {
-		label = "phy3250-uboot";
-		reg = <0x00064000 0x00190000>;
-		read-only;
-	};
+		mtd0 at 00000000 {
+			label = "phy3250-boot";
+			reg = <0x00000000 0x00064000>;
+			read-only;
+		};
 
-	mtd2 at 001f4000 {
-		label = "phy3250-ubt-prms";
-		reg = <0x001f4000 0x00010000>;
-	};
+		mtd1 at 00064000 {
+			label = "phy3250-uboot";
+			reg = <0x00064000 0x00190000>;
+			read-only;
+		};
 
-	mtd3 at 00204000 {
-		label = "phy3250-kernel";
-		reg = <0x00204000 0x00400000>;
-	};
+		mtd2 at 001f4000 {
+			label = "phy3250-ubt-prms";
+			reg = <0x001f4000 0x00010000>;
+		};
 
-	mtd4 at 00604000 {
-		label = "phy3250-rootfs";
-		reg = <0x00604000 0x039fc000>;
+		mtd3 at 00204000 {
+			label = "phy3250-kernel";
+			reg = <0x00204000 0x00400000>;
+		};
+
+		mtd4 at 00604000 {
+			label = "phy3250-rootfs";
+			reg = <0x00604000 0x039fc000>;
+		};
 	};
 };
 
Signature · 1 line
2.1.4
#8 lore raw

PATCH v2 6/7 ARM: dts: lpc32xx: phy3250: add NAND partitions device node

Quoted 7 lines · Vladimir Zapolskiy

To declare MTD OF partitions NAND controller device node should have a special 'partitions' subnode, the change removes a debug message from mtd/ofpart on boot:

nxp_lpc3220_slc: 'partitions' subnode not found on /ahb/flash at 20020000. Trying to parse direct subnodes as partitions.

Quoted 8 lines

---
* on conversion added missing 'compatible = "fixed-partitions";', thanks to Sylvain for finding

 arch/arm/boot/dts/phy3250.dts | 50 +++++++++++++++++++++++--------------------
 1 file changed, 27 insertions(+), 23 deletions(-)
#9 lore raw

PATCH v2 7/7 ARM: dts: lpc32xx: phy3250: add SoC name prefix to board dts file

In reply to Vladimir Zapolskiy

To simplify matching of DTS files of all NXP LPC32xx powered boards by a file name add 'lpc3250' prefix to PHYTEC PHYCORE-LPC3250 board dts file.

---
Changes from v1 to v2:
* rebased on top of v2 6/7 change
* added Sylvain's acked-by.

 arch/arm/boot/dts/Makefile                             | 2 +-
 arch/arm/boot/dts/{phy3250.dts => lpc3250-phy3250.dts} | 0
 2 files changed, 1 insertion(+), 1 deletion(-)
 rename arch/arm/boot/dts/{phy3250.dts => lpc3250-phy3250.dts} (100%)
arch/arm/boot/dts/Makefile +1 -1
index 9f8b14f..4733ec9 100644
@@ -242,7 +242,7 @@ dtb-$(CONFIG_ARCH_LPC18XX) += \
 	lpc4357-ea4357-devkit.dtb
 dtb-$(CONFIG_ARCH_LPC32XX) += \
 	lpc3250-ea3250.dtb \
-	phy3250.dtb
+	lpc3250-phy3250.dtb
 dtb-$(CONFIG_MACH_MESON6) += \
 	meson6-atv1200.dtb
 dtb-$(CONFIG_MACH_MESON8) += \
arch/arm/boot/dts/lpc3250-phy3250.dts renamed from arch/arm/boot/dts/phy3250.dts +0 -0
similarity index 100%
rename from arch/arm/boot/dts/phy3250.dts
rename to arch/arm/boot/dts/lpc3250-phy3250.dts
Signature · 1 line
2.1.4