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Patch "serial: 8250_mid: recognize interrupt source in handler" has been added to the 4.5-stable tree

PATCH [email protected] 1 participant 1 message May 30, 2016

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This is a note to let you know that I've just added the patch titled

serial: 8250_mid: recognize interrupt source in handler

to the 4.5-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
serial-8250_mid-recognize-interrupt-source-in-handler.patch
and it can be found in the queue-4.5 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.

Quoted 1 line

From c42850f1ae7e70056f852e67bb9dddf927853b47 Mon Sep 17 00:00:00 2001

From: Andy Shevchenko <[email protected]>
Date: Mon, 4 Apr 2016 17:35:10 +0300
Subject: serial: 8250_mid: recognize interrupt source in handler

From: Andy Shevchenko <[email protected]>

commit c42850f1ae7e70056f852e67bb9dddf927853b47 upstream.

There is a special register that shows interrupt status by source. In particular case the source can be a combination of DMA Tx, DMA Rx, and UART.

Read the register and call the handlers only for sources that request an interrupt.

Fixes 6ede6dcd87aa ("serial: 8250_mid: add support for DMA engine handling from UART MMIO")
---
 drivers/tty/serial/8250/8250_mid.c |   19 ++++++++++---------
 1 file changed, 10 insertions(+), 9 deletions(-)
drivers/tty/serial/8250/8250_mid.c +10 -9
@@ -25,6 +25,7 @@
 #define PCI_DEVICE_ID_INTEL_DNV_UART	0x19d8
 
 /* Intel MID Specific registers */
+#define INTEL_MID_UART_DNV_FISR		0x08
 #define INTEL_MID_UART_PS		0x30
 #define INTEL_MID_UART_MUL		0x34
 #define INTEL_MID_UART_DIV		0x38
@@ -90,16 +91,16 @@ static int tng_setup(struct mid8250 *mid
 static int dnv_handle_irq(struct uart_port *p)
 {
 	struct mid8250 *mid = p->private_data;
-	int ret;
+	unsigned int fisr = serial_port_in(p, INTEL_MID_UART_DNV_FISR);
+	int ret = IRQ_NONE;
 
-	ret = hsu_dma_irq(&mid->dma_chip, 0);
-	ret |= hsu_dma_irq(&mid->dma_chip, 1);
-
-	/* For now, letting the HW generate separate interrupt for the UART */
-	if (ret)
-		return ret;
-
-	return serial8250_handle_irq(p, serial_port_in(p, UART_IIR));
+	if (fisr & BIT(2))
+		ret |= hsu_dma_irq(&mid->dma_chip, 1);
+	if (fisr & BIT(1))
+		ret |= hsu_dma_irq(&mid->dma_chip, 0);
+	if (fisr & BIT(0))
+		ret |= serial8250_handle_irq(p, serial_port_in(p, UART_IIR));
+	return ret;
 }
 
 #define DNV_DMA_CHAN_OFFSET 0x80

Patches currently in stable-queue which might be from [email protected] are

queue-4.5/serial-8250_mid-recognize-interrupt-source-in-handler.patch queue-4.5/serial-8250_mid-use-proper-bar-for-dnv-platform.patch queue-4.5/serial-8250_pci-fix-divide-error-bug-if-baud-rate-is-0.patch