Skip to contentSkip to conversation

clk: lpc32xx: allow peripheral clock selection in device tree

PATCH New Sylvain Lemieux 2 participants 4 messages Jun 3, 2016 – Jul 4, 2016

Subsystems (3)
lore
Share & tools
lore
#0 lore raw

PATCH 1/1 clk: lpc32xx: allow peripheral clock selection in device tree

From: Sylvain Lemieux <[email protected]>

This patch add the support to select the peripheral clock (PERIPH) as a parent clock source using the "assigned-clock-parents" parameter in the device tree.

---
 drivers/clk/nxp/clk-lpc32xx.c             | 3 +--
 include/dt-bindings/clock/lpc32xx-clock.h | 1 +
 2 files changed, 2 insertions(+), 2 deletions(-)
drivers/clk/nxp/clk-lpc32xx.c +1 -2
index 481b264..90d740a 100644
@@ -87,7 +87,7 @@ enum {
 
 enum {
 	/* Start from the last defined clock in dt bindings */
-	LPC32XX_CLK_ADC_DIV = LPC32XX_CLK_HCLK_PLL + 1,
+	LPC32XX_CLK_ADC_DIV = LPC32XX_CLK_PERIPH + 1,
 	LPC32XX_CLK_ADC_RTC,
 	LPC32XX_CLK_TEST1,
 	LPC32XX_CLK_TEST2,
@@ -99,7 +99,6 @@ enum {
 	LPC32XX_CLK_HCLK_DIV_PERIPH,
 	LPC32XX_CLK_HCLK_DIV,
 	LPC32XX_CLK_HCLK,
-	LPC32XX_CLK_PERIPH,
 	LPC32XX_CLK_ARM,
 	LPC32XX_CLK_ARM_VFP,
 
include/dt-bindings/clock/lpc32xx-clock.h +1 -0
index d41b6fe..e624d3a 100644
@@ -48,6 +48,7 @@
 #define LPC32XX_CLK_PWM2	33
 #define LPC32XX_CLK_ADC		34
 #define LPC32XX_CLK_HCLK_PLL	35
+#define LPC32XX_CLK_PERIPH	36
 
 /* LPC32XX USB clocks */
 #define LPC32XX_USB_CLK_I2C	1
Signature · 1 line
1.8.3.1
#1 lore raw

PATCH 1/1 clk: lpc32xx: allow peripheral clock selection in device tree

Hi Sylvain,

Quoted 7 lines · Sylvain Lemieux

From: Sylvain Lemieux <[email protected]>

This patch add the support to select the peripheral clock (PERIPH) as a parent clock source using the "assigned-clock-parents" parameter in the device tree.

The change looks good, is it done to support a selection of PWM parent clocks?

I think it makes sense to set PERIPH clock as a default parent for both PWM controllers, please consider to send a DTS change.

Best wishes,
Vladimir

Quoted 39 lines
---
 drivers/clk/nxp/clk-lpc32xx.c             | 3 +--
 include/dt-bindings/clock/lpc32xx-clock.h | 1 +
 2 files changed, 2 insertions(+), 2 deletions(-)
drivers/clk/nxp/clk-lpc32xx.c +1 -2
index 481b264..90d740a 100644
@@ -87,7 +87,7 @@ enum {
 
 enum {
 	/* Start from the last defined clock in dt bindings */
-	LPC32XX_CLK_ADC_DIV = LPC32XX_CLK_HCLK_PLL + 1,
+	LPC32XX_CLK_ADC_DIV = LPC32XX_CLK_PERIPH + 1,
 	LPC32XX_CLK_ADC_RTC,
 	LPC32XX_CLK_TEST1,
 	LPC32XX_CLK_TEST2,
@@ -99,7 +99,6 @@ enum {
 	LPC32XX_CLK_HCLK_DIV_PERIPH,
 	LPC32XX_CLK_HCLK_DIV,
 	LPC32XX_CLK_HCLK,
-	LPC32XX_CLK_PERIPH,
 	LPC32XX_CLK_ARM,
 	LPC32XX_CLK_ARM_VFP,
 
include/dt-bindings/clock/lpc32xx-clock.h +1 -0
index d41b6fe..e624d3a 100644
@@ -48,6 +48,7 @@
 #define LPC32XX_CLK_PWM2	33
 #define LPC32XX_CLK_ADC		34
 #define LPC32XX_CLK_HCLK_PLL	35
+#define LPC32XX_CLK_PERIPH	36
 
 /* LPC32XX USB clocks */
 #define LPC32XX_USB_CLK_I2C	1
#2 lore raw

PATCH 1/1 clk: lpc32xx: allow peripheral clock selection in device tree

Hi Vladimir,

Quoted 9 lines · Vladimir Zapolskiy

Hi Sylvain,

Quoted 6 lines · Sylvain Lemieux

From: Sylvain Lemieux <[email protected]>

This patch add the support to select the peripheral clock (PERIPH) as a parent clock source using the "assigned-clock-parents" parameter in the device tree.

Quoted 5 lines
Quoted 1 line

The change looks good, is it done to support a selection of PWM parent clocks?

Yes, this is the case.

Quoted 3 lines

I think it makes sense to set PERIPH clock as a default parent for both PWM controllers, please consider to send a DTS change.

I will do.

Thanks for the feedback,
Sylvain

#3 lore raw

PATCH 1/1 clk: lpc32xx: allow peripheral clock selection in device tree

Hi Stephan,

Quoted 20 lines · Sylvain Lemieux

Hi Vladimir,

Quoted 9 lines · Vladimir Zapolskiy

Hi Sylvain,

Quoted 6 lines · Sylvain Lemieux

From: Sylvain Lemieux <[email protected]>

This patch add the support to select the peripheral clock (PERIPH) as a parent clock source using the "assigned-clock-parents" parameter in the device tree.

Quoted 5 lines
Quoted 1 line

The change looks good, is it done to support a selection of PWM parent clocks?

Yes, this is the case.

Quoted 1 line
Quoted 8 lines
Quoted 2 lines

I think it makes sense to set PERIPH clock as a default parent for both PWM controllers, please consider to send a DTS change.

I will do.

Thanks for the feedback,
Sylvain

do you think you can take this change for 4.8?

Regards,
Sylvain