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Patch "EDAC, sb_edac: Fix rank lookup on Broadwell" has been added to the 4.4-stable tree

PATCH [email protected] 1 participant 1 message Jul 11, 2016

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This is a note to let you know that I've just added the patch titled

EDAC, sb_edac: Fix rank lookup on Broadwell

to the 4.4-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
edac-sb_edac-fix-rank-lookup-on-broadwell.patch
and it can be found in the queue-4.4 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.

Quoted 1 line

From c7103f650a11328f28b9fa1c95027db331b7774b Mon Sep 17 00:00:00 2001

From: Tony Luck <[email protected]>
Date: Tue, 31 May 2016 11:50:28 -0700
Subject: EDAC, sb_edac: Fix rank lookup on Broadwell

From: Tony Luck <[email protected]>

commit c7103f650a11328f28b9fa1c95027db331b7774b upstream.

Broadwell made a small change to the rank target register moving the target rank ID field up from bits 16:19 to bits 20:23.

Also found that the offset field grew by one bit in the IVY_BRIDGE to HASWELL transition, so fix the RIR_OFFSET() macro too.

Signed-off-by Tony Luck <[email protected]>
Cc Aristeu Rozanski <[email protected]>
Cc Mauro Carvalho Chehab <[email protected]>
Cc linux-edac <[email protected]>
Link http://lkml.kernel.org/r/2943fb819b1f7e396681165db9c12bb3df0e0b16.1464735623.git.tony.luck@intel.com open here
Signed-off-by Borislav Petkov <[email protected]>
Signed-off-by Greg Kroah-Hartman <[email protected]>
---
 drivers/edac/sb_edac.c |   13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)
drivers/edac/sb_edac.c +8 -5
@@ -218,8 +218,11 @@ static const u32 rir_offset[MAX_RIR_RANG
 	{ 0x1a0, 0x1a4, 0x1a8, 0x1ac, 0x1b0, 0x1b4, 0x1b8, 0x1bc },
 };
 
-#define RIR_RNK_TGT(reg)		GET_BITFIELD(reg, 16, 19)
-#define RIR_OFFSET(reg)		GET_BITFIELD(reg,  2, 14)
+#define RIR_RNK_TGT(type, reg) (((type) == BROADWELL) ? \
+	GET_BITFIELD(reg, 20, 23) : GET_BITFIELD(reg, 16, 19))
+
+#define RIR_OFFSET(type, reg) (((type) == HASWELL || (type) == BROADWELL) ? \
+	GET_BITFIELD(reg,  2, 15) : GET_BITFIELD(reg,  2, 14))
 
 /* Device 16, functions 2-7 */
 

@@ -1175,14 +1178,14 @@ static void get_memory_layout(const stru
 				pci_read_config_dword(pvt->pci_tad[i],
 						      rir_offset[j][k],
 						      &reg);
-				tmp_mb = RIR_OFFSET(reg) << 6;
+				tmp_mb = RIR_OFFSET(pvt->info.type, reg) << 6;
 
 				gb = div_u64_rem(tmp_mb, 1024, &mb);
 				edac_dbg(0, "CH#%d RIR#%d INTL#%d, offset %u.%03u GB (0x%016Lx), tgt: %d, reg=0x%08x\n",
 					 i, j, k,
 					 gb, (mb*1000)/1024,
 					 ((u64)tmp_mb) << 20L,
-					 (u32)RIR_RNK_TGT(reg),
+					 (u32)RIR_RNK_TGT(pvt->info.type, reg),
 					 reg);
 			}
 		}

@@ -1512,7 +1515,7 @@ static int get_memory_error_data(struct
 	pci_read_config_dword(pvt->pci_tad[ch_add + base_ch],
 			      rir_offset[n_rir][idx],
 			      &reg);
-	*rank = RIR_RNK_TGT(reg);
+	*rank = RIR_RNK_TGT(pvt->info.type, reg);
 
 	edac_dbg(0, "RIR#%d: channel address 0x%08Lx < 0x%08Lx, RIR interleave %d, index %d\n",
 		 n_rir,

Patches currently in stable-queue which might be from [email protected] are

queue-4.4/edac-sb_edac-fix-rank-lookup-on-broadwell.patch