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Patch "irqchip/mips-gic: Fix IRQs in gic_dev_domain" has been added to the 4.6-stable tree

PATCH [email protected] 1 participant 1 message Jul 12, 2016

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This is a note to let you know that I've just added the patch titled

irqchip/mips-gic: Fix IRQs in gic_dev_domain

to the 4.6-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
irqchip-mips-gic-fix-irqs-in-gic_dev_domain.patch
and it can be found in the queue-4.6 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.

Quoted 1 line

From 4b2312bd0592708c85ed94368c874819e7013309 Mon Sep 17 00:00:00 2001

From: Harvey Hunt <[email protected]>
Date: Mon, 23 May 2016 12:05:52 +0100
Subject: irqchip/mips-gic: Fix IRQs in gic_dev_domain

From: Harvey Hunt <[email protected]>

commit 4b2312bd0592708c85ed94368c874819e7013309 upstream.

When allocating a new device IRQ, gic_dev_domain_alloc() correctly calls irq_domain_set_hwirq_and_chip(), but gic_irq_domain_alloc() does not. This means that gic_irq_domain believes all IRQs from the dev domain have an hwirq of 0 and creates incorrect mappings in the linear_revmap. As gic_irq_domain is a parent of the gic_dev_domain, this leads to an inability to boot on devices with a GIC. Excerpt of the error:

[    2.297649] irq 0: nobody cared (try booting with the "irqpoll" option)
...
[    2.436963] handlers:
[    2.439492] Disabling IRQ #0

Fix this by calling irq_domain_set_hwirq_and_chip() for both the dev and irq domain.

Now that we are modifying the parent domain, be sure to clear it up in case of an allocation error.

Fixes c98c1822ee13 ("irqchip/mips-gic: Add device hierarchy domain")
Fixes 2af70a962070 ("irqchip/mips-gic: Add a IPI hierarchy domain")
Cc Qais Yousef <[email protected]>
---
 drivers/irqchip/irq-mips-gic.c |   12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)
drivers/irqchip/irq-mips-gic.c +11 -1
@@ -734,6 +734,12 @@ static int gic_irq_domain_alloc(struct i
 		/* verify that it doesn't conflict with an IPI irq */
 		if (test_bit(spec->hwirq, ipi_resrv))
 			return -EBUSY;
+
+		hwirq = GIC_SHARED_TO_HWIRQ(spec->hwirq);
+
+		return irq_domain_set_hwirq_and_chip(d, virq, hwirq,
+						     &gic_level_irq_controller,
+						     NULL);
 	} else {
 		base_hwirq = find_first_bit(ipi_resrv, gic_shared_intrs);
 		if (base_hwirq == gic_shared_intrs) {
@@ -855,10 +861,14 @@ static int gic_dev_domain_alloc(struct i
 						    &gic_level_irq_controller,
 						    NULL);
 		if (ret)
-			return ret;
+			goto error;
 	}
 
 	return 0;
+
+error:
+	irq_domain_free_irqs_parent(d, virq, nr_irqs);
+	return ret;
 }
 
 void gic_dev_domain_free(struct irq_domain *d, unsigned int virq,

Patches currently in stable-queue which might be from [email protected] are

queue-4.6/irqchip-mips-gic-fix-irqs-in-gic_dev_domain.patch