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perf/x86: Fix PEBs threshold initialization

PATCH New Jiri Olsa 2 participants 2 messages Aug 18, 2016

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Jiri Olsa

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#0 lore raw

PATCH 1/1 perf/x86: Fix PEBs threshold initialization

Latest PEBS rework change could skip initialization of the ds->pebs_interrupt_threshold for single event PEBS threshold events.

Making sure the PEBS threshold gets always initialized.

Fixes 09e61b4f7849 ("perf/x86/intel: Rework the large PEBS setup code")
Signed-off-by Jiri Olsa <[email protected]>
---
 arch/x86/events/intel/ds.c | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)
arch/x86/events/intel/ds.c +11 -1
index 248023f54c87..9fe3db5325d1 100644
@@ -834,14 +834,24 @@ static inline void pebs_update_threshold(struct cpu_hw_events *cpuc)
 static void
 pebs_update_state(bool needed_cb, struct cpu_hw_events *cpuc, struct pmu *pmu)
 {
+	/*
+	 * Make sure we get updated with the first PEBs
+	 * event. It'll trigger also during removal, but
+	 * that does not hurt.
+	 */
+	bool update = cpuc->n_pebs == 1;
+
 	if (needed_cb != pebs_needs_sched_cb(cpuc)) {
 		if (!needed_cb)
 			perf_sched_cb_inc(pmu);
 		else
 			perf_sched_cb_dec(pmu);
 
-		pebs_update_threshold(cpuc);
+		update = true;
 	}
+
+	if (update)
+		pebs_update_threshold(cpuc);
 }
 
 void intel_pmu_pebs_add(struct perf_event *event)
Signature · 1 line
2.7.4
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#1 lore raw

[tip:perf/core] perf/x86: Fix PEBS threshold initialization

perf/x86: Fix PEBS threshold initialization
Commit-ID:  b6a32f023fcc9cbd1602f78a467fd8d41bbc9457
Gitweb:     http://git.kernel.org/tip/b6a32f023fcc9cbd1602f78a467fd8d41bbc9457
Author:     Jiri Olsa <[email protected]>
AuthorDate: Thu, 18 Aug 2016 11:09:52 +0200
Committer:  Ingo Molnar <[email protected]>
CommitDate: Thu, 18 Aug 2016 11:58:02 +0200

perf/x86: Fix PEBS threshold initialization

Latest PEBS rework change could skip initialization of the ds->pebs_interrupt_threshold for single event PEBS threshold events.

Make sure the PEBS threshold gets always initialized.

Signed-off-by Jiri Olsa <[email protected]>
Cc Alexander Shishkin <[email protected]>
Cc Arnaldo Carvalho de Melo <[email protected]>
Cc Linus Torvalds <[email protected]>
Cc Peter Zijlstra <[email protected]>
Cc Peter Zijlstra <[email protected]>
Cc Thomas Gleixner <[email protected]>
Fixes 09e61b4f7849 ("perf/x86/intel: Rework the large PEBS setup code")
Link http://lkml.kernel.org/r/[email protected] open here
Signed-off-by Ingo Molnar <[email protected]>
---
 arch/x86/events/intel/ds.c | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)
arch/x86/events/intel/ds.c +11 -1
index 248023f..e0288d5 100644
@@ -834,14 +834,24 @@ static inline void pebs_update_threshold(struct cpu_hw_events *cpuc)
 static void
 pebs_update_state(bool needed_cb, struct cpu_hw_events *cpuc, struct pmu *pmu)
 {
+	/*
+	 * Make sure we get updated with the first PEBS
+	 * event. It will trigger also during removal, but
+	 * that does not hurt:
+	 */
+	bool update = cpuc->n_pebs == 1;
+
 	if (needed_cb != pebs_needs_sched_cb(cpuc)) {
 		if (!needed_cb)
 			perf_sched_cb_inc(pmu);
 		else
 			perf_sched_cb_dec(pmu);
 
-		pebs_update_threshold(cpuc);
+		update = true;
 	}
+
+	if (update)
+		pebs_update_threshold(cpuc);
 }
 
 void intel_pmu_pebs_add(struct perf_event *event)