Skip to contentSkip to conversation

Patch "drm: Restore double clflush on the last partial cacheline" has been added to the 4.4-stable tree

PATCH [email protected] 1 participant 1 message Aug 18, 2016

Subsystems (3)
lore
Share & tools
lore

[email protected]

author maintainer Applied
#0 lore raw

This is a note to let you know that I've just added the patch titled

drm: Restore double clflush on the last partial cacheline

to the 4.4-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
drm-restore-double-clflush-on-the-last-partial-cacheline.patch
and it can be found in the queue-4.4 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.

Quoted 1 line

From 396f5d62d1a5fd99421855a08ffdef8edb43c76e Mon Sep 17 00:00:00 2001

From: Chris Wilson <[email protected]>
Date: Thu, 7 Jul 2016 09:41:12 +0100
Subject: drm: Restore double clflush on the last partial cacheline

From: Chris Wilson <[email protected]>

commit 396f5d62d1a5fd99421855a08ffdef8edb43c76e upstream.

This effectively reverts

commit afcd950cafea6e27b739fe7772cbbeed37d05b8b

Author: Chris Wilson <[email protected]>
Date:   Wed Jun 10 15:58:01 2015 +0100

drm: Avoid the double clflush on the last cache line in drm_clflush_virt_range()

as we have observed issues with serialisation of the clflush operations on Baytrail+ Atoms with partial updates. Applying the double flush on the last cacheline forces that clflush to be ordered with respect to the previous clflush, and the mfence then protects against prefetches crossing the clflush boundary.

The same issue can be demonstrated in userspace with igt/gem_exec_flush.

Fixes afcd950cafea6 (drm: Avoid the double clflush on the last cache...)

Testcase: igt/gem_concurrent_blit
Testcase: igt/gem_partial_pread_pwrite
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92845

---
 drivers/gpu/drm/drm_cache.c |    1 +
 1 file changed, 1 insertion(+)
drivers/gpu/drm/drm_cache.c +1 -0
@@ -136,6 +136,7 @@ drm_clflush_virt_range(void *addr, unsig
 		mb();
 		for (; addr < end; addr += size)
 			clflushopt(addr);
+		clflushopt(end - 1); /* force serialisation */
 		mb();
 		return;
 	}

Patches currently in stable-queue which might be from [email protected] are

queue-4.4/drm-restore-double-clflush-on-the-last-partial-cacheline.patch