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patch "mei: me: disable driver on SPT SPS firmware" added to char-misc-linus

PATCH [email protected] 1 participant 1 message Aug 30, 2016

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Stable branch Char and misc drivers Intel management engine (mei)
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This is a note to let you know that I've just added the patch titled

mei: me: disable driver on SPT SPS firmware

to my char-misc git tree which can be found at
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc.git
in the char-misc-linus branch.

The patch will show up in the next release of the linux-next tree (usually sometime within the next 24 hours during the week.)

The patch will hopefully also be merged in Linus's tree for the next -rc kernel release.

If you have any questions about this process, please let me know.

Quoted 1 line

From 8c57cac1457f3125a5d13dc03635c0708c61bff0 Mon Sep 17 00:00:00 2001

From: Tomas Winkler <[email protected]>
Date: Wed, 20 Jul 2016 10:24:02 +0300
Subject: mei: me: disable driver on SPT SPS firmware

Sunrise Point PCH with SPS Firmware doesn't expose working MEI interface, we need to quirk it out.
The SPS Firmware is identifiable only on the first PCI function of the device.

Cc <[email protected]> #4.6+
Tested-by Sujith Pandel <[email protected]>
Signed-off-by Tomas Winkler <[email protected]>
Signed-off-by Greg Kroah-Hartman <[email protected]>
---
 drivers/misc/mei/hw-me.c  | 10 ++++++++--
 drivers/misc/mei/pci-me.c |  4 ++--
 2 files changed, 10 insertions(+), 4 deletions(-)
drivers/misc/mei/hw-me.c +8 -2
index e2fb44cc5c37..dc3a854e02d3 100644
@@ -1263,8 +1263,14 @@ static bool mei_me_fw_type_nm(struct pci_dev *pdev)
 static bool mei_me_fw_type_sps(struct pci_dev *pdev)
 {
 	u32 reg;
-	/* Read ME FW Status check for SPS Firmware */
-	pci_read_config_dword(pdev, PCI_CFG_HFS_1, &reg);
+	unsigned int devfn;
+
+	/*
+	 * Read ME FW Status register to check for SPS Firmware
+	 * The SPS FW is only signaled in pci function 0
+	 */
+	devfn = PCI_DEVFN(PCI_SLOT(pdev->devfn), 0);
+	pci_bus_read_config_dword(pdev->bus, devfn, PCI_CFG_HFS_1, &reg);
 	trace_mei_pci_cfg_read(&pdev->dev, "PCI_CFG_HFS_1", PCI_CFG_HFS_1, reg);
 	/* if bits [19:16] = 15, running SPS Firmware */
 	return (reg & 0xf0000) == 0xf0000;
drivers/misc/mei/pci-me.c +2 -2
index 64e64da6da44..71cea9b296b2 100644
@@ -85,8 +85,8 @@ static const struct pci_device_id mei_me_pci_tbl[] = {
 
 	{MEI_PCI_DEVICE(MEI_DEV_ID_SPT, mei_me_pch8_cfg)},
 	{MEI_PCI_DEVICE(MEI_DEV_ID_SPT_2, mei_me_pch8_cfg)},
-	{MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H, mei_me_pch8_cfg)},
-	{MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H_2, mei_me_pch8_cfg)},
+	{MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H, mei_me_pch8_sps_cfg)},
+	{MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H_2, mei_me_pch8_sps_cfg)},
 
 	{MEI_PCI_DEVICE(MEI_DEV_ID_BXT_M, mei_me_pch8_cfg)},
 	{MEI_PCI_DEVICE(MEI_DEV_ID_APL_I, mei_me_pch8_cfg)},
Signature · 1 line
2.9.3