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drm/msm: HDMI support on IFC6410

PATCH Superseded Archit Taneja 8 participants 34 messages Jul 8, 2016 – Sep 23, 2016 3 messages not in the archive

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Archit Taneja

author
#0 lore raw

cover drm/msm: HDMI support on IFC6410

This set adds the display DT parts for the APQ8064 based IFC6410 board. There were a couple of small fixes/cleanups required in the driver to use the correct bindings. Those are a part of this patchset too.

Archit Taneja (4):
drm/msm/mdp4: Fix issue with LCDC/LVDS port parsing drm/msm/hdmi: Use more DT friendly GPIO names
arm: dts: qcom: apq8064: Add display DT nodes
arm: dts: qcom: apq8064-ifc6410: Add HDMI support

 .../devicetree/bindings/display/msm/hdmi.txt       |  6 +-
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts         | 74 ++++++++++++++++++
 arch/arm/boot/dts/qcom-apq8064.dtsi                | 91 ++++++++++++++++++++++
 drivers/gpu/drm/msm/hdmi/hdmi.c                    | 16 ++++
 drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c            | 23 +++---
 5 files changed, 197 insertions(+), 13 deletions(-)
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The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation
author
#1 lore raw

PATCH 1/4 drm/msm/mdp4: Fix issue with LCDC/LVDS port parsing

The LVDS port is the first in the list of the output ports in MDP4. The driver assumed that if the port and its corresponding endpoint is defined, then there should be a panel node too. This isn't necessary since boards may not really use a LVDS panel. Don't fail if there isn't a panel node available.

While we're at it, use of_graph_get_endpoint_by_regs instead of of_graph_get_next_endpoint to make it more explicit that the LVDS output is at port 0.

Signed-off-by Archit Taneja <[email protected]>
---
 drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c | 23 ++++++++++++-----------
 1 file changed, 12 insertions(+), 11 deletions(-)
drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c +12 -11
index 7886a88..59ce242 100644
@@ -233,18 +233,21 @@ static struct device_node *mdp4_detect_lcdc_panel(struct drm_device *dev)
 	struct device_node *endpoint, *panel_node;
 	struct device_node *np = dev->dev->of_node;
 
-	endpoint = of_graph_get_next_endpoint(np, NULL);
+	/*
+	 * LVDS/LCDC is the first port described in the list of ports in the
+	 * MDP4 DT node.
+	 */
+	endpoint = of_graph_get_endpoint_by_regs(np, 0, -1);
 	if (!endpoint) {
-		DBG("no endpoint in MDP4 to fetch LVDS panel\n");
+		DBG("no LVDS remote endpoint\n");
 		return NULL;
 	}
 
-	/* don't proceed if we have an endpoint but no panel_node tied to it */
 	panel_node = of_graph_get_remote_port_parent(endpoint);
 	if (!panel_node) {
-		dev_err(dev->dev, "no valid panel node\n");
+		DBG("no valid panel node in LVDS endpoint\n");
 		of_node_put(endpoint);
-		return ERR_PTR(-ENODEV);
+		return NULL;
 	}
 
 	of_node_put(endpoint);

@@ -267,14 +270,12 @@ static int mdp4_modeset_init_intf(struct mdp4_kms *mdp4_kms,
 	switch (intf_type) {
 	case DRM_MODE_ENCODER_LVDS:
 		/*
-		 * bail out early if:
-		 * - there is no panel node (no need to initialize lcdc
-		 *   encoder and lvds connector), or
-		 * - panel node is a bad pointer
+		 * bail out early if there is no panel node (no need to
+		 * initialize LCDC encoder and LVDS connector)
 		 */
 		panel_node = mdp4_detect_lcdc_panel(dev);
-		if (IS_ERR_OR_NULL(panel_node))
-			return PTR_ERR(panel_node);
+		if (!panel_node)
+			return 0;
 
 		encoder = mdp4_lcdc_encoder_init(dev, panel_node);
 		if (IS_ERR(encoder)) {
Signature · 7 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation

_______________________________________________
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author
#2 lore raw

PATCH 2/4 drm/msm/hdmi: Use more DT friendly GPIO names

In reply to Archit Taneja

Update the gpio name parsing code to try to search for without the "qcom,hdmi-tx-" prefix. The older downstream bindings that expect "qcom,hdmi-tx-xyz" or "qcom,hdmi-tx-xyz-gpio" would work as the property name would work as before.

Update the binding doc. Add an entry for the missing hpd and lpm gpios.

Cc Rob Herring <[email protected]>
Cc [email protected]
Signed-off-by Archit Taneja <[email protected]>
---
 Documentation/devicetree/bindings/display/msm/hdmi.txt |  6 ++++--
 drivers/gpu/drm/msm/hdmi/hdmi.c                        | 16 ++++++++++++++++
 2 files changed, 20 insertions(+), 2 deletions(-)
Documentation/devicetree/bindings/display/msm/hdmi.txt +4 -2
index b63f614..4da1abd 100644
@@ -23,8 +23,10 @@ Required properties:
 - phy-names: the name of the corresponding PHY device
 
 Optional properties:
-- qcom,hdmi-tx-mux-en-gpio: hdmi mux enable pin
-- qcom,hdmi-tx-mux-sel-gpio: hdmi mux select pin
+- hpd-gpio: hdmi hpd pin
+- mux-en-gpio: hdmi mux enable pin
+- mux-sel-gpio: hdmi mux select pin
+- mux-lpm-gpio: hdmi mux lpm pin
 - power-domains: reference to the power domain(s), if available.
 - pinctrl-names: the pin control state names; should contain "default"
 - pinctrl-0: the default pinctrl state (active)
drivers/gpu/drm/msm/hdmi/hdmi.c +16 -0
index 51b9ea5..d48305f 100644
@@ -422,11 +422,27 @@ static const struct {
 static int msm_hdmi_get_gpio(struct device_node *of_node, const char *name)
 {
 	int gpio = of_get_named_gpio(of_node, name, 0);
+
+	/*
+	 * This is complicated mainly because we want the downstream kernel
+	 * DT files working with the upstream kernel. We first try with the
+	 * names as listed above in the table. We then append "gpio" to it and
+	 * try again. We finally try the DT bindings as they would be in
+	 * upstream dtsi files by stripping off the "qcom,hdmi-tx-" prefix.
+	 * We'll get rid of this when we don't rely on downstream bindings.
+	 */
 	if (gpio < 0) {
 		char name2[32];
 		snprintf(name2, sizeof(name2), "%s-gpio", name);
 		gpio = of_get_named_gpio(of_node, name2, 0);
 		if (gpio < 0) {
+			char name3[32];
+
+			if (sscanf(name2, "qcom,hdmi-tx-%s", name3))
+				gpio = of_get_named_gpio(of_node, name3, 0);
+		}
+
+		if (gpio < 0) {
 			DBG("failed to get gpio: %s (%d)", name, gpio);
 			gpio = -1;
 		}
Signature · 2 lines
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hosted by The Linux Foundation
maintainer
#3 lore raw

Re: [PATCH 2/4] drm/msm/hdmi: Use more DT friendly GPIO names

Quoted 4 lines · Archit Taneja

Update the gpio name parsing code to try to search for without the "qcom,hdmi-tx-" prefix. The older downstream bindings that expect "qcom,hdmi-tx-xyz" or "qcom,hdmi-tx-xyz-gpio" would work as the property name would work as before.

Why?

Quoted 17 lines

Update the binding doc. Add an entry for the missing hpd and lpm gpios.

Cc Rob Herring <[email protected]>
Cc [email protected]
Signed-off-by Archit Taneja <[email protected]>
---
 Documentation/devicetree/bindings/display/msm/hdmi.txt |  6 ++++--
 drivers/gpu/drm/msm/hdmi/hdmi.c                        | 16 ++++++++++++++++
 2 files changed, 20 insertions(+), 2 deletions(-)
Documentation/devicetree/bindings/display/msm/hdmi.txt +0 -0
index b63f614..4da1abd 100644

Documentation/devicetree/bindings/display/msm/hdmi.txt Required properties: · line 26

Quoted 6 lines
Documentation/devicetree/bindings/display/msm/hdmi.txt +1 -2
@@ -23,8 +23,10 @@ Required properties:
 - phy-names: the name of the corresponding PHY device
 
 Optional properties:
-- qcom,hdmi-tx-mux-en-gpio: hdmi mux enable pin
-- qcom,hdmi-tx-mux-sel-gpio: hdmi mux select pin
+- hpd-gpio: hdmi hpd pin

hpd-gpios is the somewhat standard name.

Documentation/devicetree/bindings/display/msm/hdmi.txt Required properties: · line 29

Quoted 3 lines
Documentation/devicetree/bindings/display/msm/hdmi.txt +3 -0
+- mux-en-gpio: hdmi mux enable pin
+- mux-sel-gpio: hdmi mux select pin
+- mux-lpm-gpio: hdmi mux lpm pin

These look pretty QCom specific and should keep the vendor prefix.

I understand why you don't have '-gpios', but if we change these they should use the preferred form.

Rob
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author
#4 lore raw

Re: [PATCH 2/4] drm/msm/hdmi: Use more DT friendly GPIO names

Quoted 7 lines · Rob Herring
Quoted 4 lines · Archit Taneja

Update the gpio name parsing code to try to search for without the "qcom,hdmi-tx-" prefix. The older downstream bindings that expect "qcom,hdmi-tx-xyz" or "qcom,hdmi-tx-xyz-gpio" would work as the property name would work as before.

Why?

Why we want the older names to work? Just to make life easier if backporting the drm driver to a downstream msm kernel (like a 3.10, or 3.18).

Quoted 27 lines
Quoted 18 lines

Update the binding doc. Add an entry for the missing hpd and lpm gpios.

Cc Rob Herring <[email protected]>
Cc [email protected]
Signed-off-by Archit Taneja <[email protected]>
---
  Documentation/devicetree/bindings/display/msm/hdmi.txt |  6 ++++--
  drivers/gpu/drm/msm/hdmi/hdmi.c                        | 16 ++++++++++++++++
  2 files changed, 20 insertions(+), 2 deletions(-)
Documentation/devicetree/bindings/display/msm/hdmi.txt +0 -0
index b63f614..4da1abd 100644

Documentation/devicetree/bindings/display/msm/hdmi.txt Required properties: · line 26

Quoted 6 lines
Documentation/devicetree/bindings/display/msm/hdmi.txt +1 -2
@@ -23,8 +23,10 @@ Required properties:
  - phy-names: the name of the corresponding PHY device
 
  Optional properties:
-- qcom,hdmi-tx-mux-en-gpio: hdmi mux enable pin
-- qcom,hdmi-tx-mux-sel-gpio: hdmi mux select pin
+- hpd-gpio: hdmi hpd pin

hpd-gpios is the somewhat standard name.

Quoted 5 lines

Documentation/devicetree/bindings/display/msm/hdmi.txt Required properties: · line 29

Quoted 3 lines
Documentation/devicetree/bindings/display/msm/hdmi.txt +3 -0
+- mux-en-gpio: hdmi mux enable pin
+- mux-sel-gpio: hdmi mux select pin
+- mux-lpm-gpio: hdmi mux lpm pin

These look pretty QCom specific and should keep the vendor prefix.

Okay.

Quoted 3 lines

I understand why you don't have '-gpios', but if we change these they should use the preferred form.

Sure, I'll update these to the preferred form.

Archit

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a Linux Foundation Collaborative Project
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author
#5 lore raw

PATCH 3/4 arm: dts: qcom: apq8064: Add display DT nodes

In reply to Archit Taneja

APQ8064 contains a MDP4 based display controller. It contains a HDMI, LVDS and 2 DSI outputs.

Add display DT nodes for MDP4, HDMI TX and HDMI PHY. MDP4 based display blocks have a flat device hierarchy.

Nodes for other outputs will be added later.

Cc Rob Herring <[email protected]>
Cc [email protected]
Signed-off-by Archit Taneja <[email protected]>
---
 arch/arm/boot/dts/qcom-apq8064.dtsi | 91 +++++++++++++++++++++++++++++++++++++
 1 file changed, 91 insertions(+)
arch/arm/boot/dts/qcom-apq8064.dtsi +91 -0
index df96ccd..435a3ab 100644
@@ -946,6 +946,97 @@
 			reset-names = "axi", "ahb", "por", "pci", "phy";
 			status = "disabled";
 		};
+
+		hdmi: hdmi-tx@4a00000 {
+			compatible = "qcom,hdmi-tx-8960";
+			reg = <0x04a00000 0x2f0>;
+			reg-names = "core_physical";
+			interrupts = <GIC_SPI 79 IRQ_TYPE_NONE>;
+			clocks = <&mmcc HDMI_APP_CLK>,
+				 <&mmcc HDMI_M_AHB_CLK>,
+				 <&mmcc HDMI_S_AHB_CLK>;
+			clock-names = "core_clk",
+				      "master_iface_clk",
+				      "slave_iface_clk";
+
+			phys = <&hdmi_phy>;
+			phy-names = "hdmi-phy";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+					hdmi_in: endpoint {
+					};
+				};
+
+				port@1 {
+					reg = <1>;
+					hdmi_out: endpoint {
+					};
+				};
+			};
+		};
+
+		hdmi_phy: hdmi-phy@4a00400 {
+			compatible = "qcom,hdmi-phy-8960";
+			reg = <0x4a00400 0x60>,
+			      <0x4a00500 0x100>;
+			reg-names = "hdmi_phy",
+				    "hdmi_pll";
+
+			clocks = <&mmcc HDMI_S_AHB_CLK>;
+			clock-names = "slave_iface_clk";
+		};
+
+		mdp: mdp@5100000 {
+			compatible = "qcom,mdp4";
+			reg = <0x05100000 0xf0000>;
+			interrupts = <GIC_SPI 75 IRQ_TYPE_NONE>;
+			clocks = <&mmcc MDP_CLK>,
+				 <&mmcc MDP_AHB_CLK>,
+				 <&mmcc MDP_AXI_CLK>,
+				 <&mmcc MDP_LUT_CLK>,
+				 <&mmcc HDMI_TV_CLK>,
+				 <&mmcc MDP_TV_CLK>;
+			clock-names = "core_clk",
+				      "iface_clk",
+				      "bus_clk",
+				      "lut_clk",
+				      "hdmi_clk",
+				      "tv_clk";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+					mdp_lvds_out: endpoint {
+					};
+				};
+
+				port@1 {
+					reg = <1>;
+					mdp_dsi1_out: endpoint {
+					};
+				};
+
+				port@2 {
+					reg = <2>;
+					mdp_dsi2_out: endpoint {
+					};
+				};
+
+				port@3 {
+					reg = <3>;
+					mdp_dtv_out: endpoint {
+					};
+				};
+			};
+		};
 	};
 };
 #include "qcom-apq8064-pins.dtsi"
Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation
author
#6 lore raw

PATCH 4/4 arm: dts: qcom: apq8064-ifc6410: Add HDMI support

In reply to Archit Taneja

Add HDMI support on IFC6410. Populate the regulators required by HDMI-TX and PHY. Establish the link between the MDP4 DTV encoder and HDMI. Create a generic micro HDMI connector DT node. The msm drm driver doesn't parse for HDMI connectors in DT, but it will do so later.

Cc Rob Herring <[email protected]>
Cc [email protected]
Signed-off-by Archit Taneja <[email protected]>
---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 74 ++++++++++++++++++++++++++++++
 1 file changed, 74 insertions(+)
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +74 -0
index 2eeb090..dfe23af 100644
@@ -43,6 +43,17 @@
 		};
 	};
 
+	hdmi-out {
+		compatible = "hdmi-connector";
+		type = "d";
+
+		port {
+			hdmi_con: endpoint {
+				remote-endpoint = <&hdmi_out>;
+			};
+		};
+	};
+
 	soc {
 		pinctrl@800000 {
 			card_detect: card_detect {

@@ -64,6 +75,25 @@
 					bias-disable;
 				};
 			};
+
+			hdmi_pinctrl: hdmi-pinctrl {
+				mux {
+					pins = "gpio70", "gpio71", "gpio72";
+					function = "hdmi";
+				};
+
+				pinconf_ddc {
+					pins = "gpio70", "gpio71";
+					bias-pull-up;
+					drive-strength = <2>;
+				};
+
+				pinconf_hpd {
+					pins = "gpio72";
+					bias-pull-down;
+					drive-strength = <16>;
+				};
+			};
 		};
 
 		rpm@108000 {

@@ -329,5 +359,49 @@
 				mmc-pwrseq = <&sdcc4_pwrseq>;
 			};
 		};
+
+		hdmi-tx@4a00000 {
+			status = "okay";
+
+			core-vdda-supply = <&pm8921_hdmi_switch>;
+			hdmi-mux-supply = <&ext_3p3v>;
+
+			hpd-gpio = <&tlmm_pinmux 72 GPIO_ACTIVE_HIGH>;
+
+			pinctrl-names = "default";
+			pinctrl-0 = <&hdmi_pinctrl>;
+
+			ports {
+				port@0 {
+					endpoint {
+						remote-endpoint = <&mdp_dtv_out>;
+					};
+				};
+
+				port@1 {
+					endpoint {
+						remote-endpoint = <&hdmi_con>;
+					};
+				};
+			};
+		};
+
+		hdmi-phy@4a00400 {
+			status = "okay";
+
+			core-vdda-supply = <&pm8921_hdmi_switch>;
+		};
+
+		mdp@5100000 {
+			status = "okay";
+
+			ports {
+				port@3 {
+					endpoint {
+						remote-endpoint = <&hdmi_in>;
+					};
+				};
+			};
+		};
 	};
 };
Signature · 2 lines
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hosted by The Linux Foundation
author
#7 lore raw

v2 cover drm/msm: HDMI support on IFC6410

In reply to Archit Taneja

This set adds the display DT parts for the APQ8064 based IFC6410 board. There were a couple of small fixes/cleanups required in the driver to use the correct bindings. Those are a part of this patchset too.

Changes in v2:
- Incorporated comments on HDMI gpio bindings as suggested by Rob H.

Archit Taneja (4):
drm/msm/mdp4: Fix issue with LCDC/LVDS port parsing drm/msm/hdmi: Clean up HDMI gpio DT bindings
arm: dts: qcom: apq8064: Add display DT nodes
arm: dts: qcom: apq8064-ifc6410: Add HDMI support

 .../devicetree/bindings/display/msm/hdmi.txt       | 11 +--
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts         | 74 ++++++++++++++++++
 arch/arm/boot/dts/qcom-apq8064.dtsi                | 91 ++++++++++++++++++++++
 drivers/gpu/drm/msm/hdmi/hdmi.c                    | 21 ++++-
 drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c            | 23 +++---
 5 files changed, 202 insertions(+), 18 deletions(-)
Signature · 7 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation

_______________________________________________
dri-devel mailing list
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https://lists.freedesktop.org/mailman/listinfo/dri-devel
author
#8 lore raw

PATCH v2 1/4 drm/msm/mdp4: Fix issue with LCDC/LVDS port parsing

The LVDS port is the first in the list of the output ports in MDP4. The driver assumed that if the port and its corresponding endpoint is defined, then there should be a panel node too. This isn't necessary since boards may not really use a LVDS panel. Don't fail if there isn't a panel node available.

While we're at it, use of_graph_get_endpoint_by_regs instead of of_graph_get_next_endpoint to make it more explicit that the LVDS output is at port 0.

Signed-off-by Archit Taneja <[email protected]>
---
 drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c | 23 ++++++++++++-----------
 1 file changed, 12 insertions(+), 11 deletions(-)
drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c +12 -11
index 7b39e89..571a91e 100644
@@ -228,18 +228,21 @@ static struct device_node *mdp4_detect_lcdc_panel(struct drm_device *dev)
 	struct device_node *endpoint, *panel_node;
 	struct device_node *np = dev->dev->of_node;
 
-	endpoint = of_graph_get_next_endpoint(np, NULL);
+	/*
+	 * LVDS/LCDC is the first port described in the list of ports in the
+	 * MDP4 DT node.
+	 */
+	endpoint = of_graph_get_endpoint_by_regs(np, 0, -1);
 	if (!endpoint) {
-		DBG("no endpoint in MDP4 to fetch LVDS panel\n");
+		DBG("no LVDS remote endpoint\n");
 		return NULL;
 	}
 
-	/* don't proceed if we have an endpoint but no panel_node tied to it */
 	panel_node = of_graph_get_remote_port_parent(endpoint);
 	if (!panel_node) {
-		dev_err(dev->dev, "no valid panel node\n");
+		DBG("no valid panel node in LVDS endpoint\n");
 		of_node_put(endpoint);
-		return ERR_PTR(-ENODEV);
+		return NULL;
 	}
 
 	of_node_put(endpoint);

@@ -262,14 +265,12 @@ static int mdp4_modeset_init_intf(struct mdp4_kms *mdp4_kms,
 	switch (intf_type) {
 	case DRM_MODE_ENCODER_LVDS:
 		/*
-		 * bail out early if:
-		 * - there is no panel node (no need to initialize lcdc
-		 *   encoder and lvds connector), or
-		 * - panel node is a bad pointer
+		 * bail out early if there is no panel node (no need to
+		 * initialize LCDC encoder and LVDS connector)
 		 */
 		panel_node = mdp4_detect_lcdc_panel(dev);
-		if (IS_ERR_OR_NULL(panel_node))
-			return PTR_ERR(panel_node);
+		if (!panel_node)
+			return 0;
 
 		encoder = mdp4_lcdc_encoder_init(dev, panel_node);
 		if (IS_ERR(encoder)) {
Signature · 2 lines
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hosted by The Linux Foundation
Tested-by on v2 1/4
#9 lore raw

Re: [PATCH v2 1/4] drm/msm/mdp4: Fix issue with LCDC/LVDS port parsing

Quoted 11 lines · Archit Taneja

The LVDS port is the first in the list of the output ports in MDP4. The driver assumed that if the port and its corresponding endpoint is defined, then there should be a panel node too. This isn't necessary since boards may not really use a LVDS panel. Don't fail if there isn't a panel node available.

While we're at it, use of_graph_get_endpoint_by_regs instead of of_graph_get_next_endpoint to make it more explicit that the LVDS output is at port 0.

Signed-off-by Archit Taneja <[email protected]>
Tested-by John Stultz <[email protected]>

This is definitely needed to get my n7 up and running.

thanks
-john

author
#10 lore raw

PATCH v2 2/4 drm/msm/hdmi: Clean up HDMI gpio DT bindings

In reply to Archit Taneja

Make the following changes in the HDMI gpio bindings:

- Use "-gpios" as the suffix for all the gpio names
- Move all the gpios to optional, since there are platforms that use none of them.
- The HPD gpio is a standard one, remove the "qcom,hdmi-tx-" prefix from it.
- Add a missing lpm gpio used on some platforms.

Make the necessary changes in the driver to incorporate these changes.

There hasn't been any upstream DT that uses the HDMI bindings, so it's okay to change and move around these properties.

Cc Rob Herring <[email protected]>
Cc [email protected]
Signed-off-by Archit Taneja <[email protected]>

---
v2:
- Keep "qcom,hdmi-tx-" suffix for all gpios except for hpd.
- Use "-gpios" suffix instead of "-gpio".
- Move all the gpios to optional properties.

 .../devicetree/bindings/display/msm/hdmi.txt        | 11 ++++++-----
 drivers/gpu/drm/msm/hdmi/hdmi.c                     | 21 +++++++++++++++++++--
 2 files changed, 25 insertions(+), 7 deletions(-)
Documentation/devicetree/bindings/display/msm/hdmi.txt +6 -5
index ce84459..f1a83ab 100644
@@ -13,17 +13,18 @@ Required properties:
 - interrupts: The interrupt signal from the hdmi block.
 - clocks: device clocks
   See ../clocks/clock-bindings.txt for details.
-- qcom,hdmi-tx-ddc-clk-gpio: ddc clk pin
-- qcom,hdmi-tx-ddc-data-gpio: ddc data pin
-- qcom,hdmi-tx-hpd-gpio: hpd pin
 - core-vdda-supply: phandle to supply regulator
 - hdmi-mux-supply: phandle to mux regulator
 - phys: the phandle for the HDMI PHY device
 - phy-names: the name of the corresponding PHY device
 
 Optional properties:
-- qcom,hdmi-tx-mux-en-gpio: hdmi mux enable pin
-- qcom,hdmi-tx-mux-sel-gpio: hdmi mux select pin
+- qcom,hdmi-tx-ddc-clk-gpios: ddc clk pin
+- qcom,hdmi-tx-ddc-data-gpios: ddc data pin
+- hpd-gpios: hpd pin
+- qcom,hdmi-tx-mux-en-gpios: hdmi mux enable pin
+- qcom,hdmi-tx-mux-sel-gpios: hdmi mux select pin
+- qcom,hdmi-tx-mux-lpm-gpios: hdmi mux lpm pin
 - power-domains: reference to the power domain(s), if available.
 - pinctrl-names: the pin control state names; should contain "default"
 - pinctrl-0: the default pinctrl state (active)
drivers/gpu/drm/msm/hdmi/hdmi.c +19 -2
index 9737207..a968cad 100644
@@ -422,12 +422,29 @@ static const struct {
 
 static int msm_hdmi_get_gpio(struct device_node *of_node, const char *name)
 {
-	int gpio = of_get_named_gpio(of_node, name, 0);
+	int gpio;
+
+	/* try with the gpio names as in the table (downstream bindings) */
+	gpio = of_get_named_gpio(of_node, name, 0);
 	if (gpio < 0) {
 		char name2[32];
-		snprintf(name2, sizeof(name2), "%s-gpio", name);
+
+		/* try with the gpio names as in the upstream bindings */
+		snprintf(name2, sizeof(name2), "%s-gpios", name);
 		gpio = of_get_named_gpio(of_node, name2, 0);
 		if (gpio < 0) {
+			char name3[32];
+
+			/*
+			 * try again after stripping out the "qcom,hdmi-tx"
+			 * prefix. This is mainly to match "hpd-gpios" used
+			 * in the upstream bindings
+			 */
+			if (sscanf(name2, "qcom,hdmi-tx-%s", name3))
+				gpio = of_get_named_gpio(of_node, name3, 0);
+		}
+
+		if (gpio < 0) {
 			DBG("failed to get gpio: %s (%d)", name, gpio);
 			gpio = -1;
 		}
Signature · 2 lines
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hosted by The Linux Foundation

A message that is not in the archive (sent off-list or not yet received): 1472737015-29382-3-git-send-email-architt-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org

Tested-by
#12 lore raw

Re: [PATCH v2 2/4] drm/msm/hdmi: Clean up HDMI gpio DT bindings

Quoted 9 lines · Archit Taneja

Make the following changes in the HDMI gpio bindings:

- Use "-gpios" as the suffix for all the gpio names
- Move all the gpios to optional, since there are platforms that use none of them.
- The HPD gpio is a standard one, remove the "qcom,hdmi-tx-" prefix from it.
- Add a missing lpm gpio used on some platforms.

Quoted 8 lines

Make the necessary changes in the driver to incorporate these changes.

There hasn't been any upstream DT that uses the HDMI bindings, so it's okay to change and move around these properties.

Cc Rob Herring <[email protected]>
Cc [email protected]
Signed-off-by Archit Taneja <[email protected]>
Tested-by John Stultz <[email protected]>

thanks
-john
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#13 lore raw

Re: [PATCH v2 2/4] drm/msm/hdmi: Clean up HDMI gpio DT bindings

In reply to a message not in the archive
Quoted 38 lines · Archit Taneja

Make the following changes in the HDMI gpio bindings:

- Use "-gpios" as the suffix for all the gpio names
- Move all the gpios to optional, since there are platforms that use none of them.
- The HPD gpio is a standard one, remove the "qcom,hdmi-tx-" prefix from it.
- Add a missing lpm gpio used on some platforms.

Make the necessary changes in the driver to incorporate these changes.

There hasn't been any upstream DT that uses the HDMI bindings, so it's okay to change and move around these properties.

Cc Rob Herring <[email protected]>
Cc [email protected]
Signed-off-by Archit Taneja <[email protected]>

---
v2:
- Keep "qcom,hdmi-tx-" suffix for all gpios except for hpd.
- Use "-gpios" suffix instead of "-gpio".
- Move all the gpios to optional properties.

 .../devicetree/bindings/display/msm/hdmi.txt        | 11 ++++++-----
 drivers/gpu/drm/msm/hdmi/hdmi.c                     | 21 +++++++++++++++++++--
 2 files changed, 25 insertions(+), 7 deletions(-)
Documentation/devicetree/bindings/display/msm/hdmi.txt +0 -3
index ce84459..f1a83ab 100644
@@ -13,17 +13,18 @@ Required properties:
 - interrupts: The interrupt signal from the hdmi block.
 - clocks: device clocks
   See ../clocks/clock-bindings.txt for details.
-- qcom,hdmi-tx-ddc-clk-gpio: ddc clk pin
-- qcom,hdmi-tx-ddc-data-gpio: ddc data pin
-- qcom,hdmi-tx-hpd-gpio: hpd pin

Documentation/devicetree/bindings/display/msm/hdmi.txt Required properties: · line 23

Quoted 10 lines
Documentation/devicetree/bindings/display/msm/hdmi.txt +2 -2
 - core-vdda-supply: phandle to supply regulator
 - hdmi-mux-supply: phandle to mux regulator
 - phys: the phandle for the HDMI PHY device
 - phy-names: the name of the corresponding PHY device
 
 Optional properties:
-- qcom,hdmi-tx-mux-en-gpio: hdmi mux enable pin
-- qcom,hdmi-tx-mux-sel-gpio: hdmi mux select pin
+- qcom,hdmi-tx-ddc-clk-gpios: ddc clk pin
+- qcom,hdmi-tx-ddc-data-gpios: ddc data pin

Sorry, for raising another point, but couldn't you use the i2c-gpio binding for these instead?

Documentation/devicetree/bindings/display/msm/hdmi.txt Required properties: · line 30

Quoted 7 lines
Documentation/devicetree/bindings/display/msm/hdmi.txt +4 -0
+- hpd-gpios: hpd pin
+- qcom,hdmi-tx-mux-en-gpios: hdmi mux enable pin
+- qcom,hdmi-tx-mux-sel-gpios: hdmi mux select pin
+- qcom,hdmi-tx-mux-lpm-gpios: hdmi mux lpm pin
 - power-domains: reference to the power domain(s), if available.
 - pinctrl-names: the pin control state names; should contain "default"
 - pinctrl-0: the default pinctrl state (active)

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author
#14 lore raw

Re: [PATCH v2 2/4] drm/msm/hdmi: Clean up HDMI gpio DT bindings

Quoted 44 lines · Rob Herring
Quoted 43 lines · Archit Taneja

Make the following changes in the HDMI gpio bindings:

- Use "-gpios" as the suffix for all the gpio names
- Move all the gpios to optional, since there are platforms that use none of them.
- The HPD gpio is a standard one, remove the "qcom,hdmi-tx-" prefix from it.
- Add a missing lpm gpio used on some platforms.

Make the necessary changes in the driver to incorporate these changes.

There hasn't been any upstream DT that uses the HDMI bindings, so it's okay to change and move around these properties.

Cc Rob Herring <[email protected]>
Cc [email protected]
Signed-off-by Archit Taneja <[email protected]>

---
v2:
- Keep "qcom,hdmi-tx-" suffix for all gpios except for hpd.
- Use "-gpios" suffix instead of "-gpio".
- Move all the gpios to optional properties.

  .../devicetree/bindings/display/msm/hdmi.txt        | 11 ++++++-----
  drivers/gpu/drm/msm/hdmi/hdmi.c                     | 21 +++++++++++++++++++--
  2 files changed, 25 insertions(+), 7 deletions(-)
Documentation/devicetree/bindings/display/msm/hdmi.txt +0 -3
index ce84459..f1a83ab 100644
@@ -13,17 +13,18 @@ Required properties:
  - interrupts: The interrupt signal from the hdmi block.
  - clocks: device clocks
    See ../clocks/clock-bindings.txt for details.
-- qcom,hdmi-tx-ddc-clk-gpio: ddc clk pin
-- qcom,hdmi-tx-ddc-data-gpio: ddc data pin
-- qcom,hdmi-tx-hpd-gpio: hpd pin
  - core-vdda-supply: phandle to supply regulator
  - hdmi-mux-supply: phandle to mux regulator
  - phys: the phandle for the HDMI PHY device
  - phy-names: the name of the corresponding PHY device
Quoted 8 lines

Documentation/devicetree/bindings/display/msm/hdmi.txt Required properties: · line 23

Quoted 5 lines
Documentation/devicetree/bindings/display/msm/hdmi.txt +2 -2
  Optional properties:
-- qcom,hdmi-tx-mux-en-gpio: hdmi mux enable pin
-- qcom,hdmi-tx-mux-sel-gpio: hdmi mux select pin
+- qcom,hdmi-tx-ddc-clk-gpios: ddc clk pin
+- qcom,hdmi-tx-ddc-data-gpios: ddc data pin

Sorry, for raising another point, but couldn't you use the i2c-gpio binding for these instead?

I'm not entirely sure what these are used for either, they predate the APQ8064 SoC. They are certainly not bit-banged to implement i2c, since the driver just sets them to a high during driver initialization, and we have our dedicated i2c controller anyway.

Rob,

Are you aware why we have these for older SoCs?

Thanks,
Archit

Quoted 8 lines
Quoted 8 lines
Documentation/devicetree/bindings/display/msm/hdmi.txt +4 -0
+- hpd-gpios: hpd pin
+- qcom,hdmi-tx-mux-en-gpios: hdmi mux enable pin
+- qcom,hdmi-tx-mux-sel-gpios: hdmi mux select pin
+- qcom,hdmi-tx-mux-lpm-gpios: hdmi mux lpm pin
  - power-domains: reference to the power domain(s), if available.
  - pinctrl-names: the pin control state names; should contain "default"
  - pinctrl-0: the default pinctrl state (active)
Signature · 6 lines
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
_______________________________________________
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author
#15 lore raw

Re: [PATCH v2 2/4] drm/msm/hdmi: Clean up HDMI gpio DT bindings

Quoted 59 lines · Archit Taneja
Quoted 47 lines · Rob Herring
Quoted 46 lines · Archit Taneja

Make the following changes in the HDMI gpio bindings:

- Use "-gpios" as the suffix for all the gpio names
- Move all the gpios to optional, since there are platforms that use none
of them.
- The HPD gpio is a standard one, remove the "qcom,hdmi-tx-" prefix from it.
- Add a missing lpm gpio used on some platforms.

Make the necessary changes in the driver to incorporate these changes.

There hasn't been any upstream DT that uses the HDMI bindings, so it's okay to change and move around these properties.

Cc Rob Herring <[email protected]>
Cc [email protected]
Signed-off-by Archit Taneja <[email protected]>

---
v2:
- Keep "qcom,hdmi-tx-" suffix for all gpios except for hpd.
- Use "-gpios" suffix instead of "-gpio".
- Move all the gpios to optional properties.

  .../devicetree/bindings/display/msm/hdmi.txt        | 11 ++++++-----
  drivers/gpu/drm/msm/hdmi/hdmi.c                     | 21
+++++++++++++++++++--
  2 files changed, 25 insertions(+), 7 deletions(-)
Documentation/devicetree/bindings/display/msm/hdmi.txt +0 -3
index ce84459..f1a83ab 100644
@@ -13,17 +13,18 @@ Required properties:
  - interrupts: The interrupt signal from the hdmi block.
  - clocks: device clocks
    See ../clocks/clock-bindings.txt for details.
-- qcom,hdmi-tx-ddc-clk-gpio: ddc clk pin
-- qcom,hdmi-tx-ddc-data-gpio: ddc data pin
-- qcom,hdmi-tx-hpd-gpio: hpd pin
  - core-vdda-supply: phandle to supply regulator
  - hdmi-mux-supply: phandle to mux regulator
  - phys: the phandle for the HDMI PHY device
  - phy-names: the name of the corresponding PHY device
Quoted 8 lines

Documentation/devicetree/bindings/display/msm/hdmi.txt Required properties: · line 23

Quoted 5 lines
Documentation/devicetree/bindings/display/msm/hdmi.txt +2 -2
  Optional properties:
-- qcom,hdmi-tx-mux-en-gpio: hdmi mux enable pin
-- qcom,hdmi-tx-mux-sel-gpio: hdmi mux select pin
+- qcom,hdmi-tx-ddc-clk-gpios: ddc clk pin
+- qcom,hdmi-tx-ddc-data-gpios: ddc data pin

Sorry, for raising another point, but couldn't you use the i2c-gpio binding for these instead?

Quoted 5 lines

I'm not entirely sure what these are used for either, they predate the APQ8064 SoC. They are certainly not bit-banged to implement i2c, since the driver just sets them to a high during driver initialization, and we have our dedicated i2c controller anyway.

I just checked some old qualcomm kernels. It looks like they were passed as gpios just so that the pins could be configured(function, pull up/down, strength etc) using gpiolib api. I guess these kernels predated pinctrl drivers.

I will post a new revision of the patch with these removed.

Thanks,
Archit

Quoted 16 lines

Rob,

Are you aware why we have these for older SoCs?

Thanks,
Archit

Quoted 8 lines
Quoted 8 lines
Documentation/devicetree/bindings/display/msm/hdmi.txt +4 -0
+- hpd-gpios: hpd pin
+- qcom,hdmi-tx-mux-en-gpios: hdmi mux enable pin
+- qcom,hdmi-tx-mux-sel-gpios: hdmi mux select pin
+- qcom,hdmi-tx-mux-lpm-gpios: hdmi mux lpm pin
  - power-domains: reference to the power domain(s), if available.
  - pinctrl-names: the pin control state names; should contain "default"
  - pinctrl-0: the default pinctrl state (active)
Signature · 2 lines
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
author
#16 lore raw

PATCH v2 3/4 arm: dts: qcom: apq8064: Add display DT nodes

In reply to Archit Taneja

APQ8064 contains a MDP4 based display controller. It contains a HDMI, LVDS and 2 DSI outputs.

Add display DT nodes for MDP4, HDMI TX and HDMI PHY. MDP4 based display blocks have a flat device hierarchy.

Nodes for other outputs will be added later.

Cc Rob Herring <[email protected]>
Cc [email protected]
Signed-off-by Archit Taneja <[email protected]>
---
 arch/arm/boot/dts/qcom-apq8064.dtsi | 91 +++++++++++++++++++++++++++++++++++++
 1 file changed, 91 insertions(+)
arch/arm/boot/dts/qcom-apq8064.dtsi +91 -0
index 74a9b6c..b688fb6 100644
@@ -955,6 +955,97 @@
 			reset-names = "axi", "ahb", "por", "pci", "phy";
 			status = "disabled";
 		};
+
+		hdmi: hdmi-tx@4a00000 {
+			compatible = "qcom,hdmi-tx-8960";
+			reg = <0x04a00000 0x2f0>;
+			reg-names = "core_physical";
+			interrupts = <GIC_SPI 79 IRQ_TYPE_NONE>;
+			clocks = <&mmcc HDMI_APP_CLK>,
+				 <&mmcc HDMI_M_AHB_CLK>,
+				 <&mmcc HDMI_S_AHB_CLK>;
+			clock-names = "core_clk",
+				      "master_iface_clk",
+				      "slave_iface_clk";
+
+			phys = <&hdmi_phy>;
+			phy-names = "hdmi-phy";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+					hdmi_in: endpoint {
+					};
+				};
+
+				port@1 {
+					reg = <1>;
+					hdmi_out: endpoint {
+					};
+				};
+			};
+		};
+
+		hdmi_phy: hdmi-phy@4a00400 {
+			compatible = "qcom,hdmi-phy-8960";
+			reg = <0x4a00400 0x60>,
+			      <0x4a00500 0x100>;
+			reg-names = "hdmi_phy",
+				    "hdmi_pll";
+
+			clocks = <&mmcc HDMI_S_AHB_CLK>;
+			clock-names = "slave_iface_clk";
+		};
+
+		mdp: mdp@5100000 {
+			compatible = "qcom,mdp4";
+			reg = <0x05100000 0xf0000>;
+			interrupts = <GIC_SPI 75 IRQ_TYPE_NONE>;
+			clocks = <&mmcc MDP_CLK>,
+				 <&mmcc MDP_AHB_CLK>,
+				 <&mmcc MDP_AXI_CLK>,
+				 <&mmcc MDP_LUT_CLK>,
+				 <&mmcc HDMI_TV_CLK>,
+				 <&mmcc MDP_TV_CLK>;
+			clock-names = "core_clk",
+				      "iface_clk",
+				      "bus_clk",
+				      "lut_clk",
+				      "hdmi_clk",
+				      "tv_clk";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+					mdp_lvds_out: endpoint {
+					};
+				};
+
+				port@1 {
+					reg = <1>;
+					mdp_dsi1_out: endpoint {
+					};
+				};
+
+				port@2 {
+					reg = <2>;
+					mdp_dsi2_out: endpoint {
+					};
+				};
+
+				port@3 {
+					reg = <3>;
+					mdp_dtv_out: endpoint {
+					};
+				};
+			};
+		};
 	};
 };
 #include "qcom-apq8064-pins.dtsi"
Signature · 7 lines
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hosted by The Linux Foundation

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Tested-by on v2 3/4
#17 lore raw

Re: [PATCH v2 3/4] arm: dts: qcom: apq8064: Add display DT nodes

Quoted 5 lines · Archit Taneja

APQ8064 contains a MDP4 based display controller. It contains a HDMI, LVDS and 2 DSI outputs.

Add display DT nodes for MDP4, HDMI TX and HDMI PHY. MDP4 based display blocks have a flat device hierarchy.

While the nexus7 uses DSI (and requires additional dts changes), the mdp4 bits here are required to get things going.

Tested-by John Stultz <[email protected]>

thanks
-john

author
#18 lore raw

PATCH v2 4/4 arm: dts: qcom: apq8064-ifc6410: Add HDMI support

In reply to Archit Taneja

Add HDMI support on IFC6410. Populate the regulators required by HDMI-TX and PHY. Establish the link between the MDP4 DTV encoder and HDMI. Create a generic micro HDMI connector DT node. The msm drm driver doesn't parse for HDMI connectors in DT, but it will do so later.

Cc Rob Herring <[email protected]>
Cc [email protected]
Signed-off-by Archit Taneja <[email protected]>
---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 74 ++++++++++++++++++++++++++++++
 1 file changed, 74 insertions(+)
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +74 -0
index 2eeb090..3d37cab 100644
@@ -43,6 +43,17 @@
 		};
 	};
 
+	hdmi-out {
+		compatible = "hdmi-connector";
+		type = "d";
+
+		port {
+			hdmi_con: endpoint {
+				remote-endpoint = <&hdmi_out>;
+			};
+		};
+	};
+
 	soc {
 		pinctrl@800000 {
 			card_detect: card_detect {

@@ -64,6 +75,25 @@
 					bias-disable;
 				};
 			};
+
+			hdmi_pinctrl: hdmi-pinctrl {
+				mux {
+					pins = "gpio70", "gpio71", "gpio72";
+					function = "hdmi";
+				};
+
+				pinconf_ddc {
+					pins = "gpio70", "gpio71";
+					bias-pull-up;
+					drive-strength = <2>;
+				};
+
+				pinconf_hpd {
+					pins = "gpio72";
+					bias-pull-down;
+					drive-strength = <16>;
+				};
+			};
 		};
 
 		rpm@108000 {

@@ -329,5 +359,49 @@
 				mmc-pwrseq = <&sdcc4_pwrseq>;
 			};
 		};
+
+		hdmi-tx@4a00000 {
+			status = "okay";
+
+			core-vdda-supply = <&pm8921_hdmi_switch>;
+			hdmi-mux-supply = <&ext_3p3v>;
+
+			hpd-gpios = <&tlmm_pinmux 72 GPIO_ACTIVE_HIGH>;
+
+			pinctrl-names = "default";
+			pinctrl-0 = <&hdmi_pinctrl>;
+
+			ports {
+				port@0 {
+					endpoint {
+						remote-endpoint = <&mdp_dtv_out>;
+					};
+				};
+
+				port@1 {
+					endpoint {
+						remote-endpoint = <&hdmi_con>;
+					};
+				};
+			};
+		};
+
+		hdmi-phy@4a00400 {
+			status = "okay";
+
+			core-vdda-supply = <&pm8921_hdmi_switch>;
+		};
+
+		mdp@5100000 {
+			status = "okay";
+
+			ports {
+				port@3 {
+					endpoint {
+						remote-endpoint = <&hdmi_in>;
+					};
+				};
+			};
+		};
 	};
 };
Signature · 7 lines
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hosted by The Linux Foundation

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#19 lore raw

[RFC][PATCH 5/4] arm: dts: qcom: apq8064: Add dsi, gpu and iommu nodes

In reply to Archit Taneja

Sort of tagging on to Archit's patchset here.

Adds the core gpu, and dsi nodes for the apq8064 needed to get graphics working on the nexus7 and other devices.

Feedback would be greatly appreciated!

Cc Archit Taneja <[email protected]>
Cc vinay simha <[email protected]>
Cc [email protected]
Cc [email protected]
Cc [email protected]
Cc [email protected]
Signed-off-by John Stultz <[email protected]>
---
 arch/arm/boot/dts/qcom-apq8064-pins.dtsi |  10 ++
 arch/arm/boot/dts/qcom-apq8064.dtsi      | 227 +++++++++++++++++++++++++++++++
 2 files changed, 237 insertions(+)
arch/arm/boot/dts/qcom-apq8064-pins.dtsi +10 -0
index 6b801e7..7bb0677 100644
@@ -284,4 +284,14 @@
 			bias-disable = <0>;
 		};
 	};
+
+	dsi_panel_pinctrl: dsi-panel-pinctrl {
+		mux {
+			pins = "gpio54";
+			function = "gpio";
+			bias-pull-up;
+			drive-strength = <8>;
+		};
+	};
+
 };
arch/arm/boot/dts/qcom-apq8064.dtsi +227 -0

239 lines not on this page · raw message

Signature · 6 lines
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#20 lore raw

[PATCH 6/4] arm: dts: qcom: apq8064-nexus7: Add DSI and panel nodes

Tagging on to Archit's patchset here.

Add DSI and panel nodes to get graphics up and running on the Nexus7.

This still depends on the panel driver being present (currently under review) along with the rpmclk code.

Feedback would be appreciated here!

Cc Archit Taneja <[email protected]>
Cc vinay simha <[email protected]>
Cc [email protected]
Cc [email protected]
Cc [email protected]
Cc [email protected]
Signed-off-by John Stultz <[email protected]>
---
 arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts | 78 +++++++++++++++++++++-
 1 file changed, 76 insertions(+), 2 deletions(-)
arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts +76 -2
index ff856c3..e25a764 100644
@@ -27,6 +27,18 @@
 		regulator-boot-on;
 	};
 
+	vcc_1p8v: regulator-fixed@2 {
+		compatible = "regulator-fixed";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		regulator-name = "vcc_1p8v";
+		regulator-type = "voltage";
+		startup-delay-us = <0>;
+		gpio = <&pm8921_gpio 23 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+		regulator-boot-on;
+	};
+
 	gpio-keys {
 		compatible = "gpio-keys";
 		volume_up {

@@ -99,6 +111,7 @@
 				l2 {
 					regulator-min-microvolt = <1200000>;
 					regulator-max-microvolt = <1200000>;
+					regulator-always-on;
 				};
 
 				/* msm_otg-HSUSB_3p3 */

@@ -133,13 +146,14 @@
 					regulator-min-microvolt = <3000000>;
 					regulator-max-microvolt = <3000000>;
 					bias-pull-down;
+					regulator-always-on;
 				};
 
 				/* pwm_power for backlight */
 				l17 {
 					regulator-min-microvolt = <3000000>;
-					regulator-max-microvolt = <3600000>;
-					bias-pull-down;
+					regulator-max-microvolt = <3000000>;
+					regulator-always-on;
 				};
 
 				/* camera, qdsp6 */

@@ -184,6 +198,66 @@
 			};
 		};
 
+		mdp@5100000 {
+			status = "okay";
+			ports {
+				port@1 {
+					mdp_dsi1_out: endpoint {
+						remote-endpoint = <&dsi0_in>;
+					};
+				};
+			};
+		};
+
+		dsi0: qcom,mdss_dsi@4700000 {
+			status = "okay";
+			vdda-supply = <&pm8921_l2>;/*VDD_MIPI1 to 4*/
+			vdd-supply = <&pm8921_l8>;
+			vddio-supply = <&pm8921_lvs7>;
+			avdd-supply = <&pm8921_l11>;
+			vcss-supply = <&ext_3p3v>;
+
+			panel@0 {
+				reg = <0>;
+				compatible = "jdi,lt070me05000";
+
+				pinctrl-names = "default";
+				pinctrl-0 = <&dsi_panel_pinctrl>;
+
+				vddp-supply = <&pm8921_l17>;
+				dcdc_en-supply = <&pm8921_lvs7>;
+				vcc-supply = <&vcc_1p8v>;
+
+				reset-gpios = <&tlmm_pinmux 54 0>;
+				enable-gpios = <&pm8921_gpio 36 GPIO_ACTIVE_HIGH>;
+
+				port {
+					panel_in: endpoint {
+						remote-endpoint = <&dsi0_out>;
+					};
+				};
+			};
+			ports {
+				port@0 {
+					dsi0_in: endpoint {
+						remote-endpoint = <&mdp_dsi1_out>;
+					};
+				};
+
+				port@1 {
+					dsi0_out: endpoint {
+						remote-endpoint = <&panel_in>;
+						data-lanes = <0 1 2 3>;
+					};
+				};
+			};
+		};
+
+		mdp_dsi_phy0: qcom,mdss_dsi_phy@4700200 {
+			status = "okay";
+			vddio-supply = <&pm8921_lvs7>;/*VDD_PLL2_1 to 7*/
+		};
+
 		gsbi@16200000 {
 			status = "okay";
 			qcom,mode = <GSBI_PROT_I2C>;
Signature · 6 lines
1.9.1

_______________________________________________
dri-devel mailing list
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https://lists.freedesktop.org/mailman/listinfo/dri-devel
#21 lore raw

Re: [PATCH 6/4] arm: dts: qcom: apq8064-nexus7: Add DSI and panel nodes

Regards,
vinay simha

Quoted 31 lines · John Stultz

Tagging on to Archit's patchset here.

Add DSI and panel nodes to get graphics up and running on the Nexus7.

This still depends on the panel driver being present (currently under review) along with the rpmclk code.

Feedback would be appreciated here!

Cc Archit Taneja <[email protected]>
Cc vinay simha <[email protected]>
Cc [email protected]
Cc [email protected]
Cc [email protected]
Cc [email protected]
Signed-off-by John Stultz <[email protected]>
---
 arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts | 78 +++++++++++++++++++++-
 1 file changed, 76 insertions(+), 2 deletions(-)
arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts +2 -0
index ff856c3..e25a764 100644
@@ -27,6 +27,18 @@
                regulator-boot-on;
        };
 
+       vcc_1p8v: regulator-fixed@2 {
+               compatible = "regulator-fixed";

arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts line 41

Quoted 10 lines
arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts +10 -0
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <1800000>;
+               regulator-name = "vcc_1p8v";
+               regulator-type = "voltage";
+               startup-delay-us = <0>;
+               gpio = <&pm8921_gpio 23 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+               regulator-boot-on;
+       };
+

We can remove the vcc_1p8v, some modification had done in the panel tree

Quoted 55 lines
arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts +27 -2
        gpio-keys {
                compatible = "gpio-keys";
                volume_up {

@@ -99,6 +111,7 @@
                                l2 {
                                        regulator-min-microvolt = <1200000>;
                                        regulator-max-microvolt = <1200000>;
+                                       regulator-always-on;
                                };
 
                                /* msm_otg-HSUSB_3p3 */

@@ -133,13 +146,14 @@
                                        regulator-min-microvolt = <3000000>;
                                        regulator-max-microvolt = <3000000>;
                                        bias-pull-down;
+                                       regulator-always-on;
                                };
 
                                /* pwm_power for backlight */
                                l17 {
                                        regulator-min-microvolt = <3000000>;
-                                       regulator-max-microvolt = <3600000>;
-                                       bias-pull-down;
+                                       regulator-max-microvolt = <3000000>;
+                                       regulator-always-on;
                                };
 
                                /* camera, qdsp6 */

@@ -184,6 +198,66 @@
                        };
                };
 
+               mdp@5100000 {
+                       status = "okay";
+                       ports {
+                               port@1 {
+                                       mdp_dsi1_out: endpoint {
+                                               remote-endpoint = <&dsi0_in>;
+                                       };
+                               };
+                       };
+               };
+
+               dsi0: qcom,mdss_dsi@4700000 {
+                       status = "okay";
+                       vdda-supply = <&pm8921_l2>;/*VDD_MIPI1 to 4*/
+                       vdd-supply = <&pm8921_l8>;
+                       vddio-supply = <&pm8921_lvs7>;
+                       avdd-supply = <&pm8921_l11>;
+                       vcss-supply = <&ext_3p3v>;
+
+                       panel@0 {
+                               reg = <0>;
+                               compatible = "jdi,lt070me05000";
+

arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts line 233

Quoted 10 lines
arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts +10 -0
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&dsi_panel_pinctrl>;
+
+                               vddp-supply = <&pm8921_l17>;
+                               dcdc_en-supply = <&pm8921_lvs7>;
+                               vcc-supply = <&vcc_1p8v>;
+
+                               reset-gpios = <&tlmm_pinmux 54 0>;
+                               enable-gpios = <&pm8921_gpio 36 GPIO_ACTIVE_HIGH>;
+

We can remove the pinctrl-names and pinctrl-0, have the below contents lilke this

  panel@0 {
                      compatible = "jdi,lt070me05000";
                      reg = <0>;

                      vddp-supply = <&pm8921_l17>;
                      iovcc-supply = <&pm8921_lvs7>;

                       enable-gpios = <&pm8921_gpio 36 GPIO_ACTIVE_HIGH>;
                       reset-gpios = <&tlmm_pinmux 54 GPIO_ACTIVE_LOW>;
                       dcdc-en-gpios = <&pm8921_gpio 23 GPIO_ACTIVE_HIGH>;
Quoted 33 lines
arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts +27 -1
+                               port {
+                                       panel_in: endpoint {
+                                               remote-endpoint = <&dsi0_out>;
+                                       };
+                               };
+                       };
+                       ports {
+                               port@0 {
+                                       dsi0_in: endpoint {
+                                               remote-endpoint = <&mdp_dsi1_out>;
+                                       };
+                               };
+
+                               port@1 {
+                                       dsi0_out: endpoint {
+                                               remote-endpoint = <&panel_in>;
+                                               data-lanes = <0 1 2 3>;
+                                       };
+                               };
+                       };
+               };
+
+               mdp_dsi_phy0: qcom,mdss_dsi_phy@4700200 {
+                       status = "okay";
+                       vddio-supply = <&pm8921_lvs7>;/*VDD_PLL2_1 to 7*/
+               };
+
                gsbi@16200000 {
                        status = "okay";
                        qcom,mode = <GSBI_PROT_I2C>;
--

1.9.1

#22 lore raw

Re: [RFC][PATCH 5/4] arm: dts: qcom: apq8064: Add dsi, gpu and iommu nodes

In reply to John Stultz

Regards,
vinay simha

Quoted 28 lines · John Stultz

Sort of tagging on to Archit's patchset here.

Adds the core gpu, and dsi nodes for the apq8064 needed to get graphics working on the nexus7 and other devices.

Feedback would be greatly appreciated!

Cc Archit Taneja <[email protected]>
Cc vinay simha <[email protected]>
Cc [email protected]
Cc [email protected]
Cc [email protected]
Cc [email protected]
Signed-off-by John Stultz <[email protected]>
---
 arch/arm/boot/dts/qcom-apq8064-pins.dtsi |  10 ++
 arch/arm/boot/dts/qcom-apq8064.dtsi      | 227 +++++++++++++++++++++++++++++++
 2 files changed, 237 insertions(+)
arch/arm/boot/dts/qcom-apq8064-pins.dtsi +0 -0
index 6b801e7..7bb0677 100644
@@ -284,4 +284,14 @@
                        bias-disable = <0>;
                };
        };

arch/arm/boot/dts/qcom-apq8064-pins.dtsi line 296

Quoted 10 lines
arch/arm/boot/dts/qcom-apq8064-pins.dtsi +10 -0
+
+       dsi_panel_pinctrl: dsi-panel-pinctrl {
+               mux {
+                       pins = "gpio54";
+                       function = "gpio";
+                       bias-pull-up;
+                       drive-strength = <8>;
+               };
+       };
+

panel_pinctrl not required. We need to modify in the qcom-apq8064-asus-nexus7-flo.dts reset-gpios = <&tlmm_pinmux 54 GPIO_ACTIVE_LOW>; , revert the gpio logic in panel driver. (in the latest patch set (DI LT070ME05000 WUXGA)shared to linux-next changes are available)

Quoted 249 lines
arch/arm/boot/dts/qcom-apq8064-pins.dtsi +0 -0
 };
arch/arm/boot/dts/qcom-apq8064.dtsi +227 -1
index 35a5759..49333cc 100644
@@ -919,6 +919,228 @@
                        reg = <0x1a400000 0x100>;
                };
 
+               gpu: adreno-3xx@4300000 {
+                       compatible = "qcom,adreno-3xx";
+                       reg = <0x04300000 0x20000>;
+                       reg-names = "kgsl_3d0_reg_memory";
+                       interrupts = <GIC_SPI 80 0>;
+                       interrupt-names = "kgsl_3d0_irq";
+                       clock-names =
+                           "core_clk",
+                           "iface_clk",
+                           "mem_clk",
+                           "mem_iface_clk";
+                       clocks =
+                           <&mmcc GFX3D_CLK>,
+                           <&mmcc GFX3D_AHB_CLK>,
+                           <&mmcc GFX3D_AXI_CLK>,
+                           <&mmcc MMSS_IMEM_AHB_CLK>;
+                       qcom,chipid = <0x03020002>;
+
+                       iommus = <&gfx3d 0
+                                 &gfx3d 1
+                                 &gfx3d 2
+                                 &gfx3d 3
+                                 &gfx3d 4
+                                 &gfx3d 5
+                                 &gfx3d 6
+                                 &gfx3d 7
+                                 &gfx3d 8
+                                 &gfx3d 9
+                                 &gfx3d 10
+                                 &gfx3d 11
+                                 &gfx3d 12
+                                 &gfx3d 13
+                                 &gfx3d 14
+                                 &gfx3d 15
+                                 &gfx3d 16
+                                 &gfx3d 17
+                                 &gfx3d 18
+                                 &gfx3d 19
+                                 &gfx3d 20
+                                 &gfx3d 21
+                                 &gfx3d 22
+                                 &gfx3d 23
+                                 &gfx3d 24
+                                 &gfx3d 25
+                                 &gfx3d 26
+                                 &gfx3d 27
+                                 &gfx3d 28
+                                 &gfx3d 29
+                                 &gfx3d 30
+                                 &gfx3d 31
+                                 &gfx3d1 0
+                                 &gfx3d1 1
+                                 &gfx3d1 2
+                                 &gfx3d1 3
+                                 &gfx3d1 4
+                                 &gfx3d1 5
+                                 &gfx3d1 6
+                                 &gfx3d1 7
+                                 &gfx3d1 8
+                                 &gfx3d1 9
+                                 &gfx3d1 10
+                                 &gfx3d1 11
+                                 &gfx3d1 12
+                                 &gfx3d1 13
+                                 &gfx3d1 14
+                                 &gfx3d1 15
+                                 &gfx3d1 16
+                                 &gfx3d1 17
+                                 &gfx3d1 18
+                                 &gfx3d1 19
+                                 &gfx3d1 20
+                                 &gfx3d1 21
+                                 &gfx3d1 22
+                                 &gfx3d1 23
+                                 &gfx3d1 24
+                                 &gfx3d1 25
+                                 &gfx3d1 26
+                                 &gfx3d1 27
+                                 &gfx3d1 28
+                                 &gfx3d1 29
+                                 &gfx3d1 30
+                                 &gfx3d1 31>;
+
+                       qcom,gpu-pwrlevels {
+                               compatible = "qcom,gpu-pwrlevels";
+                               qcom,gpu-pwrlevel@0 {
+                                       qcom,gpu-freq = <450000000>;
+                               };
+                               qcom,gpu-pwrlevel@1 {
+                                       qcom,gpu-freq = <27000000>;
+                               };
+                       };
+               };
+
+               mmss_sfpb: syscon@5700000 {
+                       compatible = "syscon";
+                       reg = <0x5700000 0x70>;
+               };
+
+               dsi0: qcom,mdss_dsi@4700000 {
+                       compatible = "qcom,mdss-dsi-ctrl";
+                       label = "MDSS DSI CTRL->0";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       interrupts = <GIC_SPI 82 0>;
+                       reg = <0x04700000 0x200>;
+                       reg-names = "dsi_ctrl";
+
+                       clocks = <&mmcc DSI_M_AHB_CLK>,
+                               <&mmcc DSI_S_AHB_CLK>,
+                               <&mmcc AMP_AHB_CLK>,
+                               <&mmcc DSI_CLK>,
+                               <&mmcc DSI1_BYTE_CLK>,
+                               <&mmcc DSI_PIXEL_CLK>,
+                               <&mmcc DSI1_ESC_CLK>,
+                               <&mmcc DSI1_BYTE_SRC>,
+                               <&mmcc DSI1_ESC_SRC>,
+                               <&mmcc DSI_SRC>,
+                               <&mmcc DSI_PIXEL_SRC>;
+                       clock-names = "iface_clk", "bus_clk", "core_mmss_clk",
+                                       "src_clk", "byte_clk", "pixel_clk",
+                                       "core_clk", "byte_clk_src", "esc_clk_src",
+                                       "dsi_clk_src", "pixel_clk_src";
+
+                       syscon-sfpb = <&mmss_sfpb>;
+                       phys = <&dsi0_phy>;
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@0 {
+                                       reg = <0>;
+                                       dsi0_in: endpoint {
+                                       };
+                               };
+
+                               port@1 {
+                                       reg = <1>;
+                                       dsi0_out: endpoint {
+                                       };
+                               };
+                       };
+               };
+
+
+               dsi0_phy: qcom,mdss_dsi_phy@4700200 {
+                       compatible = "qcom,dsi-phy-28nm-8960";
+                       #clock-cells = <1>;
+
+                       reg = <0x04700200 0x100>,
+                               <0x04700300 0x200>,
+                               <0x04700500 0x5c>;
+                       reg-names = "dsi_pll", "dsi_phy", "dsi_phy_regulator";
+                       clock-names = "iface_clk";
+                       clocks = <&mmcc DSI_M_AHB_CLK>;
+               };
+
+
+               mdp_port0: iommu@7500000 {
+                       compatible = "qcom,apq8064-iommu";
+                       #iommu-cells = <1>;
+                       clock-names =
+                           "smmu_pclk",
+                           "iommu_clk";
+                       clocks =
+                           <&mmcc SMMU_AHB_CLK>,
+                           <&mmcc MDP_AXI_CLK>;
+                       reg = <0x07500000 0x100000>;
+                       interrupts =
+                           <GIC_SPI 63 0>,
+                           <GIC_SPI 64 0>;
+                       qcom,ncb = <2>;
+               };
+
+               mdp_port1: iommu@7600000 {
+                       compatible = "qcom,apq8064-iommu";
+                       #iommu-cells = <1>;
+                       clock-names =
+                           "smmu_pclk",
+                           "iommu_clk";
+                       clocks =
+                           <&mmcc SMMU_AHB_CLK>,
+                           <&mmcc MDP_AXI_CLK>;
+                       reg = <0x07600000 0x100000>;
+                       interrupts =
+                           <GIC_SPI 61 0>,
+                           <GIC_SPI 62 0>;
+                       qcom,ncb = <2>;
+               };
+
+               gfx3d: iommu@7c00000 {
+                       compatible = "qcom,apq8064-iommu";
+                       #iommu-cells = <1>;
+                       clock-names =
+                           "smmu_pclk",
+                           "iommu_clk";
+                       clocks =
+                           <&mmcc SMMU_AHB_CLK>,
+                           <&mmcc GFX3D_AXI_CLK>;
+                       reg = <0x07c00000 0x100000>;
+                       interrupts =
+                           <GIC_SPI 69 0>,
+                           <GIC_SPI 70 0>;
+                       qcom,ncb = <3>;
+               };
+
+               gfx3d1: iommu@7d00000 {
+                       compatible = "qcom,apq8064-iommu";
+                       #iommu-cells = <1>;
+                       clock-names =
+                           "smmu_pclk",
+                           "iommu_clk";
+                       clocks =
+                           <&mmcc SMMU_AHB_CLK>,
+                           <&mmcc GFX3D_AXI_CLK>;
+                       reg = <0x07d00000 0x100000>;
+                       interrupts =
+                           <GIC_SPI 210 0>,
+                           <GIC_SPI 211 0>;
+                       qcom,ncb = <3>;
+               };
+
                pcie: pci@1b500000 {
                        compatible = "qcom,pcie-apq8064", "snps,dw-pcie";
                        reg = <0x1b500000 0x1000

@@ -1016,6 +1238,11 @@
                                      "hdmi_clk",
                                      "tv_clk";
 
+                       iommus = <&mdp_port0 0
+                                 &mdp_port0 2
+                                 &mdp_port1 0
+                                 &mdp_port1 2>;
+
                        ports {
                                #address-cells = <1>;
                                #size-cells = <0>;
--

1.9.1

author
#23 lore raw

Re: [RFC][PATCH 5/4] arm: dts: qcom: apq8064: Add dsi, gpu and iommu nodes

In reply to John Stultz

Hi,

Quoted 136 lines · John Stultz

Sort of tagging on to Archit's patchset here.

Adds the core gpu, and dsi nodes for the apq8064 needed to get graphics working on the nexus7 and other devices.

Feedback would be greatly appreciated!

Cc Archit Taneja <[email protected]>
Cc vinay simha <[email protected]>
Cc [email protected]
Cc [email protected]
Cc [email protected]
Cc [email protected]
Signed-off-by John Stultz <[email protected]>
---
  arch/arm/boot/dts/qcom-apq8064-pins.dtsi |  10 ++
  arch/arm/boot/dts/qcom-apq8064.dtsi      | 227 +++++++++++++++++++++++++++++++
  2 files changed, 237 insertions(+)
arch/arm/boot/dts/qcom-apq8064-pins.dtsi +10 -0
index 6b801e7..7bb0677 100644
@@ -284,4 +284,14 @@
  			bias-disable = <0>;
  		};
  	};
+
+	dsi_panel_pinctrl: dsi-panel-pinctrl {
+		mux {
+			pins = "gpio54";
+			function = "gpio";
+			bias-pull-up;
+			drive-strength = <8>;
+		};
+	};
+
  };
arch/arm/boot/dts/qcom-apq8064.dtsi +90 -0
index 35a5759..49333cc 100644
@@ -919,6 +919,228 @@
  			reg = <0x1a400000 0x100>;
  		};
 
+		gpu: adreno-3xx@4300000 {
+			compatible = "qcom,adreno-3xx";
+			reg = <0x04300000 0x20000>;
+			reg-names = "kgsl_3d0_reg_memory";
+			interrupts = <GIC_SPI 80 0>;
+			interrupt-names = "kgsl_3d0_irq";
+			clock-names =
+			    "core_clk",
+			    "iface_clk",
+			    "mem_clk",
+			    "mem_iface_clk";
+			clocks =
+			    <&mmcc GFX3D_CLK>,
+			    <&mmcc GFX3D_AHB_CLK>,
+			    <&mmcc GFX3D_AXI_CLK>,
+			    <&mmcc MMSS_IMEM_AHB_CLK>;
+			qcom,chipid = <0x03020002>;
+
+			iommus = <&gfx3d 0
+				  &gfx3d 1
+				  &gfx3d 2
+				  &gfx3d 3
+				  &gfx3d 4
+				  &gfx3d 5
+				  &gfx3d 6
+				  &gfx3d 7
+				  &gfx3d 8
+				  &gfx3d 9
+				  &gfx3d 10
+				  &gfx3d 11
+				  &gfx3d 12
+				  &gfx3d 13
+				  &gfx3d 14
+				  &gfx3d 15
+				  &gfx3d 16
+				  &gfx3d 17
+				  &gfx3d 18
+				  &gfx3d 19
+				  &gfx3d 20
+				  &gfx3d 21
+				  &gfx3d 22
+				  &gfx3d 23
+				  &gfx3d 24
+				  &gfx3d 25
+				  &gfx3d 26
+				  &gfx3d 27
+				  &gfx3d 28
+				  &gfx3d 29
+				  &gfx3d 30
+				  &gfx3d 31
+				  &gfx3d1 0
+				  &gfx3d1 1
+				  &gfx3d1 2
+				  &gfx3d1 3
+				  &gfx3d1 4
+				  &gfx3d1 5
+				  &gfx3d1 6
+				  &gfx3d1 7
+				  &gfx3d1 8
+				  &gfx3d1 9
+				  &gfx3d1 10
+				  &gfx3d1 11
+				  &gfx3d1 12
+				  &gfx3d1 13
+				  &gfx3d1 14
+				  &gfx3d1 15
+				  &gfx3d1 16
+				  &gfx3d1 17
+				  &gfx3d1 18
+				  &gfx3d1 19
+				  &gfx3d1 20
+				  &gfx3d1 21
+				  &gfx3d1 22
+				  &gfx3d1 23
+				  &gfx3d1 24
+				  &gfx3d1 25
+				  &gfx3d1 26
+				  &gfx3d1 27
+				  &gfx3d1 28
+				  &gfx3d1 29
+				  &gfx3d1 30
+				  &gfx3d1 31>;
+
+			qcom,gpu-pwrlevels {
+				compatible = "qcom,gpu-pwrlevels";
+				qcom,gpu-pwrlevel@0 {
+					qcom,gpu-freq = <450000000>;
+				};
+				qcom,gpu-pwrlevel@1 {
+					qcom,gpu-freq = <27000000>;

arch/arm/boot/dts/qcom-apq8064.dtsi line 1021

Quoted 10 lines
arch/arm/boot/dts/qcom-apq8064.dtsi +10 -0
+				};
+			};
+		};
+
+		mmss_sfpb: syscon@5700000 {
+			compatible = "syscon";
+			reg = <0x5700000 0x70>;
+		};
+
+		dsi0: qcom,mdss_dsi@4700000 {

The 'qcom,' prefix above isn't preferred here. This should rather be:

		dsi0: dsi@4700000 {
Quoted 13 lines
arch/arm/boot/dts/qcom-apq8064.dtsi +13 -0
+			compatible = "qcom,mdss-dsi-ctrl";
+			label = "MDSS DSI CTRL->0";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			interrupts = <GIC_SPI 82 0>;
+			reg = <0x04700000 0x200>;
+			reg-names = "dsi_ctrl";
+
+			clocks = <&mmcc DSI_M_AHB_CLK>,
+				<&mmcc DSI_S_AHB_CLK>,
+				<&mmcc AMP_AHB_CLK>,
+				<&mmcc DSI_CLK>,
+				<&mmcc DSI1_BYTE_CLK>,

arch/arm/boot/dts/qcom-apq8064.dtsi line 1044

Quoted 10 lines
arch/arm/boot/dts/qcom-apq8064.dtsi +10 -0
+				<&mmcc DSI_PIXEL_CLK>,
+				<&mmcc DSI1_ESC_CLK>,
+				<&mmcc DSI1_BYTE_SRC>,
+				<&mmcc DSI1_ESC_SRC>,
+				<&mmcc DSI_SRC>,
+				<&mmcc DSI_PIXEL_SRC>;
+			clock-names = "iface_clk", "bus_clk", "core_mmss_clk",
+					"src_clk", "byte_clk", "pixel_clk",
+					"core_clk", "byte_clk_src", "esc_clk_src",
+					"dsi_clk_src", "pixel_clk_src";

The last 4 clocks shouldn't be specified since they aren't actually inputs to the DSI block. Instead, we should set default parents for these clocks using assigned clocks:

		assigned-clocks = <&mmcc DSI1_BYTE_SRC>,
				  <&mmcc DSI1_ESC_SRC>,
				  <&mmcc DSI_SRC>,
				  <&mmcc DSI_PIXEL_SRC>;
		assigned-clock-parents = <&dsi0_phy 0>,
					 <&dsi0_phy 0>,
					 <&dsi0_phy 1>,
					 <&dsi0_phy 1>;
Quoted 13 lines
arch/arm/boot/dts/qcom-apq8064.dtsi +13 -0
+
+			syscon-sfpb = <&mmss_sfpb>;
+			phys = <&dsi0_phy>;
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+					dsi0_in: endpoint {
+					};
+				};
+

arch/arm/boot/dts/qcom-apq8064.dtsi line 1067

Quoted 10 lines
arch/arm/boot/dts/qcom-apq8064.dtsi +10 -0
+				port@1 {
+					reg = <1>;
+					dsi0_out: endpoint {
+					};
+				};
+			};
+		};
+
+
+		dsi0_phy: qcom,mdss_dsi_phy@4700200 {

Same as suggestion as for dsi0. Also, we tend to use hyphen instead of underscore for phy names. This should be:

		dsi0_phy: dsi-phy@4700200 {

The DSI bindings look good otherwise. Thanks for taking this up.

Archit

Quoted 92 lines
arch/arm/boot/dts/qcom-apq8064.dtsi +81 -0
+			compatible = "qcom,dsi-phy-28nm-8960";
+			#clock-cells = <1>;
+
+			reg = <0x04700200 0x100>,
+				<0x04700300 0x200>,
+				<0x04700500 0x5c>;
+			reg-names = "dsi_pll", "dsi_phy", "dsi_phy_regulator";
+			clock-names = "iface_clk";
+			clocks = <&mmcc DSI_M_AHB_CLK>;
+		};
+
+
+		mdp_port0: iommu@7500000 {
+			compatible = "qcom,apq8064-iommu";
+			#iommu-cells = <1>;
+			clock-names =
+			    "smmu_pclk",
+			    "iommu_clk";
+			clocks =
+			    <&mmcc SMMU_AHB_CLK>,
+			    <&mmcc MDP_AXI_CLK>;
+			reg = <0x07500000 0x100000>;
+			interrupts =
+			    <GIC_SPI 63 0>,
+			    <GIC_SPI 64 0>;
+			qcom,ncb = <2>;
+		};
+
+		mdp_port1: iommu@7600000 {
+			compatible = "qcom,apq8064-iommu";
+			#iommu-cells = <1>;
+			clock-names =
+			    "smmu_pclk",
+			    "iommu_clk";
+			clocks =
+			    <&mmcc SMMU_AHB_CLK>,
+			    <&mmcc MDP_AXI_CLK>;
+			reg = <0x07600000 0x100000>;
+			interrupts =
+			    <GIC_SPI 61 0>,
+			    <GIC_SPI 62 0>;
+			qcom,ncb = <2>;
+		};
+
+		gfx3d: iommu@7c00000 {
+			compatible = "qcom,apq8064-iommu";
+			#iommu-cells = <1>;
+			clock-names =
+			    "smmu_pclk",
+			    "iommu_clk";
+			clocks =
+			    <&mmcc SMMU_AHB_CLK>,
+			    <&mmcc GFX3D_AXI_CLK>;
+			reg = <0x07c00000 0x100000>;
+			interrupts =
+			    <GIC_SPI 69 0>,
+			    <GIC_SPI 70 0>;
+			qcom,ncb = <3>;
+		};
+
+		gfx3d1: iommu@7d00000 {
+			compatible = "qcom,apq8064-iommu";
+			#iommu-cells = <1>;
+			clock-names =
+			    "smmu_pclk",
+			    "iommu_clk";
+			clocks =
+			    <&mmcc SMMU_AHB_CLK>,
+			    <&mmcc GFX3D_AXI_CLK>;
+			reg = <0x07d00000 0x100000>;
+			interrupts =
+			    <GIC_SPI 210 0>,
+			    <GIC_SPI 211 0>;
+			qcom,ncb = <3>;
+		};
+
  		pcie: pci@1b500000 {
  			compatible = "qcom,pcie-apq8064", "snps,dw-pcie";
  			reg = <0x1b500000 0x1000

@@ -1016,6 +1238,11 @@
  				      "hdmi_clk",
  				      "tv_clk";
 
+			iommus = <&mdp_port0 0
+				  &mdp_port0 2
+				  &mdp_port1 0
+				  &mdp_port1 2>;
+
  			ports {
  				#address-cells = <1>;
  				#size-cells = <0>;
Signature · 2 lines
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a Linux Foundation Collaborative Project
author
#24 lore raw

v3 cover drm/msm: HDMI support on IFC6410

In reply to Archit Taneja

This set adds the display DT parts for the APQ8064 based IFC6410 board. There were a couple of small fixes/cleanups required in the driver to use the correct bindings. Those are a part of this patchset too.

Changes in v3:
- Removed HDMI DDC clk/data gpios.

Changes in v2:
- Incorporated comments on HDMI gpio bindings as suggested by Rob H.

Archit Taneja (4):
drm/msm/mdp4: Fix issue with LCDC/LVDS port parsing drm/msm/hdmi: Clean up HDMI gpio DT bindings
arm: dts: qcom: apq8064: Add display DT nodes
arm: dts: qcom: apq8064-ifc6410: Add HDMI support

 .../devicetree/bindings/display/msm/hdmi.txt       |  9 +--
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts         | 74 ++++++++++++++++++
 arch/arm/boot/dts/qcom-apq8064.dtsi                | 91 ++++++++++++++++++++++
 drivers/gpu/drm/msm/hdmi/hdmi.c                    | 21 ++++-
 drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c            | 23 +++---
 5 files changed, 200 insertions(+), 18 deletions(-)
Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation
author
#25 lore raw

PATCH v3 1/4 drm/msm/mdp4: Fix issue with LCDC/LVDS port parsing

The LVDS port is the first in the list of the output ports in MDP4. The driver assumed that if the port and its corresponding endpoint is defined, then there should be a panel node too. This isn't necessary since boards may not really use a LVDS panel. Don't fail if there isn't a panel node available.

While we're at it, use of_graph_get_endpoint_by_regs instead of of_graph_get_next_endpoint to make it more explicit that the LVDS output is at port 0.

Tested-by John Stultz <[email protected]>
Signed-off-by Archit Taneja <[email protected]>
---
 drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c | 23 ++++++++++++-----------
 1 file changed, 12 insertions(+), 11 deletions(-)
drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c +12 -11
index 7b39e89..571a91e 100644
@@ -228,18 +228,21 @@ static struct device_node *mdp4_detect_lcdc_panel(struct drm_device *dev)
 	struct device_node *endpoint, *panel_node;
 	struct device_node *np = dev->dev->of_node;
 
-	endpoint = of_graph_get_next_endpoint(np, NULL);
+	/*
+	 * LVDS/LCDC is the first port described in the list of ports in the
+	 * MDP4 DT node.
+	 */
+	endpoint = of_graph_get_endpoint_by_regs(np, 0, -1);
 	if (!endpoint) {
-		DBG("no endpoint in MDP4 to fetch LVDS panel\n");
+		DBG("no LVDS remote endpoint\n");
 		return NULL;
 	}
 
-	/* don't proceed if we have an endpoint but no panel_node tied to it */
 	panel_node = of_graph_get_remote_port_parent(endpoint);
 	if (!panel_node) {
-		dev_err(dev->dev, "no valid panel node\n");
+		DBG("no valid panel node in LVDS endpoint\n");
 		of_node_put(endpoint);
-		return ERR_PTR(-ENODEV);
+		return NULL;
 	}
 
 	of_node_put(endpoint);

@@ -262,14 +265,12 @@ static int mdp4_modeset_init_intf(struct mdp4_kms *mdp4_kms,
 	switch (intf_type) {
 	case DRM_MODE_ENCODER_LVDS:
 		/*
-		 * bail out early if:
-		 * - there is no panel node (no need to initialize lcdc
-		 *   encoder and lvds connector), or
-		 * - panel node is a bad pointer
+		 * bail out early if there is no panel node (no need to
+		 * initialize LCDC encoder and LVDS connector)
 		 */
 		panel_node = mdp4_detect_lcdc_panel(dev);
-		if (IS_ERR_OR_NULL(panel_node))
-			return PTR_ERR(panel_node);
+		if (!panel_node)
+			return 0;
 
 		encoder = mdp4_lcdc_encoder_init(dev, panel_node);
 		if (IS_ERR(encoder)) {
Signature · 2 lines
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hosted by The Linux Foundation

A message that is not in the archive (sent off-list or not yet received): 1473780097-11388-1-git-send-email-architt-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org

#27 lore raw

PATCH v3 2/4 drm/msm/hdmi: Clean up HDMI gpio DT bindings

Make the following changes in the HDMI gpio bindings:

- Use "-gpios" as the suffix for all the gpio names
- Move all the gpios to optional, since there are platforms that use none of them.
- The HPD gpio is a standard one, remove the "qcom,hdmi-tx-" prefix from it.
- Remove the HDMI DDC clk/data gpios. They are just leftovers of an old way to configure pinctrl properties.
- Add a missing lpm gpio used on some platforms.

Make the necessary changes in the driver to incorporate these changes.

There hasn't been any upstream DT that uses the HDMI bindings, so it's okay to change and move around these properties.

Cc Rob Herring <[email protected]>
Cc [email protected]
Signed-off-by Archit Taneja <[email protected]>

---
v3:
- Removed HDMI DDC clk/data gpios.

 .../devicetree/bindings/display/msm/hdmi.txt        |  9 ++++-----
 drivers/gpu/drm/msm/hdmi/hdmi.c                     | 21 +++++++++++++++++++--
 2 files changed, 23 insertions(+), 7 deletions(-)
Documentation/devicetree/bindings/display/msm/hdmi.txt +4 -5
index ce84459..bfa7259 100644
@@ -13,17 +13,16 @@ Required properties:
 - interrupts: The interrupt signal from the hdmi block.
 - clocks: device clocks
   See ../clocks/clock-bindings.txt for details.
-- qcom,hdmi-tx-ddc-clk-gpio: ddc clk pin
-- qcom,hdmi-tx-ddc-data-gpio: ddc data pin
-- qcom,hdmi-tx-hpd-gpio: hpd pin
 - core-vdda-supply: phandle to supply regulator
 - hdmi-mux-supply: phandle to mux regulator
 - phys: the phandle for the HDMI PHY device
 - phy-names: the name of the corresponding PHY device
 
 Optional properties:
-- qcom,hdmi-tx-mux-en-gpio: hdmi mux enable pin
-- qcom,hdmi-tx-mux-sel-gpio: hdmi mux select pin
+- hpd-gpios: hpd pin
+- qcom,hdmi-tx-mux-en-gpios: hdmi mux enable pin
+- qcom,hdmi-tx-mux-sel-gpios: hdmi mux select pin
+- qcom,hdmi-tx-mux-lpm-gpios: hdmi mux lpm pin
 - power-domains: reference to the power domain(s), if available.
 - pinctrl-names: the pin control state names; should contain "default"
 - pinctrl-0: the default pinctrl state (active)
drivers/gpu/drm/msm/hdmi/hdmi.c +19 -2
index 9737207..a968cad 100644
@@ -422,12 +422,29 @@ static const struct {
 
 static int msm_hdmi_get_gpio(struct device_node *of_node, const char *name)
 {
-	int gpio = of_get_named_gpio(of_node, name, 0);
+	int gpio;
+
+	/* try with the gpio names as in the table (downstream bindings) */
+	gpio = of_get_named_gpio(of_node, name, 0);
 	if (gpio < 0) {
 		char name2[32];
-		snprintf(name2, sizeof(name2), "%s-gpio", name);
+
+		/* try with the gpio names as in the upstream bindings */
+		snprintf(name2, sizeof(name2), "%s-gpios", name);
 		gpio = of_get_named_gpio(of_node, name2, 0);
 		if (gpio < 0) {
+			char name3[32];
+
+			/*
+			 * try again after stripping out the "qcom,hdmi-tx"
+			 * prefix. This is mainly to match "hpd-gpios" used
+			 * in the upstream bindings
+			 */
+			if (sscanf(name2, "qcom,hdmi-tx-%s", name3))
+				gpio = of_get_named_gpio(of_node, name3, 0);
+		}
+
+		if (gpio < 0) {
 			DBG("failed to get gpio: %s (%d)", name, gpio);
 			gpio = -1;
 		}
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maintainer Acked-by on v3 2/4
#28 lore raw

Re: [PATCH v3 2/4] drm/msm/hdmi: Clean up HDMI gpio DT bindings

Quoted 19 lines · Archit Taneja

Make the following changes in the HDMI gpio bindings:

- Use "-gpios" as the suffix for all the gpio names
- Move all the gpios to optional, since there are platforms that use none of them.
- The HPD gpio is a standard one, remove the "qcom,hdmi-tx-" prefix from it.
- Remove the HDMI DDC clk/data gpios. They are just leftovers of an old way to configure pinctrl properties.
- Add a missing lpm gpio used on some platforms.

Make the necessary changes in the driver to incorporate these changes.

There hasn't been any upstream DT that uses the HDMI bindings, so it's okay to change and move around these properties.

Cc Rob Herring <[email protected]>
Cc [email protected]
Signed-off-by Archit Taneja <[email protected]>
Quoted 7 lines

---
v3:
- Removed HDMI DDC clk/data gpios.

 .../devicetree/bindings/display/msm/hdmi.txt        |  9 ++++-----
 drivers/gpu/drm/msm/hdmi/hdmi.c                     | 21 +++++++++++++++++++--
 2 files changed, 23 insertions(+), 7 deletions(-)
Acked-by Rob Herring <[email protected]>

_______________________________________________
dri-devel mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/dri-devel

#29 lore raw

PATCH v3 4/4 arm: dts: qcom: apq8064-ifc6410: Add HDMI support

In reply to a message not in the archive

Add HDMI support on IFC6410. Populate the regulators required by HDMI-TX and PHY. Establish the link between the MDP4 DTV encoder and HDMI. Create a generic micro HDMI connector DT node. The msm drm driver doesn't parse for HDMI connectors in DT, but it will do so later.

Cc Rob Herring <[email protected]>
Cc [email protected]
Signed-off-by Archit Taneja <[email protected]>
---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 74 ++++++++++++++++++++++++++++++
 1 file changed, 74 insertions(+)
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +74 -0
index 2eeb090..3d37cab 100644
@@ -43,6 +43,17 @@
 		};
 	};
 
+	hdmi-out {
+		compatible = "hdmi-connector";
+		type = "d";
+
+		port {
+			hdmi_con: endpoint {
+				remote-endpoint = <&hdmi_out>;
+			};
+		};
+	};
+
 	soc {
 		pinctrl@800000 {
 			card_detect: card_detect {

@@ -64,6 +75,25 @@
 					bias-disable;
 				};
 			};
+
+			hdmi_pinctrl: hdmi-pinctrl {
+				mux {
+					pins = "gpio70", "gpio71", "gpio72";
+					function = "hdmi";
+				};
+
+				pinconf_ddc {
+					pins = "gpio70", "gpio71";
+					bias-pull-up;
+					drive-strength = <2>;
+				};
+
+				pinconf_hpd {
+					pins = "gpio72";
+					bias-pull-down;
+					drive-strength = <16>;
+				};
+			};
 		};
 
 		rpm@108000 {

@@ -329,5 +359,49 @@
 				mmc-pwrseq = <&sdcc4_pwrseq>;
 			};
 		};
+
+		hdmi-tx@4a00000 {
+			status = "okay";
+
+			core-vdda-supply = <&pm8921_hdmi_switch>;
+			hdmi-mux-supply = <&ext_3p3v>;
+
+			hpd-gpios = <&tlmm_pinmux 72 GPIO_ACTIVE_HIGH>;
+
+			pinctrl-names = "default";
+			pinctrl-0 = <&hdmi_pinctrl>;
+
+			ports {
+				port@0 {
+					endpoint {
+						remote-endpoint = <&mdp_dtv_out>;
+					};
+				};
+
+				port@1 {
+					endpoint {
+						remote-endpoint = <&hdmi_con>;
+					};
+				};
+			};
+		};
+
+		hdmi-phy@4a00400 {
+			status = "okay";
+
+			core-vdda-supply = <&pm8921_hdmi_switch>;
+		};
+
+		mdp@5100000 {
+			status = "okay";
+
+			ports {
+				port@3 {
+					endpoint {
+						remote-endpoint = <&hdmi_in>;
+					};
+				};
+			};
+		};
 	};
 };
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author
#30 lore raw

PATCH v3 3/4 arm: dts: qcom: apq8064: Add display DT nodes

In reply to Archit Taneja

APQ8064 contains a MDP4 based display controller. It contains a HDMI, LVDS and 2 DSI outputs.

Add display DT nodes for MDP4, HDMI TX and HDMI PHY. MDP4 based display blocks have a flat device hierarchy.

Nodes for other outputs will be added later.

Cc Rob Herring <[email protected]>
Cc [email protected]
Tested-by John Stultz <[email protected]>
Signed-off-by Archit Taneja <[email protected]>
---
 arch/arm/boot/dts/qcom-apq8064.dtsi | 91 +++++++++++++++++++++++++++++++++++++
 1 file changed, 91 insertions(+)
arch/arm/boot/dts/qcom-apq8064.dtsi +91 -0
index 74a9b6c..b688fb6 100644
@@ -955,6 +955,97 @@
 			reset-names = "axi", "ahb", "por", "pci", "phy";
 			status = "disabled";
 		};
+
+		hdmi: hdmi-tx@4a00000 {
+			compatible = "qcom,hdmi-tx-8960";
+			reg = <0x04a00000 0x2f0>;
+			reg-names = "core_physical";
+			interrupts = <GIC_SPI 79 IRQ_TYPE_NONE>;
+			clocks = <&mmcc HDMI_APP_CLK>,
+				 <&mmcc HDMI_M_AHB_CLK>,
+				 <&mmcc HDMI_S_AHB_CLK>;
+			clock-names = "core_clk",
+				      "master_iface_clk",
+				      "slave_iface_clk";
+
+			phys = <&hdmi_phy>;
+			phy-names = "hdmi-phy";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+					hdmi_in: endpoint {
+					};
+				};
+
+				port@1 {
+					reg = <1>;
+					hdmi_out: endpoint {
+					};
+				};
+			};
+		};
+
+		hdmi_phy: hdmi-phy@4a00400 {
+			compatible = "qcom,hdmi-phy-8960";
+			reg = <0x4a00400 0x60>,
+			      <0x4a00500 0x100>;
+			reg-names = "hdmi_phy",
+				    "hdmi_pll";
+
+			clocks = <&mmcc HDMI_S_AHB_CLK>;
+			clock-names = "slave_iface_clk";
+		};
+
+		mdp: mdp@5100000 {
+			compatible = "qcom,mdp4";
+			reg = <0x05100000 0xf0000>;
+			interrupts = <GIC_SPI 75 IRQ_TYPE_NONE>;
+			clocks = <&mmcc MDP_CLK>,
+				 <&mmcc MDP_AHB_CLK>,
+				 <&mmcc MDP_AXI_CLK>,
+				 <&mmcc MDP_LUT_CLK>,
+				 <&mmcc HDMI_TV_CLK>,
+				 <&mmcc MDP_TV_CLK>;
+			clock-names = "core_clk",
+				      "iface_clk",
+				      "bus_clk",
+				      "lut_clk",
+				      "hdmi_clk",
+				      "tv_clk";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+					mdp_lvds_out: endpoint {
+					};
+				};
+
+				port@1 {
+					reg = <1>;
+					mdp_dsi1_out: endpoint {
+					};
+				};
+
+				port@2 {
+					reg = <2>;
+					mdp_dsi2_out: endpoint {
+					};
+				};
+
+				port@3 {
+					reg = <3>;
+					mdp_dtv_out: endpoint {
+					};
+				};
+			};
+		};
 	};
 };
 #include "qcom-apq8064-pins.dtsi"
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#32 lore raw

Re: [PATCH v3 3/4] arm: dts: qcom: apq8064: Add display DT nodes

Quoted 22 lines · Archit Taneja

APQ8064 contains a MDP4 based display controller. It contains a HDMI, LVDS and 2 DSI outputs.

Add display DT nodes for MDP4, HDMI TX and HDMI PHY. MDP4 based display blocks have a flat device hierarchy.

Nodes for other outputs will be added later.

Cc Rob Herring <[email protected]>
Cc [email protected]
Tested-by John Stultz <[email protected]>
Signed-off-by Archit Taneja <[email protected]>
---
 arch/arm/boot/dts/qcom-apq8064.dtsi | 91 +++++++++++++++++++++++++++++++++++++
 1 file changed, 91 insertions(+)
arch/arm/boot/dts/qcom-apq8064.dtsi +0 -0
index 74a9b6c..b688fb6 100644

arch/arm/boot/dts/qcom-apq8064.dtsi line 963

Quoted 9 lines
arch/arm/boot/dts/qcom-apq8064.dtsi +6 -0
@@ -955,6 +955,97 @@
 			reset-names = "axi", "ahb", "por", "pci", "phy";
 			status = "disabled";
 		};
+
+		hdmi: hdmi-tx@4a00000 {
+			compatible = "qcom,hdmi-tx-8960";
+			reg = <0x04a00000 0x2f0>;
+			reg-names = "core_physical";
+			interrupts = <GIC_SPI 79 IRQ_TYPE_NONE>;

Please specify the IRQ_TYPE that isn't NONE here.

Quoted 33 lines
arch/arm/boot/dts/qcom-apq8064.dtsi +33 -0
+			clocks = <&mmcc HDMI_APP_CLK>,
+				 <&mmcc HDMI_M_AHB_CLK>,
+				 <&mmcc HDMI_S_AHB_CLK>;
+			clock-names = "core_clk",
+				      "master_iface_clk",
+				      "slave_iface_clk";
+
+			phys = <&hdmi_phy>;
+			phy-names = "hdmi-phy";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+					hdmi_in: endpoint {
+					};
+				};
+
+				port@1 {
+					reg = <1>;
+					hdmi_out: endpoint {
+					};
+				};
+			};
+		};
+
+		hdmi_phy: hdmi-phy@4a00400 {
+			compatible = "qcom,hdmi-phy-8960";
+			reg = <0x4a00400 0x60>,
+			      <0x4a00500 0x100>;
+			reg-names = "hdmi_phy",

arch/arm/boot/dts/qcom-apq8064.dtsi line 1006

Quoted 10 lines
arch/arm/boot/dts/qcom-apq8064.dtsi +10 -0
+				    "hdmi_pll";
+
+			clocks = <&mmcc HDMI_S_AHB_CLK>;
+			clock-names = "slave_iface_clk";
+		};
+
+		mdp: mdp@5100000 {
+			compatible = "qcom,mdp4";
+			reg = <0x05100000 0xf0000>;
+			interrupts = <GIC_SPI 75 IRQ_TYPE_NONE>;

Same comment here.

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author
#33 lore raw

Re: [PATCH v3 3/4] arm: dts: qcom: apq8064: Add display DT nodes

Quoted 72 lines · Stephen Boyd
Quoted 22 lines · Archit Taneja

APQ8064 contains a MDP4 based display controller. It contains a HDMI, LVDS and 2 DSI outputs.

Add display DT nodes for MDP4, HDMI TX and HDMI PHY. MDP4 based display blocks have a flat device hierarchy.

Nodes for other outputs will be added later.

Cc Rob Herring <[email protected]>
Cc [email protected]
Tested-by John Stultz <[email protected]>
Signed-off-by Archit Taneja <[email protected]>
---
  arch/arm/boot/dts/qcom-apq8064.dtsi | 91 +++++++++++++++++++++++++++++++++++++
  1 file changed, 91 insertions(+)
arch/arm/boot/dts/qcom-apq8064.dtsi +0 -0
index 74a9b6c..b688fb6 100644

arch/arm/boot/dts/qcom-apq8064.dtsi line 963

Quoted 9 lines
arch/arm/boot/dts/qcom-apq8064.dtsi +6 -0
@@ -955,6 +955,97 @@
  			reset-names = "axi", "ahb", "por", "pci", "phy";
  			status = "disabled";
  		};
+
+		hdmi: hdmi-tx@4a00000 {
+			compatible = "qcom,hdmi-tx-8960";
+			reg = <0x04a00000 0x2f0>;
+			reg-names = "core_physical";
+			interrupts = <GIC_SPI 79 IRQ_TYPE_NONE>;

Please specify the IRQ_TYPE that isn't NONE here.

Quoted 37 lines
arch/arm/boot/dts/qcom-apq8064.dtsi +37 -0
+			clocks = <&mmcc HDMI_APP_CLK>,
+				 <&mmcc HDMI_M_AHB_CLK>,
+				 <&mmcc HDMI_S_AHB_CLK>;
+			clock-names = "core_clk",
+				      "master_iface_clk",
+				      "slave_iface_clk";
+
+			phys = <&hdmi_phy>;
+			phy-names = "hdmi-phy";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+					hdmi_in: endpoint {
+					};
+				};
+
+				port@1 {
+					reg = <1>;
+					hdmi_out: endpoint {
+					};
+				};
+			};
+		};
+
+		hdmi_phy: hdmi-phy@4a00400 {
+			compatible = "qcom,hdmi-phy-8960";
+			reg = <0x4a00400 0x60>,
+			      <0x4a00500 0x100>;
+			reg-names = "hdmi_phy",
+				    "hdmi_pll";
+
+			clocks = <&mmcc HDMI_S_AHB_CLK>;
+			clock-names = "slave_iface_clk";
Quoted 8 lines

arch/arm/boot/dts/qcom-apq8064.dtsi line 1006

Quoted 6 lines
arch/arm/boot/dts/qcom-apq8064.dtsi +6 -0
+		};
+
+		mdp: mdp@5100000 {
+			compatible = "qcom,mdp4";
+			reg = <0x05100000 0xf0000>;
+			interrupts = <GIC_SPI 75 IRQ_TYPE_NONE>;

Same comment here.

Will fix this.

Thanks,
Archit

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a Linux Foundation Collaborative Project
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author
#34 lore raw

v4 cover drm/msm: HDMI support on IFC6410

In reply to Archit Taneja

This set adds the display DT parts for the APQ8064 based IFC6410 board.

Changes in v4:
- Dropped the DRM/MSM changes since they've been taken by Rob Clark.
- Use IRQ_TYPE_LEVEL_HIGH instead of IRQ_TYPE_NONE.

Changes in v3:
- Removed HDMI DDC clk/data gpios.

Changes in v2:
- Incorporated comments on HDMI gpio bindings as suggested by Rob H.

Archit Taneja (2):
arm: dts: qcom: apq8064: Add display DT nodes
arm: dts: qcom: apq8064-ifc6410: Add HDMI support

 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 74 ++++++++++++++++++++++++
 arch/arm/boot/dts/qcom-apq8064.dtsi        | 91 ++++++++++++++++++++++++++++++
 2 files changed, 165 insertions(+)
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hosted by The Linux Foundation
author
#35 lore raw

PATCH v4 1/2 arm: dts: qcom: apq8064: Add display DT nodes

APQ8064 contains a MDP4 based display controller. It contains a HDMI, LVDS and 2 DSI outputs.

Add display DT nodes for MDP4, HDMI TX and HDMI PHY. MDP4 based display blocks have a flat device hierarchy.

Nodes for other outputs will be added later.

Cc [email protected]
Tested-by John Stultz <[email protected]>
Signed-off-by Archit Taneja <[email protected]>
---
 arch/arm/boot/dts/qcom-apq8064.dtsi | 91 +++++++++++++++++++++++++++++++++++++
 1 file changed, 91 insertions(+)
arch/arm/boot/dts/qcom-apq8064.dtsi +91 -0
index 74a9b6c..cf660c7 100644
@@ -955,6 +955,97 @@
 			reset-names = "axi", "ahb", "por", "pci", "phy";
 			status = "disabled";
 		};
+
+		hdmi: hdmi-tx@4a00000 {
+			compatible = "qcom,hdmi-tx-8960";
+			reg = <0x04a00000 0x2f0>;
+			reg-names = "core_physical";
+			interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mmcc HDMI_APP_CLK>,
+				 <&mmcc HDMI_M_AHB_CLK>,
+				 <&mmcc HDMI_S_AHB_CLK>;
+			clock-names = "core_clk",
+				      "master_iface_clk",
+				      "slave_iface_clk";
+
+			phys = <&hdmi_phy>;
+			phy-names = "hdmi-phy";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+					hdmi_in: endpoint {
+					};
+				};
+
+				port@1 {
+					reg = <1>;
+					hdmi_out: endpoint {
+					};
+				};
+			};
+		};
+
+		hdmi_phy: hdmi-phy@4a00400 {
+			compatible = "qcom,hdmi-phy-8960";
+			reg = <0x4a00400 0x60>,
+			      <0x4a00500 0x100>;
+			reg-names = "hdmi_phy",
+				    "hdmi_pll";
+
+			clocks = <&mmcc HDMI_S_AHB_CLK>;
+			clock-names = "slave_iface_clk";
+		};
+
+		mdp: mdp@5100000 {
+			compatible = "qcom,mdp4";
+			reg = <0x05100000 0xf0000>;
+			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mmcc MDP_CLK>,
+				 <&mmcc MDP_AHB_CLK>,
+				 <&mmcc MDP_AXI_CLK>,
+				 <&mmcc MDP_LUT_CLK>,
+				 <&mmcc HDMI_TV_CLK>,
+				 <&mmcc MDP_TV_CLK>;
+			clock-names = "core_clk",
+				      "iface_clk",
+				      "bus_clk",
+				      "lut_clk",
+				      "hdmi_clk",
+				      "tv_clk";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+					mdp_lvds_out: endpoint {
+					};
+				};
+
+				port@1 {
+					reg = <1>;
+					mdp_dsi1_out: endpoint {
+					};
+				};
+
+				port@2 {
+					reg = <2>;
+					mdp_dsi2_out: endpoint {
+					};
+				};
+
+				port@3 {
+					reg = <3>;
+					mdp_dtv_out: endpoint {
+					};
+				};
+			};
+		};
 	};
 };
 #include "qcom-apq8064-pins.dtsi"
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author
#36 lore raw

PATCH v4 2/2 arm: dts: qcom: apq8064-ifc6410: Add HDMI support

In reply to Archit Taneja

Add HDMI support on IFC6410. Populate the regulators required by HDMI-TX and PHY. Establish the link between the MDP4 DTV encoder and HDMI. Create a generic micro HDMI connector DT node. The msm drm driver doesn't parse for HDMI connectors in DT, but it will do so later.

Cc [email protected]
Signed-off-by Archit Taneja <[email protected]>
---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 74 ++++++++++++++++++++++++++++++
 1 file changed, 74 insertions(+)
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +74 -0
index 2eeb090..3d37cab 100644
@@ -43,6 +43,17 @@
 		};
 	};
 
+	hdmi-out {
+		compatible = "hdmi-connector";
+		type = "d";
+
+		port {
+			hdmi_con: endpoint {
+				remote-endpoint = <&hdmi_out>;
+			};
+		};
+	};
+
 	soc {
 		pinctrl@800000 {
 			card_detect: card_detect {

@@ -64,6 +75,25 @@
 					bias-disable;
 				};
 			};
+
+			hdmi_pinctrl: hdmi-pinctrl {
+				mux {
+					pins = "gpio70", "gpio71", "gpio72";
+					function = "hdmi";
+				};
+
+				pinconf_ddc {
+					pins = "gpio70", "gpio71";
+					bias-pull-up;
+					drive-strength = <2>;
+				};
+
+				pinconf_hpd {
+					pins = "gpio72";
+					bias-pull-down;
+					drive-strength = <16>;
+				};
+			};
 		};
 
 		rpm@108000 {

@@ -329,5 +359,49 @@
 				mmc-pwrseq = <&sdcc4_pwrseq>;
 			};
 		};
+
+		hdmi-tx@4a00000 {
+			status = "okay";
+
+			core-vdda-supply = <&pm8921_hdmi_switch>;
+			hdmi-mux-supply = <&ext_3p3v>;
+
+			hpd-gpios = <&tlmm_pinmux 72 GPIO_ACTIVE_HIGH>;
+
+			pinctrl-names = "default";
+			pinctrl-0 = <&hdmi_pinctrl>;
+
+			ports {
+				port@0 {
+					endpoint {
+						remote-endpoint = <&mdp_dtv_out>;
+					};
+				};
+
+				port@1 {
+					endpoint {
+						remote-endpoint = <&hdmi_con>;
+					};
+				};
+			};
+		};
+
+		hdmi-phy@4a00400 {
+			status = "okay";
+
+			core-vdda-supply = <&pm8921_hdmi_switch>;
+		};
+
+		mdp@5100000 {
+			status = "okay";
+
+			ports {
+				port@3 {
+					endpoint {
+						remote-endpoint = <&hdmi_in>;
+					};
+				};
+			};
+		};
 	};
 };
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