Patch "arm: dts: rockchip: add reset node for the exist saradc SoCs" has been added to the 4.7-stable tree
Subsystems (2)
This is a note to let you know that I've just added the patch titled
arm: dts: rockchip: add reset node for the exist saradc SoCs
to the 4.7-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
arm-dts-rockchip-add-reset-node-for-the-exist-saradc-socs.patch
and it can be found in the queue-4.7 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.
Quoted 1 line
From
3d4267a5a3a4b7619b80ad1839d8b3bedd8b7a8dMon Sep 17 00:00:00 2001
From: Caesar Wang <[email protected]>
Date: Wed, 27 Jul 2016 22:24:07 +0800
Subject: arm: dts: rockchip: add reset node for the exist saradc SoCs
From: Caesar Wang <[email protected]>
commit 3d4267a5a3a4b7619b80ad1839d8b3bedd8b7a8d upstream.
SARADC controller needs to be reset before programming it, otherwise it will not function properly.
--- arch/arm/boot/dts/rk3066a.dtsi | 2 ++ arch/arm/boot/dts/rk3288.dtsi | 2 ++ arch/arm/boot/dts/rk3xxx.dtsi | 2 ++ 3 files changed, 6 insertions(+)
arch/arm/boot/dts/rk3066a.dtsi +2 -0
@@ -197,6 +197,8 @@ clock-names = "saradc", "apb_pclk"; interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; #io-channel-cells = <1>; + resets = <&cru SRST_SARADC>; + reset-names = "saradc-apb"; status = "disabled"; };
arch/arm/boot/dts/rk3288.dtsi +2 -0
@@ -279,6 +279,8 @@ #io-channel-cells = <1>; clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>; clock-names = "saradc", "apb_pclk"; + resets = <&cru SRST_SARADC>; + reset-names = "saradc-apb"; status = "disabled"; };
arch/arm/boot/dts/rk3xxx.dtsi +2 -0
@@ -399,6 +399,8 @@ #io-channel-cells = <1>; clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>; clock-names = "saradc", "apb_pclk"; + resets = <&cru SRST_SARADC>; + reset-names = "saradc-apb"; status = "disabled"; };
Patches currently in stable-queue which might be from [email protected] are
queue-4.7/arm-dts-rockchip-add-reset-node-for-the-exist-saradc-socs.patch queue-4.7/iio-adc-rockchip_saradc-reset-saradc-controller-before-programming-it.patch