mach-aspeed: Add Zaius BMC-specific early setup
PATCH 1/5 mach-aspeed: Add Zaius BMC-specific early setup
Add initialization for "ingrasys,zaius-bmc" machines to deal with hardware issues on EVT1 boards. This overrides incorrect straps that enabled the SPI slave and disables pull down resistors that prevented buttons inputs from being driven high.
This code reads board revision fuse bits directly from GPIO registers because GPIO drivers are not available yet.
--- arch/arm/mach-aspeed/aspeed.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+)
arch/arm/mach-aspeed/aspeed.c +27 -0
@@ -170,6 +170,31 @@ static void __init do_witherspoon_setup(void)do_ast2500_common_setup (); } +static void __init do_zaius_setup (void ) +{ +unsigned long reg; +unsigned long board_rev; + +do_ast2500_common_setup (); + +/* Read BOARD_REV[4:0] fuses from GPIOM[7:3] */ + reg =readl (AST_IO (AST_BASE_GPIO |0x78 )); + board_rev = (reg >>3 ) &0x1F ; + +/* EVT1 hacks */ +if (board_rev ==0 ) { +/* Set strap[13:12] to 01, Enable SPI master */ +/* Set bits in writes to SCU7C are cleared from SCU70 */ +writel (BIT (13 ),AST_IO (AST_BASE_SCU |0x7C )); +/* SCU70 is set-only, so no read-modify-write needed */ +writel (BIT (12 ),AST_IO (AST_BASE_SCU |0x70 )); + +/* Disable GPIO I, G/AB pulldowns due to weak driving buffers */ + reg =readl (AST_IO (AST_BASE_SCU |0x8C )); +writel (reg |BIT (24 ) |BIT (22 ),AST_IO (AST_BASE_SCU |0x8C )); + } +} +#define SCU_PASSWORD 0x1688A8A8
@@ -216,6 +241,8 @@ static void __init aspeed_init_early(void)do_ast2500evb_setup ();if (of_machine_is_compatible ("ibm,witherspoon-bmc" ))do_witherspoon_setup (); +if (of_machine_is_compatible ("ingrasys,zaius-bmc" )) +do_zaius_setup (); }static void __init aspeed_map_io (void )
Signature · 1 line
2.8.0.rc3.226.g39d4020
PATCH 2/5 ARM: dts: aspeed: zaius: Fix pinctrl on MACs
Update the Zaius dts to reflect that MAC1 is intended for NCSI and MAC2 is connected to a BCM54612E gigabit PHY.
--- arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts +2 -2
@@ -68,7 +68,7 @@ status = "okay"; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_rgmii1_default>; + pinctrl-0 = <&pinctrl_rmii1_default>; use-ncsi; };
@@ -76,7 +76,7 @@ status = "okay"; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_rgmii2_default>; + pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>; }; &i2c0 {
Signature · 1 line
2.8.0.rc3.226.g39d4020
Re: [PATCH 2/5] ARM: dts: aspeed: zaius: Fix pinctrl on MACs
Quoted 4 lines · Xo Wang
Update the Zaius dts to reflect that MAC1 is intended for NCSI and MAC2 is connected to a BCM54612E gigabit PHY.
Signed-off-by Xo Wang <[email protected]>
Quoted 33 lines
--- arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts +2
-3@@ -68,7 +68,7 @@ status = "okay"; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_rgmii1_default>; + pinctrl-0 = <&pinctrl_rmii1_default>; use-ncsi; };@@ -76,7 +76,7 @@ status = "okay"; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_rgmii2_default>; + pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>; }; &i2c0 { --2.8.0.rc3.226.g39d4020
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PATCH 3/5 ARM: dts: aspeed: zaius: Add static GPIO config
In reply to Xo WangAdd GPIO hogs that turn on I2C muxes and I2C level shifter.
--- arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+)
arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts +24 -0
@@ -1,6 +1,7 @@ /dts-v1/; #include "aspeed-g5.dtsi" +#include <dt-bindings/gpio/aspeed-gpio.h> / { model = "Zaius BMC";
@@ -205,6 +206,29 @@ */ }; +&gpio { + line_iso_u146_en { + gpio-hog; + gpios = <ASPEED_GPIO(O, 4) GPIO_ACTIVE_HIGH>; + output-high; + line-name = "iso_u164_en"; + }; + + line_bmc_i2c2_sw_rst_n { + gpio-hog; + gpios = <ASPEED_GPIO(P, 1) GPIO_ACTIVE_HIGH>; + output-high; + line-name = "bmc_i2c2_sw_rst_n"; + }; + + line_bmc_i2c5_sw_rst_n { + gpio-hog; + gpios = <ASPEED_GPIO(P, 3) GPIO_ACTIVE_HIGH>; + output-high; + line-name = "bmc_i2c5_sw_rst_n"; + }; +}; + &vuart { status = "okay"; };
Signature · 1 line
2.8.0.rc3.226.g39d4020
Re: [PATCH 3/5] ARM: dts: aspeed: zaius: Add static GPIO config
Quoted 3 lines · Xo Wang
Add GPIO hogs that turn on I2C muxes and I2C level shifter.
Signed-off-by Xo Wang <[email protected]>
Quoted 53 lines
--- arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+)arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts +24
-1@@ -1,6 +1,7 @@ /dts-v1/; #include "aspeed-g5.dtsi" +#include <dt-bindings/gpio/aspeed-gpio.h> / { model = "Zaius BMC";@@ -205,6 +206,29 @@ */ }; +&gpio { + line_iso_u146_en { + gpio-hog; + gpios = <ASPEED_GPIO(O, 4) GPIO_ACTIVE_HIGH>; + output-high; + line-name = "iso_u164_en"; + }; + + line_bmc_i2c2_sw_rst_n { + gpio-hog; + gpios = <ASPEED_GPIO(P, 1) GPIO_ACTIVE_HIGH>; + output-high; + line-name = "bmc_i2c2_sw_rst_n"; + }; + + line_bmc_i2c5_sw_rst_n { + gpio-hog; + gpios = <ASPEED_GPIO(P, 3) GPIO_ACTIVE_HIGH>; + output-high; + line-name = "bmc_i2c5_sw_rst_n"; + }; +}; + &vuart { status = "okay"; }; --2.8.0.rc3.226.g39d4020
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PATCH 4/5 ARM: dts: aspeed: zaius: Use I2C buses and muxes
In reply to Xo WangEnable I2C buses on Zaius that have devices attached and add bindings for muxed I2C buses.
--- arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts | 22 ++++++++++++++++++---- 1 file changed, 18 insertions(+), 4 deletions(-)
arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts +18 -4
@@ -102,7 +102,14 @@ }; &i2c1 { - status = "disabled"; + status = "okay"; + + i2c-switch@71 { + compatible = "nxp,pca9546"; + reg = <0x71>; + #address-cells = <1>; + #size-cells = <0>; + }; /* MUX1 PCA9546A @71h * PCIe 0
@@ -125,7 +132,14 @@ }; &i2c4 { - status = "disabled"; + status = "okay"; + + i2c-switch@71 { + compatible = "nxp,pca9546"; + reg = <0x71>; + #address-cells = <1>; + #size-cells = <0>; + }; /* MUX1 PCA9546A @71h * PCIe 3
@@ -153,7 +167,7 @@ }; &i2c7 { - status = "disabled"; + status = "okay"; /* MUX PCA9541A (other master: CPU0 PCIe 1) * ADM1272 PMBUS @10h
@@ -167,7 +181,7 @@ }; &i2c8 { - status = "disabled"; + status = "okay"; /* CPU1 VR ISL68137 0.7V, 0.96V PMBUS @65h */ /* CPU1 VR ISL68137 1.2V CH03 PMBUS @44h */
Signature · 1 line
2.8.0.rc3.226.g39d4020
Re: [PATCH 4/5] ARM: dts: aspeed: zaius: Use I2C buses and muxes
Quoted 4 lines · Xo Wang
Enable I2C buses on Zaius that have devices attached and add bindings for muxed I2C buses.
Signed-off-by Xo Wang <[email protected]>
Quoted 65 lines
--- arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts | 22 ++++++++++++++++++---- 1 file changed, 18 insertions(+), 4 deletions(-)arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts +18
-5@@ -102,7 +102,14 @@ }; &i2c1 { - status = "disabled"; + status = "okay"; + + i2c-switch@71 { + compatible = "nxp,pca9546"; + reg = <0x71>; + #address-cells = <1>; + #size-cells = <0>; + }; /* MUX1 PCA9546A @71h * PCIe 0@@ -125,7 +132,14 @@ }; &i2c4 { - status = "disabled"; + status = "okay"; + + i2c-switch@71 { + compatible = "nxp,pca9546"; + reg = <0x71>; + #address-cells = <1>; + #size-cells = <0>; + }; /* MUX1 PCA9546A @71h * PCIe 3@@ -153,7 +167,7 @@ }; &i2c7 { - status = "disabled"; + status = "okay"; /* MUX PCA9541A (other master: CPU0 PCIe 1) * ADM1272 PMBUS @10h@@ -167,7 +181,7 @@ }; &i2c8 { - status = "disabled"; + status = "okay"; /* CPU1 VR ISL68137 0.7V, 0.96V PMBUS @65h */ /* CPU1 VR ISL68137 1.2V CH03 PMBUS @44h */ --2.8.0.rc3.226.g39d4020
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PATCH 5/5 ARM: dts: aspeed: zaius: Add front panel LEDs
In reply to Xo Wang--- arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+)
arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts +24 -0
@@ -59,6 +59,30 @@ }; }; }; + + leds { + compatible = "gpio-leds"; + + sys_boot_status { + label = "System boot status"; + gpios = <&gpio ASPEED_GPIO(H, 4) GPIO_ACTIVE_LOW>; + }; + + attention { + label = "Attention"; + gpios = <&gpio ASPEED_GPIO(H, 5) GPIO_ACTIVE_LOW>; + }; + + plt_fault { + label = "Platform fault"; + gpios = <&gpio ASPEED_GPIO(H, 6) GPIO_ACTIVE_LOW>; + }; + + hdd_fault { + label = "Onboard drive fault"; + gpios = <&gpio ASPEED_GPIO(H, 7) GPIO_ACTIVE_LOW>; + }; + }; }; &uart5 {
Signature · 1 line
2.8.0.rc3.226.g39d4020
Re: [PATCH 5/5] ARM: dts: aspeed: zaius: Add front panel LEDs
Quoted 1 line · Xo Wang
Signed-off-by Xo Wang <[email protected]>
Quoted 46 lines
--- arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+)arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts +24
-1@@ -59,6 +59,30 @@ }; }; }; + + leds { + compatible = "gpio-leds"; + + sys_boot_status { + label = "System boot status"; + gpios = <&gpio ASPEED_GPIO(H, 4) GPIO_ACTIVE_LOW>; + }; + + attention { + label = "Attention"; + gpios = <&gpio ASPEED_GPIO(H, 5) GPIO_ACTIVE_LOW>; + }; + + plt_fault { + label = "Platform fault"; + gpios = <&gpio ASPEED_GPIO(H, 6) GPIO_ACTIVE_LOW>; + }; + + hdd_fault { + label = "Onboard drive fault"; + gpios = <&gpio ASPEED_GPIO(H, 7) GPIO_ACTIVE_LOW>; + }; + }; }; &uart5 { --2.8.0.rc3.226.g39d4020
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Quoted 7 lines · Xo Wang
Add initialization for "ingrasys,zaius-bmc" machines to deal with hardware issues on EVT1 boards. This overrides incorrect straps that enabled the SPI slave and disables pull down resistors that prevented buttons inputs from being driven high.
This code reads board revision fuse bits directly from GPIO registers because GPIO drivers are not available yet.
That's unfortunate, but I can't think of another way to make it work.
Quoted 1 line
Signed-off-by Xo Wang <[email protected]>
Quoted 56 lines
--- arch/arm/mach-aspeed/aspeed.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+)arch/arm/mach-aspeed/aspeed.c +27
-1@@ -170,6 +170,31 @@ static void __init do_witherspoon_setup(void)do_ast2500_common_setup (); } +static void __init do_zaius_setup (void ) +{ +unsigned long reg; +unsigned long board_rev; + +do_ast2500_common_setup (); + +/* Read BOARD_REV[4:0] fuses from GPIOM[7:3] */ + reg =readl (AST_IO (AST_BASE_GPIO |0x78 )); + board_rev = (reg >>3 ) &0x1F ; + +/* EVT1 hacks */ +if (board_rev ==0 ) { +/* Set strap[13:12] to 01, Enable SPI master */ +/* Set bits in writes to SCU7C are cleared from SCU70 */ +writel (BIT (13 ),AST_IO (AST_BASE_SCU |0x7C )); +/* SCU70 is set-only, so no read-modify-write needed */ +writel (BIT (12 ),AST_IO (AST_BASE_SCU |0x70 )); + +/* Disable GPIO I, G/AB pulldowns due to weak driving buffers */ + reg =readl (AST_IO (AST_BASE_SCU |0x8C )); +writel (reg |BIT (24 ) |BIT (22 ),AST_IO (AST_BASE_SCU |0x8C )); + } +} +#define SCU_PASSWORD 0x1688A8A8@@ -216,6 +241,8 @@ static void __init aspeed_init_early(void)do_ast2500evb_setup ();if (of_machine_is_compatible ("ibm,witherspoon-bmc" ))do_witherspoon_setup (); +if (of_machine_is_compatible ("ingrasys,zaius-bmc" )) +do_zaius_setup (); }static void __init aspeed_map_io (void ) --2.8.0.rc3.226.g39d4020
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