Patch "x86/platform/intel-mid: Add Intel Penwell to ID table" has been added to the 4.8-stable tree
Subsystems (4)
This is a note to let you know that I've just added the patch titled
x86/platform/intel-mid: Add Intel Penwell to ID table
to the 4.8-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
x86-platform-intel-mid-add-intel-penwell-to-id-table.patch
and it can be found in the queue-4.8 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.
Quoted 1 line
From
8e522e1d321b12829960c9b26668c92f14c68d7fMon Sep 17 00:00:00 2001
From: Andy Shevchenko <[email protected]>
Date: Thu, 8 Sep 2016 13:32:31 +0300
Subject: x86/platform/intel-mid: Add Intel Penwell to ID table
From: Andy Shevchenko <[email protected]>
commit 8e522e1d321b12829960c9b26668c92f14c68d7f upstream.
Commit:
ca22312dc840 ("x86/platform/intel-mid: Extend PWRMU to support Penwell")
... enabled the PWRMU driver on platforms based on Intel Penwell, but unfortunately this is not enough.
Add Intel Penwell ID to pci-mid.c driver as well. To avoid confusion in the future add a comment to both drivers.
--- arch/x86/platform/intel-mid/pwr.c | 1 + drivers/pci/pci-mid.c | 5 +++++ 2 files changed, 6 insertions(+)
arch/x86/platform/intel-mid/pwr.c +1 -0
@@ -401,6 +401,7 @@ static const struct mid_pwr_device_info .set_initial_state = mid_set_initial_state, }; +/* This table should be in sync with the one in drivers/pci/pci-mid.c */ static const struct pci_device_id mid_pwr_pci_ids[] = { {PCI_VDEVICE (INTEL ,PCI_DEVICE_ID_PENWELL ), (kernel_ulong_t)&mid_info }, {PCI_VDEVICE (INTEL ,PCI_DEVICE_ID_TANGIER ), (kernel_ulong_t)&mid_info },
drivers/pci/pci-mid.c +5 -0
@@ -60,7 +60,12 @@ static struct pci_platform_pm_ops mid_pc#define ICPU (model) { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, } +/* +* This table should be in sync with the one in +* arch/x86/platform/intel-mid/pwr.c. +*/ static const struct x86_cpu_id lpss_cpu_ids[] = { +ICPU (INTEL_FAM6_ATOM_PENWELL ),ICPU (INTEL_FAM6_ATOM_MERRIFIELD ), {} };
Patches currently in stable-queue which might be from [email protected] are
queue-4.8/x86-platform-intel-mid-keep-sram-powered-on-at-boot.patch queue-4.8/x86-platform-intel-mid-add-intel-penwell-to-id-table.patch queue-4.8/x86-cpu-rename-merrifield2-to-moorefield.patch