Patch "drm/i915/backlight: setup and cache pwm alternate increment value" has been added to the 4.8-stable tree

PATCH [email protected] 1 participant 1 message Oct 28, 2016

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Stable branch DRM drivers Intel i915

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2016-10-28 08:46 UTC #0 lore raw

This is a note to let you know that I've just added the patch titled

drm/i915/backlight: setup and cache pwm alternate increment value

to the 4.8-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
drm-i915-backlight-setup-and-cache-pwm-alternate-increment-value.patch
and it can be found in the queue-4.8 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.

Quoted 1 line

From 16e1203db8ab740c912ea62761fdf27d7811b886 Mon Sep 17 00:00:00 2001

From: Jani Nikula <[email protected]>
Date: Mon, 19 Sep 2016 13:35:25 +0300
Subject: drm/i915/backlight: setup and cache pwm alternate increment value
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

From: Jani Nikula <[email protected]>

commit 16e1203db8ab740c912ea62761fdf27d7811b886 upstream.

This will also be needed later on when setting up the alternate increment in backlight enable.

Cc Shawn Lee <[email protected]>

Reviewed-by Ville Syrjälä <[email protected]>

Signed-off-by Jani Nikula <[email protected]>

Link http://patchwork.freedesktop.org/patch/msgid/9984b20bc59aee90b83caf59ce91f3fb122c9627.1474281249.git.jani.nikula@intel.com

(cherry picked from commit 32b421e79e6b546da1d469f1229403ac9142d695)

Signed-off-by Jani Nikula <[email protected]>

Signed-off-by Greg Kroah-Hartman <[email protected]>

---
 drivers/gpu/drm/i915/intel_drv.h   |    1 +
 drivers/gpu/drm/i915/intel_panel.c |   14 +++++++++++---
 2 files changed, 12 insertions(+), 3 deletions(-)

drivers/gpu/drm/i915/intel_drv.h +1 -0

@@ -236,6 +236,7 @@ struct intel_panel {
 		bool enabled;
 		bool combination_mode;	/* gen 2/4 only */
 		bool active_low_pwm;
+		bool alternate_pwm_increment;	/* lpt+ */
 
 		/* PWM chip */
 		bool util_pin_active_low;	/* bxt+ */

drivers/gpu/drm/i915/intel_panel.c +11 -3

@@ -1242,10 +1242,10 @@ static u32 bxt_hz_to_pwm(struct intel_co
  */
 static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
 {
-	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+	struct intel_panel *panel = &connector->panel;
 	u32 mul;
 
-	if (I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY)
+	if (panel->backlight.alternate_pwm_increment)
 		mul = 128;
 	else
 		mul = 16;

@@ -1261,9 +1261,10 @@ static u32 spt_hz_to_pwm(struct intel_co
 static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
 {
 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+	struct intel_panel *panel = &connector->panel;
 	u32 mul, clock;
 
-	if (I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY)
+	if (panel->backlight.alternate_pwm_increment)
 		mul = 16;
 	else
 		mul = 128;

@@ -1414,6 +1415,13 @@ static int lpt_setup_backlight(struct in
 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 	struct intel_panel *panel = &connector->panel;
 	u32 pch_ctl1, pch_ctl2, val;
+	bool alt;
+
+	if (HAS_PCH_LPT(dev_priv))
+		alt = I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY;
+	else
+		alt = I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY;
+	panel->backlight.alternate_pwm_increment = alt;
 
 	pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
 	panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;

Patches currently in stable-queue which might be from [email protected] are

queue-4.8/drm-i915-backlight-setup-backlight-pwm-alternate-increment-on-backlight-enable.patch queue-4.8/drm-i915-backlight-setup-and-cache-pwm-alternate-increment-value.patch