dm: Generic MTD Subsystem/SPI-NOR

- Add generic dm_mtd operations
- Add mtd_read|erase|write_dm
- Add add_mtd_device_dm

The respetive MTD_UCLASS drivers must install the hooks to these dm_mtd_ops and other core ops are act as a interface b/w drivers vs command code.

Signed-off-by Jagan Teki <[email protected]>

---
 drivers/mtd/mtd-uclass.c | 72 ++++++++++++++++++++++++++++++++++++++++++++++++
 include/mtd.h            | 54 ++++++++++++++++++++++++++++++++++++
 2 files changed, 126 insertions(+)

drivers/mtd/mtd-uclass.c +72 -0

index 7b7c48e..acbd713 100644
@@ -1,4 +1,5 @@
 /*
+ * Copyright (C) 2016 Jagan Teki <[email protected]>
  * Copyright (C) 2015 Thomas Chou <[email protected]>
  *
  * SPDX-License-Identifier:    GPL-2.0+

@@ -8,6 +9,77 @@
 #include <dm.h>
 #include <errno.h>
 #include <mtd.h>
+#include <linux/log2.h>
+
+int dm_mtd_read(struct udevice *dev, loff_t from, size_t len, size_t *retlen,
+               u_char *buf)
+{
+       struct mtd_info *mtd = mtd_get_info(dev);
+
+       *retlen = 0;
+       if (from < 0 || from > mtd->size || len > mtd->size - from)
+               return -EINVAL;
+       if (!len)
+               return 0;
+
+       return mtd_get_ops(dev)->_read(dev, from, len, retlen, buf);
+}
+
+int dm_mtd_erase(struct udevice *dev, struct erase_info *instr)
+{
+       struct mtd_info *mtd = mtd_get_info(dev);
+
+       if (instr->addr > mtd->size || instr->len > mtd->size - instr->addr)
+               return -EINVAL;
+       if (!(mtd->flags & MTD_WRITEABLE))
+               return -EROFS;
+       instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
+       if (!instr->len) {
+               instr->state = MTD_ERASE_DONE;
+               return 0;
+       }
+
+       return mtd_get_ops(dev)->_erase(dev, instr);
+}
+
+int dm_mtd_write(struct udevice *dev, loff_t to, size_t len, size_t *retlen,
+                const u_char *buf)
+{
+       struct mtd_info *mtd = mtd_get_info(dev);
+
+       *retlen = 0;
+       if (to < 0 || to > mtd->size || len > mtd->size - to)
+               return -EINVAL;
+       if (!mtd_get_ops(dev)->_write || !(mtd->flags & MTD_WRITEABLE))
+               return -EROFS;
+       if (!len)
+               return 0;
+
+       return mtd_get_ops(dev)->_write(dev, to, len, retlen, buf);
+}
+
+int dm_add_mtd_device(struct udevice *dev)
+{
+       struct mtd_info *mtd = mtd_get_info(dev);
+
+       BUG_ON(mtd->writesize == 0);
+       mtd->usecount = 0;
+
+       if (is_power_of_2(mtd->erasesize))
+               mtd->erasesize_shift = ffs(mtd->erasesize) - 1;
+       else
+               mtd->erasesize_shift = 0;
+
+       if (is_power_of_2(mtd->writesize))
+               mtd->writesize_shift = ffs(mtd->writesize) - 1;
+       else
+               mtd->writesize_shift = 0;
+
+       mtd->erasesize_mask = (1 << mtd->erasesize_shift) - 1;
+       mtd->writesize_mask = (1 << mtd->writesize_shift) - 1;
+
+       return 0;
+}
 
 /*
  * Implement a MTD uclass which should include most flash drivers.

include/mtd.h +0 -0

index 3f8c293..93b5eaf 100644

include/mtd.h +48 -1

+};
+
+/* Access the serial operations for a device */
+#define mtd_get_ops(dev) ((struct dm_mtd_ops *)(dev)->driver->ops)
+
+/**
+ * dm_mtd_read() - Read data from MTD device
+ *
+ * @dev:       MTD device
+ * @from:      Offset into device in bytes to read from
+ * @len:       Length of bytes to read
+ * @retlen:    Length of return bytes read to
+ * @buf:       Buffer to put the data that is read
+ * @return 0 if OK, -ve on error
+ */
+int dm_mtd_read(struct udevice *dev, loff_t from, size_t len, size_t *retlen,
+               u_char *buf);
+
+/**
+ * dm_mtd_write() - Write data to MTD device
+ *
+ * @dev:       MTD device
+ * @to:                Offset into device in bytes to write to
+ * @len:       Length of bytes to write
+ * @retlen:    Length of return bytes to write to
+ * @buf:       Buffer containing bytes to write
+ * @return 0 if OK, -ve on error
+ */
+int dm_mtd_write(struct udevice *dev, loff_t to, size_t len, size_t *retlen,
+                const u_char *buf);
+
+/**
+ * dm_mtd_erase() - Erase blocks of the MTD device
+ *
+ * @dev:       MTD device
+ * @instr:     Erase info details of MTD device
+ * @return 0 if OK, -ve on error
+ */
+int dm_mtd_erase(struct udevice *dev, struct erase_info *instr);
+
+/**
+ * dm_add_mtd_device() - Add MTD device
+ *
+ * @dev:       MTD device
+ * @return 0 if OK, -ve on error
+ */
+int dm_add_mtd_device(struct udevice *dev);
+
 #endif /* _MTD_H_ */
--

2.7.4

Some of the SPI device drivers at drivers/spi not a real spi controllers, Unlike normal/generic SPI controllers they operates only with SPI-NOR flash devices. these were technically termed as SPI-NOR controllers, Ex: drivers/spi/fsl_qspi.c

The problem with these were resides at drivers/spi is entire SPI layer becomes SPI-NOR flash oriented which is absolutely a wrong indication where SPI layer getting effected more with flash operations - So this SPI-NOR core will resolve this issue by separating all SPI-NOR flash operations from spi layer and creats a generic layer called SPI-NOR core which can be used to interact SPI-NOR to SPI driver interface layer and the SPI-NOR controller driver. The idea is taken from Linux spi-nor framework.

------------------------------
cmd_sf.c
------------------------------
mtd-uclass
-------------------------------
SPI-NOR Core
-------------------------------
m25p80.c zynq_qspi
-------------------------------
spi-uclass SPI NOR chip
-------------------------------
spi drivers
-------------------------------
SPI NOR chip
-------------------------------

Signed-off-by Jagan Teki <[email protected]>

---
 Makefile                          |   1 +
 drivers/mtd/spi-nor/Makefile      |   9 +
 drivers/mtd/spi-nor/spi-nor-ids.c | 176 +++++++++++
 drivers/mtd/spi-nor/spi-nor.c     | 648 ++++++++++++++++++++++++++++++++++++++
 include/linux/err.h               |   5 +
 include/linux/mtd/spi-nor.h       | 207 ++++++++++++
 6 files changed, 1046 insertions(+)
 create mode 100644 drivers/mtd/spi-nor/Makefile
 create mode 100644 drivers/mtd/spi-nor/spi-nor-ids.c
 create mode 100644 drivers/mtd/spi-nor/spi-nor.c
 create mode 100644 include/linux/mtd/spi-nor.h

include/linux/mtd/spi-nor.h new file +178 -0

new file mode 100644
index 0000000..4e5b3ba
@@ -0,0 +1,207 @@
+/*
+ * SPI NOR Core header file.
+ *
+ * Copyright (C) 2016 Jagan Teki <[email protected]>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef __MTD_SPI_NOR_H
+#define __MTD_SPI_NOR_H
+
+#include <common.h>
+
+/*
+ * Manufacturer IDs
+ *
+ * The first byte returned from the flash after sending opcode SPINOR_OP_RDID.
+ * Sometimes these are the same as CFI IDs, but sometimes they aren't.
+ */
+#define SNOR_MFR_ATMEL         0x1f
+#define SNOR_MFR_MACRONIX      0xc2
+#define SNOR_MFR_MICRON                0x20    /* ST Micro <--> Micron */
+#define SNOR_MFR_SPANSION      0x01
+#define SNOR_MFR_SST           0xbf
+#define SNOR_MFR_WINBOND       0xef
+
+/**
+ * SPI NOR opcodes.
+ *
+ * Note on opcode nomenclature: some opcodes have a format like
+ * SNOR_OP_FUNCTION{4,}_x_y_z. The numbers x, y, and z stand for the number
+ * of I/O lines used for the opcode, address, and data (respectively). The
+ * FUNCTION has an optional suffix of '4', to represent an opcode which
+ * requires a 4-byte (32-bit) address.
+ */
+#define SNOR_OP_WRDI           0x04    /* Write disable */
+#define SNOR_OP_WREN           0x06    /* Write enable */
+#define SNOR_OP_RDSR           0x05    /* Read status register */
+#define SNOR_OP_WRSR           0x01    /* Write status register 1 byte */
+#define SNOR_OP_READ           0x03    /* Read data bytes (low frequency) */
+#define SNOR_OP_READ_FAST      0x0b    /* Read data bytes (high frequency) */
+#define SNOR_OP_READ_1_1_2     0x3b    /* Read data bytes (Dual SPI) */
+#define SNOR_OP_READ_1_1_2_IO  0xbb    /* Read data bytes (Dual IO SPI) */
+#define SNOR_OP_READ_1_1_4     0x6b    /* Read data bytes (Quad SPI) */
+#define SNOR_OP_READ_1_1_4_IO  0xeb    /* Read data bytes (Quad IO SPI) */
+#define SNOR_OP_BRWR           0x17    /* Bank register write */
+#define SNOR_OP_BRRD           0x16    /* Bank register read */
+#define SNOR_OP_WREAR          0xC5    /* Write extended address register */
+#define SNOR_OP_RDEAR          0xC8    /* Read extended address register */
+#define SNOR_OP_PP             0x02    /* Page program (up to 256 bytes) */
+#define SNOR_OP_QPP            0x32    /* Quad Page program */
+#define SNOR_OP_BE_4K          0x20    /* Erase 4KiB block */
+#define SNOR_OP_BE_4K_PMC      0xd7    /* Erase 4KiB block on PMC chips */
+#define SNOR_OP_BE_32K         0x52    /* Erase 32KiB block */
+#define SPINOR_OP_CHIP_ERASE   0xc7    /* Erase whole flash chip */
+#define SNOR_OP_SE             0xd8    /* Sector erase (usually 64KiB) */
+#define SNOR_OP_RDID           0x9f    /* Read JEDEC ID */
+#define SNOR_OP_RDCR           0x35    /* Read configuration register */
+#define SNOR_OP_RDFSR          0x70    /* Read flag status register */
+
+/* Used for SST flashes only. */
+#define SNOR_OP_BP             0x02    /* Byte program */
+#define SNOR_OP_AAI_WP         0xad    /* Auto addr increment word program */
+
+/* Status Register bits. */
+#define SR_WIP                 BIT(0)  /* Write in progress */
+#define SR_WEL                 BIT(1)  /* Write enable latch */
+
+/* meaning of other SR_* bits may differ between vendors */
+#define SR_BP0                 BIT(2)  /* Block protect 0 */
+#define SR_BP1                 BIT(3)  /* Block protect 1 */
+#define SR_BP2                 BIT(4)  /* Block protect 2 */
+#define SR_SRWD                        BIT(7)  /* SR write protect */
+
+#define SR_QUAD_EN_MX          BIT(6)  /* Macronix Quad I/O */
+
+/* Flag Status Register bits */
+#define FSR_READY              BIT(7)
+
+/* Configuration Register bits. */
+#define CR_QUAD_EN_SPAN                BIT(1) /* Spansion/Winbond Quad I/O */
+
+/* Flash timeout values */
+#define SNOR_READY_WAIT_PROG   (2 * CONFIG_SYS_HZ)
+#define SNOR_READY_WAIT_ERASE  (5 * CONFIG_SYS_HZ)
+#define SNOR_MAX_CMD_SIZE      4
+#define SNOR_16MB_BOUN         0x1000000
+
+enum snor_option_flags {
+       SNOR_F_SST_WRITE        = BIT(0),
+       SNOR_F_USE_FSR          = BIT(1),
+       SNOR_F_U_PAGE           = BIT(1),
+};
+
+enum mode {
+       SNOR_READ               = BIT(0),
+       SNOR_READ_1_1_2         = BIT(1),
+       SNOR_READ_1_1_4         = BIT(2),
+       SNOR_READ_1_1_2_IO      = BIT(3),
+       SNOR_READ_1_1_4_IO      = BIT(4),
+       SNOR_WRITE_1_1_BYTE     = BIT(5),
+       SNOR_WRITE_1_1_4        = BIT(6),
+};
+
+#define JEDEC_MFR(info)                ((info)->id[0])
+#define JEDEC_ID(info)         (((info)->id[1]) << 8 | ((info)->id[2]))
+#define JEDEC_EXT(info)                (((info)->id[3]) << 8 | ((info)->id[4]))
+#define SPI_NOR_MAX_ID_LEN     6
+
+struct spi_nor_info {
+       char            *name;
+
+       /*
+        * This array stores the ID bytes.
+        * The first three bytes are the JEDIC ID.
+        * JEDEC ID zero means "no ID" (mostly older chips).
+        */
+       u8              id[SPI_NOR_MAX_ID_LEN];
+       u8              id_len;
+
+       /* The size listed here is what works with SNOR_OP_SE, which isn't
+        * necessarily called a "sector" by the vendor.
+        */
+       unsigned        sector_size;
+       u16             n_sectors;
+
+       u16             page_size;
+
+       u16             flags;
+#define SECT_4K                        BIT(0)
+#define E_FSR                  BIT(1)
+#define SST_WR                 BIT(2)
+#define WR_QPP                 BIT(3)
+#define RD_QUAD                        BIT(4)
+#define RD_DUAL                        BIT(5)
+#define RD_QUADIO              BIT(6)
+#define RD_DUALIO              BIT(7)
+#define RD_FULL                        (RD_QUAD | RD_DUAL | RD_QUADIO | RD_DUALIO)
+};
+
+extern const struct spi_nor_info spi_nor_ids[];
+
+/**
+ * struct spi_nor - Structure for defining a the SPI NOR layer
+ *
+ * @dev:               SPI NOR device
+ * @name:              name of the SPI NOR device
+ * @page_size:         the page size of the SPI NOR
+ * @addr_width:                number of address bytes
+ * @erase_opcode:      the opcode for erasing a sector
+ * @read_opcode:       the read opcode
+ * @read_dummy:                the dummy bytes needed by the read operation
+ * @program_opcode:    the program opcode
+ * @max_write_size:    If non-zero, the maximum number of bytes which can
+ *                     be written at once, excluding command bytes.
+ * @flags:             flag options for the current SPI-NOR (SNOR_F_*)
+ * @mode:              read, write mode or any other mode bits.
+ * @read_mode:         read mode.
+ * @cmd_buf:           used by the write_reg
+ * @read_reg:          [DRIVER-SPECIFIC] read out the register
+ * @write_reg:         [DRIVER-SPECIFIC] write data to the register
+ * @read:              [DRIVER-SPECIFIC] read data from the SPI NOR
+ * @write:             [DRIVER-SPECIFIC] write data to the SPI NOR
+ * @memory_map:        address of read-only SPI NOR access
+ * @priv:              the private data
+ */
+struct spi_nor {
+       struct udevice          *dev;
+       const char              *name;
+       u32                     page_size;
+       u8                      addr_width;
+       u8                      erase_opcode;
+       u8                      read_opcode;
+       u8                      read_dummy;
+       u8                      program_opcode;
+       u32                     max_write_size;
+       u32                     flags;
+       u8                      mode;

include/linux/mtd/spi-nor.h new file +19 -1

+
+       void *memory_map;
+       void *priv;
+};
+
+/**
+ * spi_nor_scan() - scan the SPI NOR
+ *
+ * @dev:               SPI NOR device
+ *
+ * The drivers can use this fuction to scan the SPI NOR.
+ * In the scanning, it will try to get all the necessary information to
+ * fill the mtd_info{} and the spi_nor{}.
+ *
+ * @return 0 if OK, -ve on error
+ */
+int spi_nor_scan(struct udevice *dev);
+
+#endif /* __MTD_SPI_NOR_H */
--

2.7.4

Added CONFIG_MTD_SPI_NOR kconfig entry

Signed-off-by Jagan Teki <[email protected]>

---
 drivers/mtd/Kconfig         |  2 ++
 drivers/mtd/spi-nor/Kconfig | 14 ++++++++++++++
 2 files changed, 16 insertions(+)
 create mode 100644 drivers/mtd/spi-nor/Kconfig

Added CONFIG_MTD_SPI_NOR_USE_4K_SECTORS kconfig entry

Signed-off-by Jagan Teki <[email protected]>

---
 drivers/mtd/spi-nor/Kconfig | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

Added CONFIG_SPI_NOR_MISC kconfig entry

Signed-off-by Jagan Teki <[email protected]>

---
 drivers/mtd/spi-nor/Kconfig | 6 ++++++
 1 file changed, 6 insertions(+)

Added CONFIG_SPI_NOR_MACRONIX kconfig entry

Signed-off-by Jagan Teki <[email protected]>

---
 drivers/mtd/spi-nor/Kconfig | 5 +++++
 1 file changed, 5 insertions(+)

Added CONFIG_SPI_NOR_SPANSION kconfig entry

Signed-off-by Jagan Teki <[email protected]>

---
 drivers/mtd/spi-nor/Kconfig | 5 +++++
 1 file changed, 5 insertions(+)

Added CONFIG_SPI_NOR_STMICRO kconfig entry

Signed-off-by Jagan Teki <[email protected]>

---
 drivers/mtd/spi-nor/Kconfig | 5 +++++
 1 file changed, 5 insertions(+)

Added CONFIG_SPI_NOR_SST kconfig entry

Signed-off-by Jagan Teki <[email protected]>

---
 drivers/mtd/spi-nor/Kconfig | 5 +++++
 1 file changed, 5 insertions(+)

Added CONFIG_SPI_NOR_WINBOND kconfig entry

Signed-off-by Jagan Teki <[email protected]>

---
 drivers/mtd/spi-nor/Kconfig | 5 +++++
 1 file changed, 5 insertions(+)

Add support for SPI synchronous write followed by read, this is common interface call from spi-nor to spi drivers.

Signed-off-by Jagan Teki <[email protected]>

---
 drivers/spi/spi-uclass.c | 24 ++++++++++++++++++++++++
 include/spi.h            | 20 ++++++++++++++++++++
 2 files changed, 44 insertions(+)

This is MTD SPI-NOR driver for ST M25Pxx (and similar) serial flash chips which is written as MTD_UCLASS.

Signed-off-by Jagan Teki <[email protected]>

---
 drivers/mtd/spi-nor/Makefile |   3 +
 drivers/mtd/spi-nor/m25p80.c | 217 +++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 220 insertions(+)
 create mode 100644 drivers/mtd/spi-nor/m25p80.c

drivers/mtd/spi-nor/Makefile +3 -0

index 15e43ea..d11ccf4 100644
@@ -7,3 +7,6 @@
 ifdef CONFIG_MTD_SPI_NOR
 obj-y  += spi-nor.o spi-nor-ids.o
 endif
+
+## spi-nor to spi interface driver
+obj-$(CONFIG_MTD_M25P80)       += m25p80.o

drivers/mtd/spi-nor/m25p80.c new file +0 -0

new file mode 100644
index 0000000..740d3f6

drivers/mtd/spi-nor/m25p80.c new file +5 -0

+static const struct udevice_id m25p_ids[] = {
+       /*
+        * Generic compatibility for SPI NOR that can be identified by the
+        * JEDEC READ ID opcode (0x9F). Use this, if possible.
+        */

+};
--
2.7.4

Add CONFIG_MTD_M25P80 kconfig entry

Signed-off-by Jagan Teki <[email protected]>

---
 drivers/mtd/spi-nor/Kconfig | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

Add flags for mtd-uclass driver.

Signed-off-by Jagan Teki <[email protected]>

---
 drivers/mtd/mtd-uclass.c | 1 +
 1 file changed, 1 insertion(+)

Add .post_bind on mtd-uclass driver

Signed-off-by Jagan Teki <[email protected]>

---
 drivers/mtd/mtd-uclass.c | 3 +++
 1 file changed, 3 insertions(+)

cmd/mtd.c is a generic command to access all low level MTD devices, like SPI-NOR, Parallel NOR and NAND.

This is implemented based on u-boot driver model, so any new driver added for using this command must follow dm principles.

Signed-off-by Jagan Teki <[email protected]>

---
 cmd/Kconfig              |   6 +
 cmd/Makefile             |   1 +
 cmd/mtd.c                | 285 +++++++++++++++++++++++++++++++++++++++++++++++
 drivers/mtd/Makefile     |   2 +-
 drivers/mtd/mtd-uclass.c |  17 +++
 include/mtd.h            |   9 ++
 6 files changed, 319 insertions(+), 1 deletion(-)
 create mode 100644 cmd/mtd.c

The previous series [1] [2] are added SPI-NOR on top of mtd/spi where it bypassing DM_SPI_FLASH and use the existing mtd core (which is non-dm), I feel this is moving in a reverse direction where adding new feature with the help of non-dm mtd core support and also few of the spi drivers are not fully dm-driven.

Previous design series[3]: keep the mtd/spi as it is and start adding spi-nor features separately. The idea here is to add the dm features to MTD first and then add UCLASS_MTD spi-nor drivers so-that the commands are interfacing to spi-nor through dm-driven MTD core to spi-nor.

This series adding a new command 'mtd.c' which is common for all MTD devices SPI-NOR, SPI-NOR(master) and Parallel NOR with dm-driven.

SPI-NOR and Parallel NOR:
------------------------

------------------------------------
mtd.c
------------------------------------
mtd-uclass
------------------------------------
SPI-NOR Core CFI FLASH
------------------------------------
m25p80.c zynq_qspi
-----------------------------------
spi-uclass SPI NOR chip
-----------------------------------
spi drivers
-----------------------------------
SPI NOR chip
-----------------------------------

drivers/mtd/spi-nor/

- Add dm mtd operations
- spi-nor.c: Add basic SPI-NOR core like erase/read/write ops and lock's will add later
- m25p80.c: spi-nor to spi divers interface layer drivers/spi-nor
- zynq_qspi.c: zynq qspi spi-nor controller driver.

Current Status:
--------------
- SPI-NOR Controller design flow working, see Log

TODO:
----
- SPI-NOR with SPI bus
- Parallel NOR.

Log:
----
Zynq> mtd
mtd - MTD Sub-system

Usage:

mtd list                        - show list of MTD devices
mtd info                        - show current MTD device info
mtd probe devnum                - probe the 'devnum' MTD device
mtd erase offset len            - erase 'len' bytes from 'offset'
mtd write addr to len           - write 'len' bytes to 'to' from 'addr'
mtd read addr from len          - read 'len' bytes from 'from' to 'addr'

Zynq> mtd list
MTD 1: spi-nor at e000d000
Zynq>
MTD 1: spi-nor at e000d000
Zynq> mtd list
MTD 1: spi-nor at e000d000
Zynq> mtd probe 0
failing to set MTD device 0
Zynq> mtd probe 1
SPI-NOR: detected s25fl128s_64k with page size 256 Bytes, erase size 64 KiB, total 16 MiB Zynq> mtd info
MTD Device 1: s25fl128s_64k

 Page size:     256 B
 Erase size:    64 KiB
 Size:          16 MiB

Zynq> mtd list
MTD 1: spi-nor at e000d000 (active 1)
Zynq> mtd erase 0xE00000 0x100000
MTD: 1048576 bytes @ 0xe00000 Erased: OK
Zynq> mw.b 0x100 0xaa 0x100000
Zynq> mtd write 0x100 0xE00000 0x100000
device 0 offset 0xe00000, size 0x100000
MTD: 1048576 bytes @ 0xe00000 Written: OK
Zynq> mtd read 0x3000000 0xE00000 0x100000
device 0 offset 0xe00000, size 0x100000
MTD: 1048576 bytes @ 0xe00000 Read: OK
Zynq> cmp.b 0x3000000 0x100 0x100000
Total of 1048576 byte(s) were the same

Testing:
-------

$ git clone git://git.denx.de/u-boot-spi.git
$ cd u-boot-spi
$ git checkout -b mtd origin/mtd-working

[1] http://lists.denx.de/pipermail/u-boot/2016-March/249286.html
[2] http://lists.denx.de/pipermail/u-boot/2016-February/245418.html
[3] [PATCH RFC v8 00/16] SPI-NOR/MTD addition

Jagan Teki (21):
dm: mtd: Add dm mtd core ops
mtd: Add SPI-NOR core support
mtd: spi-nor: Kconfig: Add MTD_SPI_NOR entry
mtd: spi-nor: Kconfig: Add MTD_SPI_NOR_USE_4K_SECTORS
mtd: spi-nor: Kconfig: Add SPI_NOR_MISC entry
mtd: spi-nor: Kconfig: Add SPI_NOR_MACRONIX entry
mtd: spi-nor: Kconfig: Add SPI_NOR_SPANSION entry
mtd: spi-nor: Kconfig: Add SPI_NOR_STMICRO entry
mtd: spi-nor: Kconfig: Add SPI_NOR_SST entry
mtd: spi-nor: Kconfig: Add SPI_NOR_WINBOND entry
spi: Add spi_write_then_read
mtd: spi-nor: Add m25p80 driver
mtd: spi-nor: Kconfig: Add MTD_M25P80 entry
mtd: spi-nor: Add zynq qspinor driver
mtd: spi-nor: zynq_qspi: Kconfig: Add MTD_ZYNQ
mtd: spi-nor: Add 4-byte addresswidth support
dm: mtd: Add uclass_driver.flags
dm: mtd: Add post_bind
cmd: Add mtd command support
arm: dts: zynq: Add zynq-qspinor node
dm: zynq: microzed: Enable MTD/SPI-NOR

 Makefile                           |   1 +
 arch/arm/dts/zynq-7000.dtsi        |  12 +
 arch/arm/dts/zynq-microzed.dts     |   6 +
 cmd/Kconfig                        |   6 +
 cmd/Makefile                       |   1 +
 cmd/mtd.c                          | 285 ++++++++++++++++
 configs/zynq_microzed_defconfig    |  14 +-
 drivers/mtd/Kconfig                |   2 +
 drivers/mtd/Makefile               |   2 +-
 drivers/mtd/mtd-uclass.c           |  93 +++++
 drivers/mtd/spi-nor/Kconfig        |  89 +++++
 drivers/mtd/spi-nor/Makefile       |  15 +
 drivers/mtd/spi-nor/m25p80.c       | 218 ++++++++++++
 drivers/mtd/spi-nor/spi-nor-ids.c  | 176 ++++++++++
 drivers/mtd/spi-nor/spi-nor.c      | 684 +++++++++++++++++++++++++++++++++++++
 drivers/mtd/spi-nor/zynq_qspinor.c | 641 ++++++++++++++++++++++++++++++++++
 drivers/spi/spi-uclass.c           |  24 ++
 include/linux/err.h                |   5 +
 include/linux/mtd/spi-nor.h        | 211 ++++++++++++
 include/mtd.h                      |  63 ++++
 include/spi.h                      |  20 ++
 21 files changed, 2562 insertions(+), 6 deletions(-)
 create mode 100644 cmd/mtd.c
 create mode 100644 drivers/mtd/spi-nor/Kconfig
 create mode 100644 drivers/mtd/spi-nor/Makefile
 create mode 100644 drivers/mtd/spi-nor/m25p80.c
 create mode 100644 drivers/mtd/spi-nor/spi-nor-ids.c
 create mode 100644 drivers/mtd/spi-nor/spi-nor.c
 create mode 100644 drivers/mtd/spi-nor/zynq_qspinor.c
 create mode 100644 include/linux/mtd/spi-nor.h

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2.7.4