Patch "dmaengine: at_xdmac: fix spurious flag status for mem2mem transfers" has been added to the 4.4-stable tree
Subsystems (3)
This is a note to let you know that I've just added the patch titled
dmaengine: at_xdmac: fix spurious flag status for mem2mem transfers
to the 4.4-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
dmaengine-at_xdmac-fix-spurious-flag-status-for-mem2mem-transfers.patch
and it can be found in the queue-4.4 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.
Quoted 1 line
From
95da0c19d164f6df0b71a5187950f47d4b746e91Mon Sep 17 00:00:00 2001
From: Ludovic Desroches <[email protected]>
Date: Mon, 23 Nov 2015 14:09:39 +0100
Subject: dmaengine: at_xdmac: fix spurious flag status for mem2mem transfers
From: Ludovic Desroches <[email protected]>
commit 95da0c19d164f6df0b71a5187950f47d4b746e91 upstream.
When setting the channel configuration register, the perid field is not set to 0 since it is useless for mem2mem transfers. Unfortunately, a device has 0 as perid. It could cause spurious flags status because the controller could mix some events from the two channels.
For that reason, use the highest perid value for mem2mem transfers since it doesn't match the perid of other devices.
--- drivers/dma/at_xdmac.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-)
drivers/dma/at_xdmac.c +15 -3
@@ -864,8 +864,12 @@ at_xdmac_interleaved_queue_desc(struct d* access. Hopefully we can access DDR through both ports (at least on * SAMA5D4x), so we can use the same interface for source and dest, * that solves the fact we don't know the direction. +* ERRATA: Even if useless for memory transfers, the PERID has to not +* match the one of another channel. If not, it could lead to spurious +* flag status. */ -u32 chan_cc =AT_XDMAC_CC_DIF (0 ) +u32 chan_cc =AT_XDMAC_CC_PERID (0x3f ) + |AT_XDMAC_CC_DIF (0 ) |AT_XDMAC_CC_SIF (0 ) |AT_XDMAC_CC_MBSIZE_SIXTEEN |AT_XDMAC_CC_TYPE_MEM_TRAN ;
@@ -1042,8 +1046,12 @@ at_xdmac_prep_dma_memcpy(struct dma_chan* access DDR through both ports (at least on SAMA5D4x), so we can use * the same interface for source and dest, that solves the fact we * don't know the direction. +* ERRATA: Even if useless for memory transfers, the PERID has to not +* match the one of another channel. If not, it could lead to spurious +* flag status. */ -u32 chan_cc =AT_XDMAC_CC_DAM_INCREMENTED_AM +u32 chan_cc =AT_XDMAC_CC_PERID (0x3f ) + |AT_XDMAC_CC_DAM_INCREMENTED_AM |AT_XDMAC_CC_SAM_INCREMENTED_AM |AT_XDMAC_CC_DIF (0 ) |AT_XDMAC_CC_SIF (0 )
@@ -1144,8 +1152,12 @@ static struct at_xdmac_desc *at_xdmac_me* access. Hopefully we can access DDR through both ports (at least on * SAMA5D4x), so we can use the same interface for source and dest, * that solves the fact we don't know the direction. +* ERRATA: Even if useless for memory transfers, the PERID has to not +* match the one of another channel. If not, it could lead to spurious +* flag status. */ -u32 chan_cc =AT_XDMAC_CC_DAM_UBS_AM +u32 chan_cc =AT_XDMAC_CC_PERID (0x3f ) + |AT_XDMAC_CC_DAM_UBS_AM |AT_XDMAC_CC_SAM_INCREMENTED_AM |AT_XDMAC_CC_DIF (0 ) |AT_XDMAC_CC_SIF (0 )
Patches currently in stable-queue which might be from [email protected] are
queue-4.4/dmaengine-at_xdmac-fix-spurious-flag-status-for-mem2mem-transfers.patch