drm/i915: introduce platform enum

PATCH Superseded Jani Nikula 3 participants 21 messages Nov 30, 2016 – Dec 7, 2016

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DRM drivers Intel i915

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Jani Nikula

author

2016-11-30 15:43 UTC #0 lore raw

cover drm/i915: introduce platform enum

The platform enum patch + some sugar coating on top.

BR,
Jani.

Jani Nikula (6):
drm/i915: replace platform flags with a platform enum drm/i915: keep intel device info structs in gen based order drm/i915: rename BROADWATER and CRESTLINE to I965G and I965GM,
respectively
drm/i915: add some more "i" in platform names for consistency drm/i915: give G45 and GM45 their own platform enums drm/i915: use platform enum instead of duplicating PCI ID if possible

 drivers/gpu/drm/i915/i915_debugfs.c      |  5 +-
 drivers/gpu/drm/i915/i915_drv.c          |  2 +-
 drivers/gpu/drm/i915/i915_drv.h          | 92 +++++++++++++++++++-------------
 drivers/gpu/drm/i915/i915_gem.c          |  2 +-
 drivers/gpu/drm/i915/i915_gem_internal.c |  2 +-
 drivers/gpu/drm/i915/i915_gem_stolen.c   |  2 +-
 drivers/gpu/drm/i915/i915_gpu_error.c    |  1 +
 drivers/gpu/drm/i915/i915_pci.c          | 85 ++++++++++++++++-------------
 drivers/gpu/drm/i915/intel_device_info.c | 41 +++++++++++++-
 drivers/gpu/drm/i915/intel_display.c     | 22 ++++----
 drivers/gpu/drm/i915/intel_i2c.c         |  2 +-
 drivers/gpu/drm/i915/intel_overlay.c     |  4 +-
 drivers/gpu/drm/i915/intel_pm.c          |  6 +--
 drivers/gpu/drm/i915/intel_ringbuffer.c  |  4 +-
 14 files changed, 170 insertions(+), 100 deletions(-)

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Jani Nikula

author

2016-11-30 15:43 UTC #1 lore raw

PATCH 1/6 drm/i915: replace platform flags with a platform enum

The platform flags in device info are (mostly) mutually exclusive. Replace the flags with an enum. Add the platform enum also for platforms that previously didn't have a flag, and give them codename logging in dmesg.

Pineview remains an exception, the platform being G33 for that.

v2: Sort enum by gen and date

Signed-off-by Jani Nikula <[email protected]>

---
 drivers/gpu/drm/i915/i915_debugfs.c      |  1 +
 drivers/gpu/drm/i915/i915_drv.h          | 76 +++++++++++++++++++-------------
 drivers/gpu/drm/i915/i915_gpu_error.c    |  1 +
 drivers/gpu/drm/i915/i915_pci.c          | 53 +++++++++++++---------
 drivers/gpu/drm/i915/intel_device_info.c | 40 ++++++++++++++++-
 5 files changed, 117 insertions(+), 54 deletions(-)

drivers/gpu/drm/i915/i915_debugfs.c +1 -0

index 2434130087be..15fb97dd9ed3 100644
@@ -77,6 +77,7 @@ static int i915_capabilities(struct seq_file *m, void *data)
 	const struct intel_device_info *info = INTEL_INFO(dev_priv);
 
 	seq_printf(m, "gen: %d\n", INTEL_GEN(dev_priv));
+	seq_printf(m, "platform: %s\n", intel_platform_name(info->platform));
 	seq_printf(m, "pch: %d\n", INTEL_PCH_TYPE(dev_priv));
 #define PRINT_FLAG(x)  seq_printf(m, #x ": %s\n", yesno(info->x))
 	DEV_INFO_FOR_EACH_FLAG(PRINT_FLAG);

drivers/gpu/drm/i915/i915_drv.h +45 ~~-31~~

119 lines not on this page · raw message

drivers/gpu/drm/i915/i915_gpu_error.c +1 -0

index 82458ea60150..ee70cba7cf7b 100644
@@ -547,6 +547,7 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
 	}
 	err_printf(m, "Reset count: %u\n", error->reset_count);
 	err_printf(m, "Suspend count: %u\n", error->suspend_count);
+	err_printf(m, "Platform: %s\n", intel_platform_name(error->device_info.platform));
 	err_printf(m, "PCI ID: 0x%04x\n", pdev->device);
 	err_printf(m, "PCI Revision: 0x%02x\n", pdev->revision);
 	err_printf(m, "PCI Subsystem: %04x:%04x\n",

drivers/gpu/drm/i915/i915_pci.c +31 ~~-22~~

230 lines not on this page · raw message

drivers/gpu/drm/i915/intel_device_info.c +39 -1

index 185e3bbc9ec9..2314c9ef89d8 100644
@@ -24,11 +24,49 @@
 
 #include "i915_drv.h"
 
+#define PLATFORM_NAME(x) [INTEL_##x] = #x
+static const char * const platform_names[] = {
+	PLATFORM_NAME(I830),
+	PLATFORM_NAME(I845G),
+	PLATFORM_NAME(I85X),
+	PLATFORM_NAME(I865G),
+	PLATFORM_NAME(I915G),
+	PLATFORM_NAME(I915GM),
+	PLATFORM_NAME(I945G),
+	PLATFORM_NAME(I945GM),
+	PLATFORM_NAME(G33),
+	PLATFORM_NAME(PINEVIEW),
+	PLATFORM_NAME(BROADWATER),
+	PLATFORM_NAME(CRESTLINE),
+	PLATFORM_NAME(G4X),
+	PLATFORM_NAME(IRONLAKE),
+	PLATFORM_NAME(SANDYBRIDGE),
+	PLATFORM_NAME(IVYBRIDGE),
+	PLATFORM_NAME(VALLEYVIEW),
+	PLATFORM_NAME(HASWELL),
+	PLATFORM_NAME(BROADWELL),
+	PLATFORM_NAME(CHERRYVIEW),
+	PLATFORM_NAME(SKYLAKE),
+	PLATFORM_NAME(BROXTON),
+	PLATFORM_NAME(KABYLAKE),
+};
+#undef PLATFORM_NAME
+
+const char *intel_platform_name(enum intel_platform platform)
+{
+	if (WARN_ON_ONCE(platform >= ARRAY_SIZE(platform_names) ||
+			 platform_names[platform] == NULL))
+		return "<unknown>";
+
+	return platform_names[platform];
+}
+
 void intel_device_info_dump(struct drm_i915_private *dev_priv)
 {
 	const struct intel_device_info *info = &dev_priv->info;
 
-	DRM_DEBUG_DRIVER("i915 device info: gen=%i, pciid=0x%04x rev=0x%02x",
+	DRM_DEBUG_DRIVER("i915 device info: platform=%s gen=%i pciid=0x%04x rev=0x%02x",
+			 intel_platform_name(info->platform),
 			 info->gen,
 			 dev_priv->drm.pdev->device,
 			 dev_priv->drm.pdev->revision);

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Joonas Lahtinen

maintainer Reviewed-by on v1 1/6

2016-12-01 07:54 UTC #2 lore raw

Re: [PATCH 1/6] drm/i915: replace platform flags with a platform enum

Quoted 10 lines · Jani Nikula

The platform flags in device info are (mostly) mutually exclusive. Replace the flags with an enum. Add the platform enum also for platforms that previously didn't have a flag, and give them codename logging in dmesg.
Pineview remains an exception, the platform being G33 for that.
v2: Sort enum by gen and date
Signed-off-by Jani Nikula <[email protected]>

The enum can be made into BIT() and the table can still be made with some __builtin_ffs if that was found desireable.

With or without that;

Reviewed-by Joonas Lahtinen <[email protected]>

Regards, Joonas

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Joonas Lahtinen
Open Source Technology Center
Intel Corporation
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Jani Nikula

author

2016-12-01 12:50 UTC #3 lore raw

PATCH v3 1/1 drm/i915: replace platform flags with a platform enum

In reply to Jani Nikula

Pineview remains an exception, the platform being G33 for that.

v2: Sort enum by gen and date

v3: rebase on geminilake enabling

Signed-off-by Jani Nikula <[email protected]>

---
 drivers/gpu/drm/i915/i915_debugfs.c      |  1 +
 drivers/gpu/drm/i915/i915_drv.h          | 80 +++++++++++++++++++-------------
 drivers/gpu/drm/i915/i915_gpu_error.c    |  1 +
 drivers/gpu/drm/i915/i915_pci.c          | 57 +++++++++++++----------
 drivers/gpu/drm/i915/intel_device_info.c | 41 +++++++++++++++-
 5 files changed, 122 insertions(+), 58 deletions(-)

drivers/gpu/drm/i915/i915_debugfs.c +1 -0

index 2434130087be..15fb97dd9ed3 100644
@@ -77,6 +77,7 @@ static int i915_capabilities(struct seq_file *m, void *data)
 	const struct intel_device_info *info = INTEL_INFO(dev_priv);
 
 	seq_printf(m, "gen: %d\n", INTEL_GEN(dev_priv));
+	seq_printf(m, "platform: %s\n", intel_platform_name(info->platform));
 	seq_printf(m, "pch: %d\n", INTEL_PCH_TYPE(dev_priv));
 #define PRINT_FLAG(x)  seq_printf(m, #x ": %s\n", yesno(info->x))
 	DEV_INFO_FOR_EACH_FLAG(PRINT_FLAG);

drivers/gpu/drm/i915/i915_drv.h +47 ~~-33~~

123 lines not on this page · raw message

drivers/gpu/drm/i915/i915_gpu_error.c +1 -0

index 82458ea60150..ee70cba7cf7b 100644
@@ -547,6 +547,7 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
 	}
 	err_printf(m, "Reset count: %u\n", error->reset_count);
 	err_printf(m, "Suspend count: %u\n", error->suspend_count);
+	err_printf(m, "Platform: %s\n", intel_platform_name(error->device_info.platform));
 	err_printf(m, "PCI ID: 0x%04x\n", pdev->device);
 	err_printf(m, "PCI Revision: 0x%02x\n", pdev->revision);
 	err_printf(m, "PCI Subsystem: %04x:%04x\n",

drivers/gpu/drm/i915/i915_pci.c +33 ~~-24~~

239 lines not on this page · raw message

drivers/gpu/drm/i915/intel_device_info.c +40 -1

51 lines not on this page · raw message

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Joonas Lahtinen

maintainer Reviewed-by on v3 1/1

2016-12-07 09:51 UTC #4 lore raw

Re: [PATCH v3] drm/i915: replace platform flags with a platform enum

Quoted 5 lines · Jani Nikula

The platform flags in device info are (mostly) mutually exclusive. Replace the flags with an enum. Add the platform enum also for platforms that previously didn't have a flag, and give them codename logging in dmesg.

Quoted 7 lines

Pineview remains an exception, the platform being G33 for that.
v2: Sort enum by gen and date
v3: rebase on geminilake enabling
Signed-off-by Jani Nikula <[email protected]>

Still looking good;

Reviewed-by Joonas Lahtinen <[email protected]>

Regards, Joonas

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Joonas Lahtinen
Open Source Technology Center
Intel Corporation
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Jani Nikula

author

2016-12-07 10:09 UTC #5 lore raw

Re: [PATCH v3] drm/i915: replace platform flags with a platform enum

Quoted 10 lines · Joonas Lahtinen

Quoted 9 lines · Jani Nikula
The platform flags in device info are (mostly) mutually exclusive. Replace the flags with an enum. Add the platform enum also for platforms that previously didn't have a flag, and give them codename logging in dmesg.
Pineview remains an exception, the platform being G33 for that.
v2: Sort enum by gen and date

Quoted 7 lines

Quoted 3 lines
v3: rebase on geminilake enabling
Signed-off-by Jani Nikula <[email protected]>
Still looking good;
Reviewed-by Joonas Lahtinen <[email protected]>

Pushed this one, thanks for the review - which I failed to add to the commit itself. /o\ Apologies!

Dare I still ask for review on patch 2/6...?

BR,
Jani.

Quoted 2 lines

Regards, Joonas

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Jani Nikula, Intel Open Source Technology Center
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Jani Nikula

author

2016-12-07 13:23 UTC #6 lore raw

Re: [PATCH v3] drm/i915: replace platform flags with a platform enum

Quoted 15 lines · Jani Nikula

Quoted 14 lines · Joonas Lahtinen
Quoted 12 lines · Jani Nikula
The platform flags in device info are (mostly) mutually exclusive. Replace the flags with an enum. Add the platform enum also for platforms that previously didn't have a flag, and give them codename logging in dmesg.
Pineview remains an exception, the platform being G33 for that.
v2: Sort enum by gen and date
v3: rebase on geminilake enabling
Signed-off-by Jani Nikula <[email protected]>

Quoted 8 lines

Quoted 3 lines
Still looking good;
Reviewed-by Joonas Lahtinen <[email protected]>
Pushed this one, thanks for the review - which I failed to add to the commit itself. /o\ Apologies!
Dare I still ask for review on patch 2/6...?

And pushed the rest, thanks for the review.

BR,
Jani.

Quoted 7 lines

BR,
Jani.
Quoted 2 lines
Regards, Joonas

Signature · 5 lines

Jani Nikula, Intel Open Source Technology Center
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Jani Nikula

author

2016-11-30 15:43 UTC #7 lore raw

PATCH 2/6 drm/i915: keep intel device info structs in gen based order

In reply to Jani Nikula

Move G33 and Pineview higher up in the list. Add a couple of blank lines for OCD while at it.

Signed-off-by Jani Nikula <[email protected]>

---
 drivers/gpu/drm/i915/i915_pci.c | 32 ++++++++++++++++++--------------
 1 file changed, 18 insertions(+), 14 deletions(-)

drivers/gpu/drm/i915/i915_pci.c +18 ~~-14~~

index 804038f4f162..81eb530c2c3d 100644
@@ -54,6 +54,7 @@
 #define CHV_COLORS \
 	.color = { .degamma_lut_size = 65, .gamma_lut_size = 257 }
 
+/* Keep in gen based order, and chronological order within a gen */
 #define GEN2_FEATURES \
 	.gen = 2, .num_pipes = 1, \
 	.has_overlay = 1, .overlay_needs_physical = 1, \

@@ -101,6 +102,7 @@ static const struct intel_device_info intel_i915g_info = {
 	.has_overlay = 1, .overlay_needs_physical = 1,
 	.hws_needs_physical = 1,
 };
+
 static const struct intel_device_info intel_i915gm_info = {
 	GEN3_FEATURES,
 	.platform = INTEL_I915GM,

@@ -111,6 +113,7 @@ static const struct intel_device_info intel_i915gm_info = {
 	.has_fbc = 1,
 	.hws_needs_physical = 1,
 };
+
 static const struct intel_device_info intel_i945g_info = {
 	GEN3_FEATURES,
 	.platform = INTEL_I945G,

@@ -118,6 +121,7 @@ static const struct intel_device_info intel_i945g_info = {
 	.has_overlay = 1, .overlay_needs_physical = 1,
 	.hws_needs_physical = 1,
 };
+
 static const struct intel_device_info intel_i945gm_info = {
 	GEN3_FEATURES,
 	.platform = INTEL_I945GM, .is_mobile = 1,

@@ -128,6 +132,20 @@ static const struct intel_device_info intel_i945gm_info = {
 	.hws_needs_physical = 1,
 };
 
+static const struct intel_device_info intel_g33_info = {
+	GEN3_FEATURES,
+	.platform = INTEL_G33,
+	.has_hotplug = 1,
+	.has_overlay = 1,
+};
+
+static const struct intel_device_info intel_pineview_info = {
+	GEN3_FEATURES,
+	.platform = INTEL_G33, .is_pineview = 1, .is_mobile = 1,
+	.has_hotplug = 1,
+	.has_overlay = 1,
+};
+
 #define GEN4_FEATURES \
 	.gen = 4, .num_pipes = 2, \
 	.has_hotplug = 1, \

@@ -152,13 +170,6 @@ static const struct intel_device_info intel_i965gm_info = {
 	.hws_needs_physical = 1,
 };
 
-static const struct intel_device_info intel_g33_info = {
-	GEN3_FEATURES,
-	.platform = INTEL_G33,
-	.has_hotplug = 1,
-	.has_overlay = 1,
-};
-
 static const struct intel_device_info intel_g45_info = {
 	GEN4_FEATURES,
 	.platform = INTEL_G4X,

@@ -175,13 +186,6 @@ static const struct intel_device_info intel_gm45_info = {
 	.ring_mask = RENDER_RING | BSD_RING,
 };
 
-static const struct intel_device_info intel_pineview_info = {
-	GEN3_FEATURES,
-	.platform = INTEL_G33, .is_pineview = 1, .is_mobile = 1,
-	.has_hotplug = 1,
-	.has_overlay = 1,
-};
-
 #define GEN5_FEATURES \
 	.gen = 5, .num_pipes = 2, \
 	.has_hotplug = 1, \

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Joonas Lahtinen

maintainer Reviewed-by on v1 2/6

2016-12-07 10:37 UTC #8 lore raw

Re: [PATCH 2/6] drm/i915: keep intel device info structs in gen based order

Quoted 4 lines · Jani Nikula

Move G33 and Pineview higher up in the list. Add a couple of blank lines for OCD while at it.
Signed-off-by Jani Nikula <[email protected]>

Reviewed-by Joonas Lahtinen <[email protected]>

Regards, Joonas

Signature · 7 lines

Joonas Lahtinen
Open Source Technology Center
Intel Corporation
_______________________________________________
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Jani Nikula

author

2016-11-30 15:43 UTC #9 lore raw

PATCH 3/6 drm/i915: rename BROADWATER and CRESTLINE to I965G and I965GM, respectively

In reply to Jani Nikula

Add more consistency to our naming. Pineview remains the outlier. Keep using code names for gen5+.

Signed-off-by Jani Nikula <[email protected]>

---
 drivers/gpu/drm/i915/i915_debugfs.c      | 2 +-
 drivers/gpu/drm/i915/i915_drv.c          | 2 +-
 drivers/gpu/drm/i915/i915_drv.h          | 8 ++++----
 drivers/gpu/drm/i915/i915_gem.c          | 2 +-
 drivers/gpu/drm/i915/i915_gem_internal.c | 2 +-
 drivers/gpu/drm/i915/i915_pci.c          | 4 ++--
 drivers/gpu/drm/i915/intel_device_info.c | 4 ++--
 drivers/gpu/drm/i915/intel_display.c     | 8 ++++----
 drivers/gpu/drm/i915/intel_pm.c          | 6 +++---
 9 files changed, 19 insertions(+), 19 deletions(-)

drivers/gpu/drm/i915/i915_debugfs.c +1 -1

index 15fb97dd9ed3..91abacbe3570 100644
@@ -1734,7 +1734,7 @@ static int i915_sr_status(struct seq_file *m, void *unused)
 
 	if (HAS_PCH_SPLIT(dev_priv))
 		sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
-	else if (IS_CRESTLINE(dev_priv) || IS_G4X(dev_priv) ||
+	else if (IS_I965GM(dev_priv) || IS_G4X(dev_priv) ||
 		 IS_I945G(dev_priv) || IS_I945GM(dev_priv))
 		sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
 	else if (IS_I915GM(dev_priv))

drivers/gpu/drm/i915/i915_drv.c +1 -1

index 8dac298461c0..616d424177d3 100644
@@ -1048,7 +1048,7 @@ static int i915_driver_init_hw(struct drm_i915_private *dev_priv)
 	 * behaviour if any general state is accessed within a page above 4GB,
 	 * which also needs to be handled carefully.
 	 */
-	if (IS_BROADWATER(dev_priv) || IS_CRESTLINE(dev_priv)) {
+	if (IS_I965G(dev_priv) || IS_I965GM(dev_priv)) {
 		ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
 
 		if (ret) {

drivers/gpu/drm/i915/i915_drv.h +4 -4

index 494237ed084d..66384c407dbd 100644
@@ -750,8 +750,8 @@ enum intel_platform {
 	INTEL_I945GM,
 	INTEL_G33,
 	INTEL_PINEVIEW,
-	INTEL_BROADWATER,
-	INTEL_CRESTLINE,
+	INTEL_I965G,
+	INTEL_I965GM,
 	INTEL_G4X,
 	INTEL_IRONLAKE,
 	INTEL_SANDYBRIDGE,

@@ -2516,8 +2516,8 @@ intel_info(const struct drm_i915_private *dev_priv)
 #define IS_I915GM(dev_priv)	(INTEL_DEVID(dev_priv) == 0x2592)
 #define IS_I945G(dev_priv)	(INTEL_DEVID(dev_priv) == 0x2772)
 #define IS_I945GM(dev_priv)	((dev_priv)->info.platform == INTEL_I945GM)
-#define IS_BROADWATER(dev_priv)	((dev_priv)->info.platform == INTEL_BROADWATER)
-#define IS_CRESTLINE(dev_priv)	((dev_priv)->info.platform == INTEL_CRESTLINE)
+#define IS_I965G(dev_priv)	((dev_priv)->info.platform == INTEL_I965G)
+#define IS_I965GM(dev_priv)	((dev_priv)->info.platform == INTEL_I965GM)
 #define IS_GM45(dev_priv)	(INTEL_DEVID(dev_priv) == 0x2A42)
 #define IS_G4X(dev_priv)	((dev_priv)->info.platform == INTEL_G4X)
 #define IS_PINEVIEW_G(dev_priv)	(INTEL_DEVID(dev_priv) == 0xa001)

drivers/gpu/drm/i915/i915_gem.c +1 -1

index 8ebefb6f6cf2..41ab5d93e419 100644
@@ -3999,7 +3999,7 @@ i915_gem_object_create(struct drm_device *dev, u64 size)
 		goto fail;
 
 	mask = GFP_HIGHUSER | __GFP_RECLAIMABLE;
-	if (IS_CRESTLINE(dev_priv) || IS_BROADWATER(dev_priv)) {
+	if (IS_I965GM(dev_priv) || IS_I965G(dev_priv)) {
 		/* 965gm cannot relocate objects above 4GiB. */
 		mask &= ~__GFP_HIGHMEM;
 		mask |= __GFP_DMA32;

drivers/gpu/drm/i915/i915_gem_internal.c +1 -1

index 4b3ff3e5b911..7e7afb5ba3a2 100644
@@ -71,7 +71,7 @@ i915_gem_object_get_pages_internal(struct drm_i915_gem_object *obj)
 #endif
 
 	gfp = GFP_KERNEL | __GFP_HIGHMEM | __GFP_RECLAIMABLE;
-	if (IS_CRESTLINE(i915) || IS_BROADWATER(i915)) {
+	if (IS_I965GM(i915) || IS_I965G(i915)) {
 		/* 965gm cannot relocate objects above 4GiB. */
 		gfp &= ~__GFP_HIGHMEM;
 		gfp |= __GFP_DMA32;

drivers/gpu/drm/i915/i915_pci.c +2 -2

index 81eb530c2c3d..5ce4c64cbd49 100644
@@ -156,14 +156,14 @@ static const struct intel_device_info intel_pineview_info = {
 
 static const struct intel_device_info intel_i965g_info = {
 	GEN4_FEATURES,
-	.platform = INTEL_BROADWATER,
+	.platform = INTEL_I965G,
 	.has_overlay = 1,
 	.hws_needs_physical = 1,
 };
 
 static const struct intel_device_info intel_i965gm_info = {
 	GEN4_FEATURES,
-	.platform = INTEL_CRESTLINE,
+	.platform = INTEL_I965GM,
 	.is_mobile = 1, .has_fbc = 1,
 	.has_overlay = 1,
 	.supports_tv = 1,

drivers/gpu/drm/i915/intel_device_info.c +2 -2

index 2314c9ef89d8..d6ec15a27e17 100644
@@ -36,8 +36,8 @@ static const char * const platform_names[] = {
 	PLATFORM_NAME(I945GM),
 	PLATFORM_NAME(G33),
 	PLATFORM_NAME(PINEVIEW),
-	PLATFORM_NAME(BROADWATER),
-	PLATFORM_NAME(CRESTLINE),
+	PLATFORM_NAME(I965G),
+	PLATFORM_NAME(I965GM),
 	PLATFORM_NAME(G4X),
 	PLATFORM_NAME(IRONLAKE),
 	PLATFORM_NAME(SANDYBRIDGE),

drivers/gpu/drm/i915/intel_display.c +4 -4

index 8ce536a767ad..fe843ecf3296 100644
@@ -2149,7 +2149,7 @@ static unsigned int intel_linear_alignment(const struct drm_i915_private *dev_pr
 {
 	if (INTEL_INFO(dev_priv)->gen >= 9)
 		return 256 * 1024;
-	else if (IS_BROADWATER(dev_priv) || IS_CRESTLINE(dev_priv) ||
+	else if (IS_I965G(dev_priv) || IS_I965GM(dev_priv) ||
 		 IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
 		return 128 * 1024;
 	else if (INTEL_INFO(dev_priv)->gen >= 4)

@@ -7518,7 +7518,7 @@ static unsigned int intel_hpll_vco(struct drm_i915_private *dev_priv)
 		vco_table = ctg_vco;
 	else if (IS_G4X(dev_priv))
 		vco_table = elk_vco;
-	else if (IS_CRESTLINE(dev_priv))
+	else if (IS_I965GM(dev_priv))
 		vco_table = cl_vco;
 	else if (IS_PINEVIEW(dev_priv))
 		vco_table = pnv_vco;

@@ -16046,14 +16046,14 @@ void intel_init_display_hooks(struct drm_i915_private *dev_priv)
 	else if (IS_GEN5(dev_priv))
 		dev_priv->display.get_display_clock_speed =
 			ilk_get_display_clock_speed;
-	else if (IS_I945G(dev_priv) || IS_BROADWATER(dev_priv) ||
+	else if (IS_I945G(dev_priv) || IS_I965G(dev_priv) ||
 		 IS_GEN6(dev_priv) || IS_IVYBRIDGE(dev_priv))
 		dev_priv->display.get_display_clock_speed =
 			i945_get_display_clock_speed;
 	else if (IS_GM45(dev_priv))
 		dev_priv->display.get_display_clock_speed =
 			gm45_get_display_clock_speed;
-	else if (IS_CRESTLINE(dev_priv))
+	else if (IS_I965GM(dev_priv))
 		dev_priv->display.get_display_clock_speed =
 			i965gm_get_display_clock_speed;
 	else if (IS_PINEVIEW(dev_priv))

drivers/gpu/drm/i915/intel_pm.c +3 -3

index 29b6653661cd..c4bd1ed9419b 100644
@@ -320,7 +320,7 @@ void intel_set_memory_cxsr(struct drm_i915_private *dev_priv, bool enable)
 		I915_WRITE(FW_BLC_SELF_VLV, enable ? FW_CSPWRDWNEN : 0);
 		POSTING_READ(FW_BLC_SELF_VLV);
 		dev_priv->wm.vlv.cxsr = enable;
-	} else if (IS_G4X(dev_priv) || IS_CRESTLINE(dev_priv)) {
+	} else if (IS_G4X(dev_priv) || IS_I965GM(dev_priv)) {
 		I915_WRITE(FW_BLC_SELF, enable ? FW_BLC_SELF_EN : 0);
 		POSTING_READ(FW_BLC_SELF);
 	} else if (IS_PINEVIEW(dev_priv)) {

@@ -7640,9 +7640,9 @@ void intel_init_clock_gating_hooks(struct drm_i915_private *dev_priv)
 		dev_priv->display.init_clock_gating = ironlake_init_clock_gating;
 	else if (IS_G4X(dev_priv))
 		dev_priv->display.init_clock_gating = g4x_init_clock_gating;
-	else if (IS_CRESTLINE(dev_priv))
+	else if (IS_I965GM(dev_priv))
 		dev_priv->display.init_clock_gating = crestline_init_clock_gating;
-	else if (IS_BROADWATER(dev_priv))
+	else if (IS_I965G(dev_priv))
 		dev_priv->display.init_clock_gating = broadwater_init_clock_gating;
 	else if (IS_GEN3(dev_priv))
 		dev_priv->display.init_clock_gating = gen3_init_clock_gating;

Signature · 6 lines

2.1.4

_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Joonas Lahtinen

maintainer Reviewed-by on v1 3/6

2016-12-01 08:07 UTC #10 lore raw

Re: [PATCH 3/6] drm/i915: rename BROADWATER and CRESTLINE to I965G and I965GM, respectively

Quoted 4 lines · Jani Nikula

Add more consistency to our naming. Pineview remains the outlier. Keep using code names for gen5+.
Signed-off-by Jani Nikula <[email protected]>

Reviewed-by Joonas Lahtinen <[email protected]>

Regards, Joonas

Signature · 7 lines

Joonas Lahtinen
Open Source Technology Center
Intel Corporation
_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Jani Nikula

author

2016-12-07 10:13 UTC #11 lore raw

PATCH v2 1/1 drm/i915: rename BROADWATER and CRESTLINE to I965G and I965GM, respectively

In reply to Jani Nikula

Add more consistency to our naming. Pineview remains the outlier. Keep using code names for gen5+.

v2: rebased

Reviewed-by Joonas Lahtinen <[email protected]>

Signed-off-by Jani Nikula <[email protected]>

---
 drivers/gpu/drm/i915/i915_debugfs.c      | 2 +-
 drivers/gpu/drm/i915/i915_drv.c          | 2 +-
 drivers/gpu/drm/i915/i915_drv.h          | 8 ++++----
 drivers/gpu/drm/i915/i915_gem.c          | 2 +-
 drivers/gpu/drm/i915/i915_gem_internal.c | 2 +-
 drivers/gpu/drm/i915/i915_pci.c          | 4 ++--
 drivers/gpu/drm/i915/intel_device_info.c | 4 ++--
 drivers/gpu/drm/i915/intel_display.c     | 8 ++++----
 drivers/gpu/drm/i915/intel_pm.c          | 6 +++---
 9 files changed, 19 insertions(+), 19 deletions(-)

drivers/gpu/drm/i915/i915_debugfs.c +1 -1

index 95f7a5ef0e36..00a36bf87993 100644
@@ -1734,7 +1734,7 @@ static int i915_sr_status(struct seq_file *m, void *unused)
 
 	if (HAS_PCH_SPLIT(dev_priv))
 		sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
-	else if (IS_CRESTLINE(dev_priv) || IS_G4X(dev_priv) ||
+	else if (IS_I965GM(dev_priv) || IS_G4X(dev_priv) ||
 		 IS_I945G(dev_priv) || IS_I945GM(dev_priv))
 		sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
 	else if (IS_I915GM(dev_priv))

drivers/gpu/drm/i915/i915_drv.c +1 -1

index ae583c79c19f..1a7ac2eefe97 100644
@@ -1033,7 +1033,7 @@ static int i915_driver_init_hw(struct drm_i915_private *dev_priv)
 	 * behaviour if any general state is accessed within a page above 4GB,
 	 * which also needs to be handled carefully.
 	 */
-	if (IS_BROADWATER(dev_priv) || IS_CRESTLINE(dev_priv)) {
+	if (IS_I965G(dev_priv) || IS_I965GM(dev_priv)) {
 		ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
 
 		if (ret) {

drivers/gpu/drm/i915/i915_drv.h +4 -4

index dc59670160e1..e5465b330886 100644
@@ -755,8 +755,8 @@ enum intel_platform {
 	INTEL_I945GM,
 	INTEL_G33,
 	INTEL_PINEVIEW,
-	INTEL_BROADWATER,
-	INTEL_CRESTLINE,
+	INTEL_I965G,
+	INTEL_I965GM,
 	INTEL_G4X,
 	INTEL_IRONLAKE,
 	INTEL_SANDYBRIDGE,

@@ -2522,8 +2522,8 @@ intel_info(const struct drm_i915_private *dev_priv)
 #define IS_I915GM(dev_priv)	(INTEL_DEVID(dev_priv) == 0x2592)
 #define IS_I945G(dev_priv)	(INTEL_DEVID(dev_priv) == 0x2772)
 #define IS_I945GM(dev_priv)	((dev_priv)->info.platform == INTEL_I945GM)
-#define IS_BROADWATER(dev_priv)	((dev_priv)->info.platform == INTEL_BROADWATER)
-#define IS_CRESTLINE(dev_priv)	((dev_priv)->info.platform == INTEL_CRESTLINE)
+#define IS_I965G(dev_priv)	((dev_priv)->info.platform == INTEL_I965G)
+#define IS_I965GM(dev_priv)	((dev_priv)->info.platform == INTEL_I965GM)
 #define IS_GM45(dev_priv)	(INTEL_DEVID(dev_priv) == 0x2A42)
 #define IS_G4X(dev_priv)	((dev_priv)->info.platform == INTEL_G4X)
 #define IS_PINEVIEW_G(dev_priv)	(INTEL_DEVID(dev_priv) == 0xa001)

drivers/gpu/drm/i915/i915_gem.c +1 -1

index ca0bb837a57f..dd1a34ac830f 100644
@@ -3999,7 +3999,7 @@ i915_gem_object_create(struct drm_i915_private *dev_priv, u64 size)
 		goto fail;
 
 	mask = GFP_HIGHUSER | __GFP_RECLAIMABLE;
-	if (IS_CRESTLINE(dev_priv) || IS_BROADWATER(dev_priv)) {
+	if (IS_I965GM(dev_priv) || IS_I965G(dev_priv)) {
 		/* 965gm cannot relocate objects above 4GiB. */
 		mask &= ~__GFP_HIGHMEM;
 		mask |= __GFP_DMA32;

drivers/gpu/drm/i915/i915_gem_internal.c +1 -1

index 08d26306d40e..2222863e505f 100644
@@ -71,7 +71,7 @@ i915_gem_object_get_pages_internal(struct drm_i915_gem_object *obj)
 #endif
 
 	gfp = GFP_KERNEL | __GFP_HIGHMEM | __GFP_RECLAIMABLE;
-	if (IS_CRESTLINE(i915) || IS_BROADWATER(i915)) {
+	if (IS_I965GM(i915) || IS_I965G(i915)) {
 		/* 965gm cannot relocate objects above 4GiB. */
 		gfp &= ~__GFP_HIGHMEM;
 		gfp |= __GFP_DMA32;

drivers/gpu/drm/i915/i915_pci.c +2 -2

index c0bcf323dbf0..99e8eed0a1fc 100644
@@ -156,14 +156,14 @@ static const struct intel_device_info intel_pineview_info = {
 
 static const struct intel_device_info intel_i965g_info = {
 	GEN4_FEATURES,
-	.platform = INTEL_BROADWATER,
+	.platform = INTEL_I965G,
 	.has_overlay = 1,
 	.hws_needs_physical = 1,
 };
 
 static const struct intel_device_info intel_i965gm_info = {
 	GEN4_FEATURES,
-	.platform = INTEL_CRESTLINE,
+	.platform = INTEL_I965GM,
 	.is_mobile = 1, .has_fbc = 1,
 	.has_overlay = 1,
 	.supports_tv = 1,

drivers/gpu/drm/i915/intel_device_info.c +2 -2

index 23b040743a6c..6f4cd4fca957 100644
@@ -36,8 +36,8 @@ static const char * const platform_names[] = {
 	PLATFORM_NAME(I945GM),
 	PLATFORM_NAME(G33),
 	PLATFORM_NAME(PINEVIEW),
-	PLATFORM_NAME(BROADWATER),
-	PLATFORM_NAME(CRESTLINE),
+	PLATFORM_NAME(I965G),
+	PLATFORM_NAME(I965GM),
 	PLATFORM_NAME(G4X),
 	PLATFORM_NAME(IRONLAKE),
 	PLATFORM_NAME(SANDYBRIDGE),

drivers/gpu/drm/i915/intel_display.c +4 -4

index a88c810dbf6b..ab5ba7e08424 100644
@@ -2150,7 +2150,7 @@ static unsigned int intel_linear_alignment(const struct drm_i915_private *dev_pr
 {
 	if (INTEL_INFO(dev_priv)->gen >= 9)
 		return 256 * 1024;
-	else if (IS_BROADWATER(dev_priv) || IS_CRESTLINE(dev_priv) ||
+	else if (IS_I965G(dev_priv) || IS_I965GM(dev_priv) ||
 		 IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
 		return 128 * 1024;
 	else if (INTEL_INFO(dev_priv)->gen >= 4)

@@ -7568,7 +7568,7 @@ static unsigned int intel_hpll_vco(struct drm_i915_private *dev_priv)
 		vco_table = ctg_vco;
 	else if (IS_G4X(dev_priv))
 		vco_table = elk_vco;
-	else if (IS_CRESTLINE(dev_priv))
+	else if (IS_I965GM(dev_priv))
 		vco_table = cl_vco;
 	else if (IS_PINEVIEW(dev_priv))
 		vco_table = pnv_vco;

@@ -16108,14 +16108,14 @@ void intel_init_display_hooks(struct drm_i915_private *dev_priv)
 	else if (IS_GEN5(dev_priv))
 		dev_priv->display.get_display_clock_speed =
 			ilk_get_display_clock_speed;
-	else if (IS_I945G(dev_priv) || IS_BROADWATER(dev_priv) ||
+	else if (IS_I945G(dev_priv) || IS_I965G(dev_priv) ||
 		 IS_GEN6(dev_priv) || IS_IVYBRIDGE(dev_priv))
 		dev_priv->display.get_display_clock_speed =
 			i945_get_display_clock_speed;
 	else if (IS_GM45(dev_priv))
 		dev_priv->display.get_display_clock_speed =
 			gm45_get_display_clock_speed;
-	else if (IS_CRESTLINE(dev_priv))
+	else if (IS_I965GM(dev_priv))
 		dev_priv->display.get_display_clock_speed =
 			i965gm_get_display_clock_speed;
 	else if (IS_PINEVIEW(dev_priv))

drivers/gpu/drm/i915/intel_pm.c +3 -3

index d414c870ce6d..c6fe59944a0b 100644
@@ -321,7 +321,7 @@ static bool _intel_set_memory_cxsr(struct drm_i915_private *dev_priv, bool enabl
 		was_enabled = I915_READ(FW_BLC_SELF_VLV) & FW_CSPWRDWNEN;
 		I915_WRITE(FW_BLC_SELF_VLV, enable ? FW_CSPWRDWNEN : 0);
 		POSTING_READ(FW_BLC_SELF_VLV);
-	} else if (IS_G4X(dev_priv) || IS_CRESTLINE(dev_priv)) {
+	} else if (IS_G4X(dev_priv) || IS_I965GM(dev_priv)) {
 		was_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
 		I915_WRITE(FW_BLC_SELF, enable ? FW_BLC_SELF_EN : 0);
 		POSTING_READ(FW_BLC_SELF);

@@ -7643,9 +7643,9 @@ void intel_init_clock_gating_hooks(struct drm_i915_private *dev_priv)
 		dev_priv->display.init_clock_gating = ironlake_init_clock_gating;
 	else if (IS_G4X(dev_priv))
 		dev_priv->display.init_clock_gating = g4x_init_clock_gating;
-	else if (IS_CRESTLINE(dev_priv))
+	else if (IS_I965GM(dev_priv))
 		dev_priv->display.init_clock_gating = crestline_init_clock_gating;
-	else if (IS_BROADWATER(dev_priv))
+	else if (IS_I965G(dev_priv))
 		dev_priv->display.init_clock_gating = broadwater_init_clock_gating;
 	else if (IS_GEN3(dev_priv))
 		dev_priv->display.init_clock_gating = gen3_init_clock_gating;

Signature · 6 lines

2.1.4

_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Jani Nikula

author

2016-11-30 15:43 UTC #12 lore raw

PATCH 4/6 drm/i915: add some more "i" in platform names for consistency

In reply to Jani Nikula

Consistency FTW.

Signed-off-by Jani Nikula <[email protected]>

---
 drivers/gpu/drm/i915/i915_debugfs.c     |  2 +-
 drivers/gpu/drm/i915/i915_drv.h         |  4 ++--
 drivers/gpu/drm/i915/i915_gem_stolen.c  |  2 +-
 drivers/gpu/drm/i915/i915_pci.c         |  4 ++--
 drivers/gpu/drm/i915/intel_display.c    | 14 +++++++-------
 drivers/gpu/drm/i915/intel_i2c.c        |  2 +-
 drivers/gpu/drm/i915/intel_overlay.c    |  4 ++--
 drivers/gpu/drm/i915/intel_ringbuffer.c |  4 ++--
 8 files changed, 18 insertions(+), 18 deletions(-)

drivers/gpu/drm/i915/i915_debugfs.c +1 -1

index 91abacbe3570..6fe38f5bc6e0 100644
@@ -2955,7 +2955,7 @@ static bool cursor_active(struct drm_i915_private *dev_priv, int pipe)
 {
 	u32 state;
 
-	if (IS_845G(dev_priv) || IS_I865G(dev_priv))
+	if (IS_I845G(dev_priv) || IS_I865G(dev_priv))
 		state = I915_READ(CURCNTR(PIPE_A)) & CURSOR_ENABLE;
 	else
 		state = I915_READ(CURCNTR(pipe)) & CURSOR_MODE;

drivers/gpu/drm/i915/i915_drv.h +2 -2

index 66384c407dbd..ee5af9140e7c 100644
@@ -2509,7 +2509,7 @@ intel_info(const struct drm_i915_private *dev_priv)
 	(INTEL_REVID(p) >= (since) && INTEL_REVID(p) <= (until))
 
 #define IS_I830(dev_priv)	(INTEL_DEVID(dev_priv) == 0x3577)
-#define IS_845G(dev_priv)	(INTEL_DEVID(dev_priv) == 0x2562)
+#define IS_I845G(dev_priv)	(INTEL_DEVID(dev_priv) == 0x2562)
 #define IS_I85X(dev_priv)	((dev_priv)->info.platform == INTEL_I85X)
 #define IS_I865G(dev_priv)	(INTEL_DEVID(dev_priv) == 0x2572)
 #define IS_I915G(dev_priv)	((dev_priv)->info.platform == INTEL_I915G)

@@ -2658,7 +2658,7 @@ intel_info(const struct drm_i915_private *dev_priv)
 		((dev_priv)->info.overlay_needs_physical)
 
 /* Early gen2 have a totally busted CS tlb and require pinned batches. */
-#define HAS_BROKEN_CS_TLB(dev_priv)	(IS_I830(dev_priv) || IS_845G(dev_priv))
+#define HAS_BROKEN_CS_TLB(dev_priv)	(IS_I830(dev_priv) || IS_I845G(dev_priv))
 
 /* WaRsDisableCoarsePowerGating:skl,bxt */
 #define NEEDS_WaRsDisableCoarsePowerGating(dev_priv) \

drivers/gpu/drm/i915/i915_gem_stolen.c +1 -1

index ebaa941c83af..9e113228309b 100644
@@ -153,7 +153,7 @@ static unsigned long i915_stolen_to_physical(struct drm_i915_private *dev_priv)
 		tom = tmp * MB(32);
 
 		base = tom - tseg_size - ggtt->stolen_size;
-	} else if (IS_845G(dev_priv)) {
+	} else if (IS_I845G(dev_priv)) {
 		u32 tseg_size = 0;
 		u32 tom;
 		u8 tmp;

drivers/gpu/drm/i915/i915_pci.c +2 -2

index 5ce4c64cbd49..44f772b00c4d 100644
@@ -71,7 +71,7 @@ static const struct intel_device_info intel_i830_info = {
 	.num_pipes = 2, /* legal, last one wins */
 };
 
-static const struct intel_device_info intel_845g_info = {
+static const struct intel_device_info intel_i845g_info = {
 	GEN2_FEATURES,
 	.platform = INTEL_I845G,
 };

@@ -410,7 +410,7 @@ static const struct intel_device_info intel_kabylake_gt3_info = {
  */
 static const struct pci_device_id pciidlist[] = {
 	INTEL_I830_IDS(&intel_i830_info),
-	INTEL_I845G_IDS(&intel_845g_info),
+	INTEL_I845G_IDS(&intel_i845g_info),
 	INTEL_I85X_IDS(&intel_i85x_info),
 	INTEL_I865G_IDS(&intel_i865g_info),
 	INTEL_I915G_IDS(&intel_i915g_info),

drivers/gpu/drm/i915/intel_display.c +7 -7

index fe843ecf3296..b3f76d403560 100644
@@ -1232,7 +1232,7 @@ static void assert_cursor(struct drm_i915_private *dev_priv,
 {
 	bool cur_state;
 
-	if (IS_845G(dev_priv) || IS_I865G(dev_priv))
+	if (IS_I845G(dev_priv) || IS_I865G(dev_priv))
 		cur_state = I915_READ(CURCNTR(PIPE_A)) & CURSOR_ENABLE;
 	else
 		cur_state = I915_READ(CURCNTR(pipe)) & CURSOR_MODE;

@@ -10886,7 +10886,7 @@ static void intel_crtc_update_cursor(struct drm_crtc *crtc,
 
 	I915_WRITE(CURPOS(pipe), pos);
 
-	if (IS_845G(dev_priv) || IS_I865G(dev_priv))
+	if (IS_I845G(dev_priv) || IS_I865G(dev_priv))
 		i845_update_cursor(crtc, base, plane_state);
 	else
 		i9xx_update_cursor(crtc, base, plane_state);

@@ -10904,11 +10904,11 @@ static bool cursor_size_ok(struct drm_i915_private *dev_priv,
 	 * the precision of the register. Everything else requires
 	 * square cursors, limited to a few power-of-two sizes.
 	 */
-	if (IS_845G(dev_priv) || IS_I865G(dev_priv)) {
+	if (IS_I845G(dev_priv) || IS_I865G(dev_priv)) {
 		if ((width & 63) != 0)
 			return false;
 
-		if (width > (IS_845G(dev_priv) ? 64 : 512))
+		if (width > (IS_I845G(dev_priv) ? 64 : 512))
 			return false;
 
 		if (height > 1023)

@@ -16065,7 +16065,7 @@ void intel_init_display_hooks(struct drm_i915_private *dev_priv)
 	else if (IS_I915G(dev_priv))
 		dev_priv->display.get_display_clock_speed =
 			i915_get_display_clock_speed;
-	else if (IS_I945GM(dev_priv) || IS_845G(dev_priv))
+	else if (IS_I945GM(dev_priv) || IS_I845G(dev_priv))
 		dev_priv->display.get_display_clock_speed =
 			i9xx_misc_get_display_clock_speed;
 	else if (IS_I915GM(dev_priv))

@@ -16487,8 +16487,8 @@ int intel_modeset_init(struct drm_device *dev)
 		dev->mode_config.max_height = 8192;
 	}
 
-	if (IS_845G(dev_priv) || IS_I865G(dev_priv)) {
-		dev->mode_config.cursor_width = IS_845G(dev_priv) ? 64 : 512;
+	if (IS_I845G(dev_priv) || IS_I865G(dev_priv)) {
+		dev->mode_config.cursor_width = IS_I845G(dev_priv) ? 64 : 512;
 		dev->mode_config.cursor_height = 1023;
 	} else if (IS_GEN2(dev_priv)) {
 		dev->mode_config.cursor_width = GEN2_CURSOR_WIDTH;

drivers/gpu/drm/i915/intel_i2c.c +1 -1

index 83f260bb4eef..64bcad8fad69 100644
@@ -141,7 +141,7 @@ static u32 get_reserved(struct intel_gmbus *bus)
 	u32 reserved = 0;
 
 	/* On most chips, these bits must be preserved in software. */
-	if (!IS_I830(dev_priv) && !IS_845G(dev_priv))
+	if (!IS_I830(dev_priv) && !IS_I845G(dev_priv))
 		reserved = I915_READ_NOTRACE(bus->gpio_reg) &
 					     (GPIO_DATA_PULLUP_DISABLE |
 					      GPIO_CLOCK_PULLUP_DISABLE);

drivers/gpu/drm/i915/intel_overlay.c +2 -2

index fd0e4dac7cc1..e38cd6c330b7 100644
@@ -957,7 +957,7 @@ static int check_overlay_src(struct drm_i915_private *dev_priv,
 	u32 tmp;
 
 	/* check src dimensions */
-	if (IS_845G(dev_priv) || IS_I830(dev_priv)) {
+	if (IS_I845G(dev_priv) || IS_I830(dev_priv)) {
 		if (rec->src_height > IMAGE_MAX_HEIGHT_LEGACY ||
 		    rec->src_width  > IMAGE_MAX_WIDTH_LEGACY)
 			return -EINVAL;

@@ -1009,7 +1009,7 @@ static int check_overlay_src(struct drm_i915_private *dev_priv,
 		return -EINVAL;
 
 	/* stride checking */
-	if (IS_I830(dev_priv) || IS_845G(dev_priv))
+	if (IS_I830(dev_priv) || IS_I845G(dev_priv))
 		stride_mask = 255;
 	else
 		stride_mask = 63;

drivers/gpu/drm/i915/intel_ringbuffer.c +2 -2

index aeb637dc1fdf..3c8b98f33de2 100644
@@ -1912,7 +1912,7 @@ intel_engine_create_ring(struct intel_engine_cs *engine, int size)
 	 * of the buffer.
 	 */
 	ring->effective_size = size;
-	if (IS_I830(engine->i915) || IS_845G(engine->i915))
+	if (IS_I830(engine->i915) || IS_I845G(engine->i915))
 		ring->effective_size -= 2 * CACHELINE_BYTES;
 
 	ring->last_retired_head = -1;

@@ -2608,7 +2608,7 @@ static void intel_ring_default_vfuncs(struct drm_i915_private *dev_priv,
 		engine->emit_bb_start = gen6_emit_bb_start;
 	else if (INTEL_GEN(dev_priv) >= 4)
 		engine->emit_bb_start = i965_emit_bb_start;
-	else if (IS_I830(dev_priv) || IS_845G(dev_priv))
+	else if (IS_I830(dev_priv) || IS_I845G(dev_priv))
 		engine->emit_bb_start = i830_emit_bb_start;
 	else
 		engine->emit_bb_start = i915_emit_bb_start;

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2.1.4

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Joonas Lahtinen

maintainer Reviewed-by on v1 4/6

2016-12-01 08:03 UTC #13 lore raw

Re: [PATCH 4/6] drm/i915: add some more "i" in platform names for consistency

Quoted 3 lines · Jani Nikula

Consistency FTW.
Signed-off-by Jani Nikula <[email protected]>

Reviewed-by Joonas Lahtinen <[email protected]>

Regards, Joonas

Signature · 7 lines

Joonas Lahtinen
Open Source Technology Center
Intel Corporation
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Jani Nikula

author

2016-11-30 15:43 UTC #14 lore raw

PATCH 5/6 drm/i915: give G45 and GM45 their own platform enums

In reply to Jani Nikula

Distinguish them better.

Signed-off-by Jani Nikula <[email protected]>

---
 drivers/gpu/drm/i915/i915_drv.h          | 8 +++++---
 drivers/gpu/drm/i915/i915_pci.c          | 4 ++--
 drivers/gpu/drm/i915/intel_device_info.c | 3 ++-
 3 files changed, 9 insertions(+), 6 deletions(-)

drivers/gpu/drm/i915/i915_drv.h +5 -3

index ee5af9140e7c..373eeef4f67c 100644
@@ -752,7 +752,8 @@ enum intel_platform {
 	INTEL_PINEVIEW,
 	INTEL_I965G,
 	INTEL_I965GM,
-	INTEL_G4X,
+	INTEL_G45,
+	INTEL_GM45,
 	INTEL_IRONLAKE,
 	INTEL_SANDYBRIDGE,
 	INTEL_IVYBRIDGE,

@@ -2518,8 +2519,9 @@ intel_info(const struct drm_i915_private *dev_priv)
 #define IS_I945GM(dev_priv)	((dev_priv)->info.platform == INTEL_I945GM)
 #define IS_I965G(dev_priv)	((dev_priv)->info.platform == INTEL_I965G)
 #define IS_I965GM(dev_priv)	((dev_priv)->info.platform == INTEL_I965GM)
-#define IS_GM45(dev_priv)	(INTEL_DEVID(dev_priv) == 0x2A42)
-#define IS_G4X(dev_priv)	((dev_priv)->info.platform == INTEL_G4X)
+#define IS_G45(dev_priv)	((dev_priv)->info.platform == INTEL_G45)
+#define IS_GM45(dev_priv)	((dev_priv)->info.platform == INTEL_GM45)
+#define IS_G4X(dev_priv)	(IS_G45(dev_priv) || IS_GM45(dev_priv))
 #define IS_PINEVIEW_G(dev_priv)	(INTEL_DEVID(dev_priv) == 0xa001)
 #define IS_PINEVIEW_M(dev_priv)	(INTEL_DEVID(dev_priv) == 0xa011)
 #define IS_PINEVIEW(dev_priv)	((dev_priv)->info.is_pineview)

drivers/gpu/drm/i915/i915_pci.c +2 -2

index 44f772b00c4d..3ffdc9119fd4 100644
@@ -172,14 +172,14 @@ static const struct intel_device_info intel_i965gm_info = {
 
 static const struct intel_device_info intel_g45_info = {
 	GEN4_FEATURES,
-	.platform = INTEL_G4X,
+	.platform = INTEL_G45,
 	.has_pipe_cxsr = 1,
 	.ring_mask = RENDER_RING | BSD_RING,
 };
 
 static const struct intel_device_info intel_gm45_info = {
 	GEN4_FEATURES,
-	.platform = INTEL_G4X,
+	.platform = INTEL_GM45,
 	.is_mobile = 1, .has_fbc = 1,
 	.has_pipe_cxsr = 1,
 	.supports_tv = 1,

drivers/gpu/drm/i915/intel_device_info.c +2 -1

index d6ec15a27e17..bdae2e48bbc6 100644
@@ -38,7 +38,8 @@ static const char * const platform_names[] = {
 	PLATFORM_NAME(PINEVIEW),
 	PLATFORM_NAME(I965G),
 	PLATFORM_NAME(I965GM),
-	PLATFORM_NAME(G4X),
+	PLATFORM_NAME(G45),
+	PLATFORM_NAME(GM45),
 	PLATFORM_NAME(IRONLAKE),
 	PLATFORM_NAME(SANDYBRIDGE),
 	PLATFORM_NAME(IVYBRIDGE),

Signature · 6 lines

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Joonas Lahtinen

maintainer Reviewed-by on v1 5/6

2016-12-01 07:58 UTC #15 lore raw

Re: [PATCH 5/6] drm/i915: give G45 and GM45 their own platform enums

Quoted 3 lines · Jani Nikula

Distinguish them better.
Signed-off-by Jani Nikula <[email protected]>

Reviewed-by Joonas Lahtinen <[email protected]>

Regards, Joonas

Signature · 7 lines

Joonas Lahtinen
Open Source Technology Center
Intel Corporation
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Jani Nikula

author

2016-11-30 15:43 UTC #16 lore raw

PATCH 6/6 drm/i915: use platform enum instead of duplicating PCI ID if possible

In reply to Jani Nikula

Duplicating the PCI ID for IS_FOO checks is redundant for a bunch of platforms. Simplify.

Signed-off-by Jani Nikula <[email protected]>

---
 drivers/gpu/drm/i915/i915_drv.h | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

drivers/gpu/drm/i915/i915_drv.h +5 -5

index 373eeef4f67c..4d573705a836 100644
@@ -2509,13 +2509,13 @@ intel_info(const struct drm_i915_private *dev_priv)
 #define IS_REVID(p, since, until) \
 	(INTEL_REVID(p) >= (since) && INTEL_REVID(p) <= (until))
 
-#define IS_I830(dev_priv)	(INTEL_DEVID(dev_priv) == 0x3577)
-#define IS_I845G(dev_priv)	(INTEL_DEVID(dev_priv) == 0x2562)
+#define IS_I830(dev_priv)	((dev_priv)->info.platform == INTEL_I830)
+#define IS_I845G(dev_priv)	((dev_priv)->info.platform == INTEL_I845G)
 #define IS_I85X(dev_priv)	((dev_priv)->info.platform == INTEL_I85X)
-#define IS_I865G(dev_priv)	(INTEL_DEVID(dev_priv) == 0x2572)
+#define IS_I865G(dev_priv)	((dev_priv)->info.platform == INTEL_I865G)
 #define IS_I915G(dev_priv)	((dev_priv)->info.platform == INTEL_I915G)
-#define IS_I915GM(dev_priv)	(INTEL_DEVID(dev_priv) == 0x2592)
-#define IS_I945G(dev_priv)	(INTEL_DEVID(dev_priv) == 0x2772)
+#define IS_I915GM(dev_priv)	((dev_priv)->info.platform == INTEL_I915GM)
+#define IS_I945G(dev_priv)	((dev_priv)->info.platform == INTEL_I945G)
 #define IS_I945GM(dev_priv)	((dev_priv)->info.platform == INTEL_I945GM)
 #define IS_I965G(dev_priv)	((dev_priv)->info.platform == INTEL_I965G)
 #define IS_I965GM(dev_priv)	((dev_priv)->info.platform == INTEL_I965GM)

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Joonas Lahtinen

maintainer Reviewed-by on v1 6/6

2016-12-01 08:00 UTC #17 lore raw

Re: [PATCH 6/6] drm/i915: use platform enum instead of duplicating PCI ID if possible

Quoted 4 lines · Jani Nikula

Duplicating the PCI ID for IS_FOO checks is redundant for a bunch of platforms. Simplify.
Signed-off-by Jani Nikula <[email protected]>

This should do pure good when optimizing the checks.

Reviewed-by Joonas Lahtinen <[email protected]>

Regards, Joonas

Signature · 7 lines

Joonas Lahtinen
Open Source Technology Center
Intel Corporation
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Patchwork

2016-12-01 04:15 UTC #18 lore raw

✓ Fi.CI.BAT: success for drm/i915: introduce platform enum

In reply to Jani Nikula

== Series Details ==

Series: drm/i915: introduce platform enum
URL : https://patchwork.freedesktop.org/series/16170/
State : success

== Summary ==

Series 16170v1 drm/i915: introduce platform enum
https://patchwork.freedesktop.org/api/1.0/series/16170/revisions/1/mbox/

Test kms_busy:

        Subgroup basic-flip-default-a:
                skip       -> PASS       (fi-ivb-3770)
        Subgroup basic-flip-default-b:
                skip       -> PASS       (fi-ivb-3770)
        Subgroup basic-flip-default-c:
                skip       -> PASS       (fi-ivb-3770)
Test kms_cursor_legacy:
        Subgroup basic-busy-flip-before-cursor-legacy:
                skip       -> PASS       (fi-ivb-3770)
        Subgroup basic-busy-flip-before-cursor-varying-size:
                skip       -> PASS       (fi-ivb-3770)
        Subgroup basic-flip-after-cursor-legacy:
                skip       -> PASS       (fi-ivb-3770)
        Subgroup basic-flip-after-cursor-varying-size:
                skip       -> PASS       (fi-ivb-3770)
        Subgroup basic-flip-before-cursor-legacy:
                skip       -> PASS       (fi-ivb-3770)
        Subgroup basic-flip-before-cursor-varying-size:
                skip       -> PASS       (fi-ivb-3770)
Test kms_force_connector_basic:
        Subgroup force-connector-state:
                skip       -> PASS       (fi-ivb-3770)
        Subgroup force-edid:
                skip       -> PASS       (fi-ivb-3770)
        Subgroup force-load-detect:
                skip       -> PASS       (fi-ivb-3770)
        Subgroup prune-stale-modes:
                skip       -> PASS       (fi-ivb-3770)
Test kms_pipe_crc_basic:
        Subgroup hang-read-crc-pipe-a:
                skip       -> PASS       (fi-ivb-3770)
        Subgroup suspend-read-crc-pipe-a:
                skip       -> PASS       (fi-ivb-3770)
        Subgroup suspend-read-crc-pipe-b:
                skip       -> PASS       (fi-ivb-3770)
        Subgroup suspend-read-crc-pipe-c:
                skip       -> PASS       (fi-ivb-3770)
Test prime_vgem:
        Subgroup basic-fence-flip:
                skip       -> PASS       (fi-ivb-3770)

fi-bdw-5557u     total:245  pass:230  dwarn:0   dfail:0   fail:0   skip:15 
fi-bsw-n3050     total:245  pass:205  dwarn:0   dfail:0   fail:0   skip:40 
fi-bxt-t5700     total:245  pass:217  dwarn:0   dfail:0   fail:0   skip:28 
fi-byt-j1900     total:245  pass:217  dwarn:0   dfail:0   fail:0   skip:28 
fi-byt-n2820     total:245  pass:213  dwarn:0   dfail:0   fail:0   skip:32 
fi-hsw-4770      total:245  pass:225  dwarn:0   dfail:0   fail:0   skip:20 
fi-hsw-4770r     total:245  pass:225  dwarn:0   dfail:0   fail:0   skip:20 
fi-ilk-650       total:245  pass:192  dwarn:0   dfail:0   fail:0   skip:53 
fi-ivb-3520m     total:245  pass:223  dwarn:0   dfail:0   fail:0   skip:22 
fi-ivb-3770      total:245  pass:223  dwarn:0   dfail:0   fail:0   skip:22 
fi-kbl-7500u     total:245  pass:223  dwarn:0   dfail:0   fail:0   skip:22 
fi-skl-6260u     total:245  pass:231  dwarn:0   dfail:0   fail:0   skip:14 
fi-skl-6700hq    total:245  pass:224  dwarn:0   dfail:0   fail:0   skip:21 
fi-skl-6700k     total:245  pass:223  dwarn:1   dfail:0   fail:0   skip:21 
fi-skl-6770hq    total:245  pass:231  dwarn:0   dfail:0   fail:0   skip:14 
fi-snb-2520m     total:245  pass:213  dwarn:0   dfail:0   fail:0   skip:32 
fi-snb-2600      total:245  pass:212  dwarn:0   dfail:0   fail:0   skip:33

51c6c255aa05775bcfb3f5790a3b9249e5990f3e drm-tip: 2016y-11m-30d-16h-12m-19s UTC integration manifest d1c5027 drm/i915: use platform enum instead of duplicating PCI ID if possible 072a029 drm/i915: give G45 and GM45 their own platform enums
574aacf drm/i915: add some more "i" in platform names for consistency
639d7d4 drm/i915: rename BROADWATER and CRESTLINE to I965G and I965GM, respectively c257e06 drm/i915: keep intel device info structs in gen based order
0a5a287 drm/i915: replace platform flags with a platform enum

== Logs ==

For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3152/
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Patchwork

2016-12-01 13:15 UTC #19 lore raw

✓ Fi.CI.BAT: success for drm/i915: introduce platform enum (rev2)

In reply to Jani Nikula

== Series Details ==

Series: drm/i915: introduce platform enum (rev2)
URL : https://patchwork.freedesktop.org/series/16170/
State : success

== Summary ==

Series 16170v2 drm/i915: introduce platform enum
https://patchwork.freedesktop.org/api/1.0/series/16170/revisions/2/mbox/

Test gem_exec_flush:

        Subgroup basic-uc-pro-default:
                incomplete -> PASS       (fi-byt-j1900)
Test kms_pipe_crc_basic:
        Subgroup hang-read-crc-pipe-b:
                dmesg-warn -> PASS       (fi-ilk-650)

fi-bdw-5557u     total:245  pass:226  dwarn:0   dfail:0   fail:4   skip:15 
fi-bsw-n3050     total:245  pass:203  dwarn:0   dfail:0   fail:2   skip:40 
fi-bxt-t5700     total:245  pass:213  dwarn:0   dfail:0   fail:4   skip:28 
fi-byt-j1900     total:245  pass:214  dwarn:0   dfail:0   fail:3   skip:28 
fi-byt-n2820     total:245  pass:210  dwarn:0   dfail:0   fail:3   skip:32 
fi-hsw-4770      total:245  pass:221  dwarn:0   dfail:0   fail:4   skip:20 
fi-hsw-4770r     total:245  pass:221  dwarn:0   dfail:0   fail:4   skip:20 
fi-ilk-650       total:245  pass:189  dwarn:0   dfail:0   fail:3   skip:53 
fi-ivb-3520m     total:245  pass:219  dwarn:0   dfail:0   fail:4   skip:22 
fi-ivb-3770      total:245  pass:219  dwarn:0   dfail:0   fail:4   skip:22 
fi-kbl-7500u     total:245  pass:219  dwarn:0   dfail:0   fail:4   skip:22 
fi-skl-6260u     total:245  pass:227  dwarn:0   dfail:0   fail:4   skip:14 
fi-skl-6700hq    total:245  pass:220  dwarn:0   dfail:0   fail:4   skip:21 
fi-skl-6700k     total:245  pass:219  dwarn:1   dfail:0   fail:4   skip:21 
fi-skl-6770hq    total:245  pass:227  dwarn:0   dfail:0   fail:4   skip:14 
fi-snb-2520m     total:245  pass:210  dwarn:0   dfail:0   fail:3   skip:32 
fi-snb-2600      total:245  pass:209  dwarn:0   dfail:0   fail:3   skip:33

36f5ccaf209f6b34f905f5ba957114132b333ca8 drm-tip: 2016y-12m-01d-11h-42m-17s UTC integration manifest dfc6311 drm/i915: use platform enum instead of duplicating PCI ID if possible ed56530 drm/i915: give G45 and GM45 their own platform enums
94e600a drm/i915: add some more "i" in platform names for consistency
fe293b5 drm/i915: rename BROADWATER and CRESTLINE to I965G and I965GM, respectively 173f96d drm/i915: keep intel device info structs in gen based order
6a7e01b drm/i915: replace platform flags with a platform enum

== Logs ==

For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3161/
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Patchwork

2016-12-07 12:15 UTC #20 lore raw

✓ Fi.CI.BAT: success for drm/i915: introduce platform enum (rev3)

In reply to Jani Nikula

== Series Details ==

Series: drm/i915: introduce platform enum (rev3)
URL : https://patchwork.freedesktop.org/series/16170/
State : success

== Summary ==

Series 16170v3 drm/i915: introduce platform enum
https://patchwork.freedesktop.org/api/1.0/series/16170/revisions/3/mbox/

fi-bdw-5557u     total:247  pass:219  dwarn:0   dfail:0   fail:0   skip:28 
fi-bsw-n3050     total:247  pass:195  dwarn:0   dfail:0   fail:0   skip:52 
fi-bxt-t5700     total:247  pass:206  dwarn:0   dfail:0   fail:0   skip:41 
fi-byt-j1900     total:247  pass:206  dwarn:0   dfail:0   fail:0   skip:41 
fi-hsw-4770      total:247  pass:214  dwarn:0   dfail:0   fail:0   skip:33 
fi-hsw-4770r     total:247  pass:214  dwarn:0   dfail:0   fail:0   skip:33 
fi-ilk-650       total:247  pass:181  dwarn:0   dfail:0   fail:0   skip:66 
fi-ivb-3520m     total:247  pass:213  dwarn:0   dfail:0   fail:0   skip:34 
fi-ivb-3770      total:247  pass:212  dwarn:0   dfail:0   fail:0   skip:35 
fi-kbl-7500u     total:247  pass:212  dwarn:0   dfail:0   fail:0   skip:35 
fi-skl-6260u     total:247  pass:220  dwarn:0   dfail:0   fail:0   skip:27 
fi-skl-6700hq    total:247  pass:214  dwarn:0   dfail:0   fail:0   skip:33 
fi-skl-6700k     total:247  pass:210  dwarn:3   dfail:0   fail:0   skip:34 
fi-skl-6770hq    total:247  pass:220  dwarn:0   dfail:0   fail:0   skip:27 
fi-snb-2520m     total:247  pass:202  dwarn:0   dfail:0   fail:0   skip:45 
fi-snb-2600      total:247  pass:201  dwarn:0   dfail:0   fail:0   skip:46

7955526172a2154393986eb78de44e61cabd81f3 drm-tip: 2016y-12m-07d-10h-06m-32s UTC integration manifest d352e11 drm/i915: use platform enum instead of duplicating PCI ID if possible f301e5f drm/i915: give G45 and GM45 their own platform enums
86049bd drm/i915: add some more "i" in platform names for consistency
044813e drm/i915: rename BROADWATER and CRESTLINE to I965G and I965GM, respectively 83a0187 drm/i915: keep intel device info structs in gen based order

== Logs ==

For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3214/
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