Patch "perf/x86: Fix exclusion of BTS and LBR for Goldmont" has been added to the 4.8-stable tree

This is a note to let you know that I've just added the patch titled

perf/x86: Fix exclusion of BTS and LBR for Goldmont

to the 4.8-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
perf-x86-fix-exclusion-of-bts-and-lbr-for-goldmont.patch
and it can be found in the queue-4.8 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.

From: Andi Kleen <[email protected]>
Date: Thu, 8 Dec 2016 16:14:17 -0800
Subject: perf/x86: Fix exclusion of BTS and LBR for Goldmont

From: Andi Kleen <[email protected]>

commit b0c1ef52959582144bbea9a2b37db7f4c9e399f7 upstream.

An earlier patch allowed enabling PT and LBR at the same time on Goldmont. However it also allowed enabling BTS and LBR at the same time, which is still not supported. Fix this by bypassing the check only for PT.

---
 arch/x86/events/core.c       |    8 ++++++--
 arch/x86/events/perf_event.h |    2 +-
 2 files changed, 7 insertions(+), 3 deletions(-)

@@ -364,7 +364,11 @@ int x86_add_exclusive(unsigned int what)
 {
 	int i;
 
-	if (x86_pmu.lbr_pt_coexist)
+	/*
+	 * When lbr_pt_coexist we allow PT to coexist with either LBR or BTS.
+	 * LBR and BTS are still mutually exclusive.
+	 */
+	if (x86_pmu.lbr_pt_coexist && what == x86_lbr_exclusive_pt)
 		return 0;
 
 	if (!atomic_inc_not_zero(&x86_pmu.lbr_exclusive[what])) {

@@ -387,7 +391,7 @@ fail_unlock:
 
 void x86_del_exclusive(unsigned int what)
 {
-	if (x86_pmu.lbr_pt_coexist)
+	if (x86_pmu.lbr_pt_coexist && what == x86_lbr_exclusive_pt)
 		return;
 
 	atomic_dec(&x86_pmu.lbr_exclusive[what]);

@@ -601,7 +601,7 @@ struct x86_pmu {
 	u64		lbr_sel_mask;		   /* LBR_SELECT valid bits */
 	const int	*lbr_sel_map;		   /* lbr_select mappings */
 	bool		lbr_double_abort;	   /* duplicated lbr aborts */
-	bool		lbr_pt_coexist;		   /* LBR may coexist with PT */
+	bool		lbr_pt_coexist;		   /* (LBR|BTS) may coexist with PT */
 
 	/*
 	 * Intel PT/LBR/BTS are exclusive

Patches currently in stable-queue which might be from [email protected] are

queue-4.8/perf-x86-fix-exclusion-of-bts-and-lbr-for-goldmont.patch