imx6ul: Add Engicam Is.IoT MX6UL support
Subsystems (2)
v4 cover imx6ul: Add Engicam Is.IoT MX6UL support
From: Jagan Teki <[email protected]>
This patch set support Engicam Is.IoT MX6UL board support.
Changes for v4:
- Rebase to master
Changes for v3:
- Rebase to master
Changes for v2:
- Skiped eMMC node patch
- Rebase to master
Jagan Teki (9):
configs: imx6: Don't define USDHC2_BASE_ADDR
arm: imx6ul: Add Engicam Is.IoT MX6UL Starter Kit initial support
arm: dts: imx6ul-isiot: Add I2C nodes
imx6: isiotmx6ul: Add I2C support
arm: dts: imx6ul-isiot: Add FEC node
imx6: isiotmx6ul: Add FEC support
imx6: isiotmx6ul: Add NAND support
imx6: isiotmx6ul: Add nandboot env support
imx6ul: isiotmx6ul: Enable I2C support
arch/arm/cpu/armv7/mx6/Kconfig | 13 ++ arch/arm/dts/Makefile | 4 +- arch/arm/dts/imx6ul-isiot-mmc.dts | 50 ++++++ arch/arm/dts/imx6ul-isiot-nand.dts | 50 ++++++ arch/arm/dts/imx6ul-isiot.dtsi | 142 +++++++++++++++ board/engicam/isiotmx6ul/Kconfig | 12 ++ board/engicam/isiotmx6ul/MAINTAINERS | 7 + board/engicam/isiotmx6ul/Makefile | 6 + board/engicam/isiotmx6ul/README | 28 +++ board/engicam/isiotmx6ul/isiotmx6ul.c | 316 ++++++++++++++++++++++++++++++++++ configs/imx6ul_isiot_mmc_defconfig | 41 +++++ configs/imx6ul_isiot_nand_defconfig | 42 +++++ include/configs/imx6qdl_icore.h | 2 +- include/configs/imx6ul_geam.h | 2 +- include/configs/imx6ul_isiot.h | 205 ++++++++++++++++++++++ 15 files changed, 917 insertions(+), 3 deletions(-) create mode 100644 arch/arm/dts/imx6ul-isiot-mmc.dts create mode 100644 arch/arm/dts/imx6ul-isiot-nand.dts create mode 100644 arch/arm/dts/imx6ul-isiot.dtsi create mode 100644 board/engicam/isiotmx6ul/Kconfig create mode 100644 board/engicam/isiotmx6ul/MAINTAINERS create mode 100644 board/engicam/isiotmx6ul/Makefile create mode 100644 board/engicam/isiotmx6ul/README create mode 100644 board/engicam/isiotmx6ul/isiotmx6ul.c create mode 100644 configs/imx6ul_isiot_mmc_defconfig create mode 100644 configs/imx6ul_isiot_nand_defconfig create mode 100644 include/configs/imx6ul_isiot.h
Signature · 1 line
1.9.1
PATCH v4 1/9 configs: imx6: Don't define USDHC2_BASE_ADDR
From: Jagan Teki <[email protected]>
USDHC base address will assigned by SPL using fsl_esdhc_initialize and u-boot with devicetree, hence no remove base address assignment in config files.
Cc Stefano Babic <[email protected]>
Cc Matteo Lisi <[email protected]>
Cc Michael Trimarchi <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
--- include/configs/imx6qdl_icore.h | 2 +- include/configs/imx6ul_geam.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)
include/configs/imx6qdl_icore.h +1 -1
@@ -147,7 +147,7 @@#ifdef CONFIG_FSL_USDHC # define CONFIG_SYS_MMC_ENV_DEV 0# define CONFIG_SYS_FSL_USDHC_NUM 1 -# define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR +# define CONFIG_SYS_FSL_ESDHC_ADDR 0#endif /* NAND */
include/configs/imx6ul_geam.h +1 -1
@@ -145,7 +145,7 @@#ifdef CONFIG_FSL_USDHC # define CONFIG_SYS_MMC_ENV_DEV 0# define CONFIG_SYS_FSL_USDHC_NUM 1 -# define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR +# define CONFIG_SYS_FSL_ESDHC_ADDR 0#endif /* NAND */
Signature · 1 line
1.9.1
PATCH v4 1/9 configs: imx6: Don't define USDHC2_BASE_ADDR
Quoted 34 lines · Jagan Teki
From: Jagan Teki <[email protected]>
USDHC base address will assigned by SPL using
fsl_esdhc_initializeand u-boot with devicetree, hence no remove base address assignment in config files.Cc Stefano Babic <[email protected]>Cc Matteo Lisi <[email protected]>Cc Michael Trimarchi <[email protected]>Signed-off-by Jagan Teki <[email protected]>--- include/configs/imx6qdl_icore.h | 2 +- include/configs/imx6ul_geam.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)include/configs/imx6qdl_icore.h +1
-1@@ -147,7 +147,7 @@#ifdef CONFIG_FSL_USDHC # define CONFIG_SYS_MMC_ENV_DEV 0# define CONFIG_SYS_FSL_USDHC_NUM 1 -# define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR +# define CONFIG_SYS_FSL_ESDHC_ADDR 0#endif /* NAND */ include/configs/imx6ul_geam.h +0
-0
include/configs/imx6ul_geam.h line 151
Quoted 8 lines
include/configs/imx6ul_geam.h +1
-1@@ -145,7 +145,7 @@#ifdef CONFIG_FSL_USDHC # define CONFIG_SYS_MMC_ENV_DEV 0# define CONFIG_SYS_FSL_USDHC_NUM 1 -# define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR +# define CONFIG_SYS_FSL_ESDHC_ADDR 0#endif /* NAND */
Reviewed-by Stefano Babic <[email protected]>
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH v4 2/9 arm: imx6ul: Add Engicam Is.IoT MX6UL Starter Kit initial support
In reply to Jagan TekiFrom: Jagan Teki <[email protected]>
Boot from MMC:
-------------
U-Boot SPL 2017.01-rc2-gba3c151-dirty (Jan 02 2017 - 16:59:33) Trying to boot from MMC1
U-Boot 2017.01-rc2-gba3c151-dirty (Jan 02 2017 - 16:59:33 +0100)
CPU: Freescale i.MX6UL rev1.1 528 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 33C Reset cause: POR Model: Engicam Is.IoT MX6UL Starterkit DRAM: 512 MiB MMC: FSL_SDHC: 0
*** Warning - bad CRC, using default environment
In: serial Out: serial Err: serial Net: CPU Net Initialization Failed
No ethernet found.
Hit any key to stop autoboot: 0
isiotmx6ul>
Cc Stefano Babic <[email protected]>
Cc Matteo Lisi <[email protected]>
Cc Michael Trimarchi <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
--- arch/arm/cpu/armv7/mx6/Kconfig | 11 ++ arch/arm/dts/Makefile | 3 +- arch/arm/dts/imx6ul-isiot-mmc.dts | 50 +++++++ arch/arm/dts/imx6ul-isiot.dtsi | 92 +++++++++++++ board/engicam/isiotmx6ul/Kconfig | 12 ++ board/engicam/isiotmx6ul/MAINTAINERS | 6 + board/engicam/isiotmx6ul/Makefile | 6 + board/engicam/isiotmx6ul/README | 28 ++++ board/engicam/isiotmx6ul/isiotmx6ul.c | 247 ++++++++++++++++++++++++++++++++++ configs/imx6ul_isiot_mmc_defconfig | 36 +++++ include/configs/imx6ul_isiot.h | 142 +++++++++++++++++++ 11 files changed, 632 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/imx6ul-isiot-mmc.dts create mode 100644 arch/arm/dts/imx6ul-isiot.dtsi create mode 100644 board/engicam/isiotmx6ul/Kconfig create mode 100644 board/engicam/isiotmx6ul/MAINTAINERS create mode 100644 board/engicam/isiotmx6ul/Makefile create mode 100644 board/engicam/isiotmx6ul/README create mode 100644 board/engicam/isiotmx6ul/isiotmx6ul.c create mode 100644 configs/imx6ul_isiot_mmc_defconfig create mode 100644 include/configs/imx6ul_isiot.h
arch/arm/cpu/armv7/mx6/Kconfig +11 -0
@@ -205,6 +205,16 @@ config TARGET_MX6UL_GEAM select DM_THERMAL select SUPPORT_SPL +config TARGET_MX6UL_ISIOT + bool "Support Engicam Is.IoT MX6UL" + select MX6UL + select OF_CONTROL + select DM + select DM_GPIO + select DM_MMC + select DM_THERMAL + select SUPPORT_SPL + config TARGET_MX6ULL_14X14_EVK bool "Support mx6ull_14x14_evk" select MX6ULL
@@ -313,6 +323,7 @@ source "board/embest/mx6boards/Kconfig" source "board/engicam/geam6ul/Kconfig" source "board/engicam/icorem6/Kconfig" source "board/engicam/icorem6_rqs/Kconfig" +source "board/engicam/isiotmx6ul/Kconfig" source "board/freescale/mx6qarm2/Kconfig" source "board/freescale/mx6qsabreauto/Kconfig" source "board/freescale/mx6sabresd/Kconfig"
arch/arm/dts/Makefile +2 -1
@@ -313,7 +313,8 @@ dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \ imx6dl-icore-rqs.dtb \ imx6q-icore.dtb \ imx6q-icore-rqs.dtb \ - imx6ul-geam-kit.dtb + imx6ul-geam-kit.dtb \ + imx6ul-isiot-mmc.dtb dtb-$(CONFIG_MX7) += imx7-colibri.dtb
arch/arm/dts/imx6ul-isiot-mmc.dts new file +50 -0
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arch/arm/dts/imx6ul-isiot.dtsi new file +92 -0
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board/engicam/isiotmx6ul/Kconfig new file +12 -0
@@ -0,0 +1,12 @@ +if TARGET_MX6UL_ISIOT + +config SYS_BOARD + default "isiotmx6ul" + +config SYS_VENDOR + default "engicam" + +config SYS_CONFIG_NAME + default "imx6ul_isiot" + +endif
board/engicam/isiotmx6ul/MAINTAINERS new file +6 -0
@@ -0,0 +1,6 @@ +GEAM6UL BOARD +M: Jagan Teki <[email protected]> +S: Maintained +F: board/engicam/isiotmx6ul +F: include/configs/imx6ul_isiot.h +F: configs/imx6ul_isiot_mmc_defconfig
board/engicam/isiotmx6ul/Makefile new file +6 -0
@@ -0,0 +1,6 @@ +# Copyright (C) 2016 Amarula Solutions B.V. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := isiotmx6ul.o
board/engicam/isiotmx6ul/README new file +28 -0
@@ -0,0 +1,28 @@ +How to use U-Boot on Engicam Is.IoT MX6UL Starter Kit: +----------------------------------------------------- + +- Configure U-Boot for Engicam Is.IoT MX6UL + +$ make mrproper +$ make imx6ul_isiot_mmc_defconfig +$ make + +This will generate the SPL image called SPL and the u-boot-dtb.img. + +- Flash the SPL image into the micro SD card: + +sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1; sync + +- Flash the u-boot-dtb.img image into the micro SD card: + +sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 bs=1k seek=69; sync + +- Jumper settings: + +MMC Boot: JM3 Closed + +- Connect the Serial cable between the Starter Kit and the PC for the console. +(J28 is the Linux Serial console connector) + +- Insert the micro SD card in the board, power it up and U-Boot messages should +come up.
board/engicam/isiotmx6ul/isiotmx6ul.c new file +247 -0
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configs/imx6ul_isiot_mmc_defconfig new file +36 -0
@@ -0,0 +1,36 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX6=y +CONFIG_SPL_GPIO_SUPPORT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_TARGET_MX6UL_ISIOT=y +CONFIG_SPL_EXT_SUPPORT=y +CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ul-isiot-mmc" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,ENV_IS_IN_MMC" +CONFIG_BOOTDELAY=3 +CONFIG_DEFAULT_FDT_FILE="imx6ul-isiot-emmc.dtb" +CONFIG_SPL=y +CONFIG_HUSH_PARSER=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_FIT_SIGNATURE=y +CONFIG_SYS_PROMPT="isiotmx6ul> " +# CONFIG_CMD_IMLS is not set +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_MMC=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +# CONFIG_BLK is not set +# CONFIG_DM_MMC_OPS is not set +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX6=y +CONFIG_MXC_UART=y +CONFIG_IMX_THERMAL=y
include/configs/imx6ul_isiot.h new file +142 -0
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Signature · 1 line
1.9.1
PATCH v4 2/9 arm: imx6ul: Add Engicam Is.IoT MX6UL Starter Kit initial support
Hi Jagan,
Quoted 101 lines · Jagan Teki
From: Jagan Teki <[email protected]>
Boot from MMC:
-------------
U-Boot SPL 2017.01-rc2-gba3c151-dirty (Jan 02 2017 - 16:59:33) Trying to boot from MMC1U-Boot 2017.01-rc2-gba3c151-dirty (Jan 02 2017 - 16:59:33 +0100)
CPU: Freescale i.MX6UL rev1.1 528 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 33C Reset cause: POR Model: Engicam Is.IoT MX6UL Starterkit DRAM: 512 MiB MMC: FSL_SDHC: 0*** Warning - bad CRC, using default environment
In: serial Out: serial Err: serial Net: CPU Net Initialization FailedNo ethernet found.
Hit any key to stop autoboot: 0
isiotmx6ul>Cc Stefano Babic <[email protected]>Cc Matteo Lisi <[email protected]>Cc Michael Trimarchi <[email protected]>Signed-off-by Jagan Teki <[email protected]>--- arch/arm/cpu/armv7/mx6/Kconfig | 11 ++ arch/arm/dts/Makefile | 3 +- arch/arm/dts/imx6ul-isiot-mmc.dts | 50 +++++++ arch/arm/dts/imx6ul-isiot.dtsi | 92 +++++++++++++ board/engicam/isiotmx6ul/Kconfig | 12 ++ board/engicam/isiotmx6ul/MAINTAINERS | 6 + board/engicam/isiotmx6ul/Makefile | 6 + board/engicam/isiotmx6ul/README | 28 ++++ board/engicam/isiotmx6ul/isiotmx6ul.c | 247 ++++++++++++++++++++++++++++++++++ configs/imx6ul_isiot_mmc_defconfig | 36 +++++ include/configs/imx6ul_isiot.h | 142 +++++++++++++++++++ 11 files changed, 632 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/imx6ul-isiot-mmc.dts create mode 100644 arch/arm/dts/imx6ul-isiot.dtsi create mode 100644 board/engicam/isiotmx6ul/Kconfig create mode 100644 board/engicam/isiotmx6ul/MAINTAINERS create mode 100644 board/engicam/isiotmx6ul/Makefile create mode 100644 board/engicam/isiotmx6ul/README create mode 100644 board/engicam/isiotmx6ul/isiotmx6ul.c create mode 100644 configs/imx6ul_isiot_mmc_defconfig create mode 100644 include/configs/imx6ul_isiot.harch/arm/cpu/armv7/mx6/Kconfig +11
-0@@ -205,6 +205,16 @@ config TARGET_MX6UL_GEAM select DM_THERMAL select SUPPORT_SPL +config TARGET_MX6UL_ISIOT + bool "Support Engicam Is.IoT MX6UL" + select MX6UL + select OF_CONTROL + select DM + select DM_GPIO + select DM_MMC + select DM_THERMAL + select SUPPORT_SPL + config TARGET_MX6ULL_14X14_EVK bool "Support mx6ull_14x14_evk" select MX6ULL@@ -313,6 +323,7 @@ source "board/embest/mx6boards/Kconfig" source "board/engicam/geam6ul/Kconfig" source "board/engicam/icorem6/Kconfig" source "board/engicam/icorem6_rqs/Kconfig" +source "board/engicam/isiotmx6ul/Kconfig" source "board/freescale/mx6qarm2/Kconfig" source "board/freescale/mx6qsabreauto/Kconfig" source "board/freescale/mx6sabresd/Kconfig"arch/arm/dts/Makefile +2
-1@@ -313,7 +313,8 @@ dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \ imx6dl-icore-rqs.dtb \ imx6q-icore.dtb \ imx6q-icore-rqs.dtb \ - imx6ul-geam-kit.dtb + imx6ul-geam-kit.dtb \ + imx6ul-isiot-mmc.dtb dtb-$(CONFIG_MX7) += imx7-colibri.dtbarch/arm/dts/imx6ul-isiot-mmc.dts new file +0
-0
arch/arm/dts/imx6ul-isiot-mmc.dts line 9
Quoted 9 lines
arch/arm/dts/imx6ul-isiot-mmc.dts new file +9
-0@@ -0,0 +1,50 @@ +/* + * Copyright (C) 2016 Amarula Solutions B.V. + * Copyright (C) 2016 Engicam S.r.l. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + *
I have seen that a lot of files slipped into mainline, and I have myself not paid enough attention befeore (see your imx6ul-geam-kit.dts for example).
But we moved some years ago to SPDX-License-Identifier. Other DTS files are using this as well without copying the whole license. Could you do this here, too ? It would be also nice if you plan to fix this for all Engicam's boards, thanks !
Quoted 15 lines
arch/arm/dts/imx6ul-isiot-mmc.dts new file +9
-0+ +/dts-v1/; + +#include "imx6ul-isiot.dtsi" + +/ { + model = "Engicam Is.IoT MX6UL MMC Starterkit"; + compatible = "engicam,imx6ul-isiot", "fsl,imx6ul"; +};arch/arm/dts/imx6ul-isiot.dtsi new file +0
-0
arch/arm/dts/imx6ul-isiot.dtsi line 3
Quoted 3 lines
arch/arm/dts/imx6ul-isiot.dtsi new file +3
-0@@ -0,0 +1,92 @@ +/* + * Copyright (C) 2016 Amarula Solutions B.V. + * Copyright (C) 2016 Engicam S.r.l.
Ditto.
Quoted 24 lines
board/engicam/isiotmx6ul/Kconfig new file +12
-0@@ -0,0 +1,12 @@ +if TARGET_MX6UL_ISIOT + +config SYS_BOARD + default "isiotmx6ul" + +config SYS_VENDOR + default "engicam" + +config SYS_CONFIG_NAME + default "imx6ul_isiot" + +endifboard/engicam/isiotmx6ul/MAINTAINERS new file +0
-0
board/engicam/isiotmx6ul/MAINTAINERS line 6
Quoted 6 lines
board/engicam/isiotmx6ul/MAINTAINERS new file +6
-0@@ -0,0 +1,6 @@ +GEAM6UL BOARD +M: Jagan Teki <[email protected]> +S: Maintained +F: board/engicam/isiotmx6ul +F: include/configs/imx6ul_isiot.h +F: configs/imx6ul_isiot_mmc_defconfig
Should you not add the DTS files ?
Quoted 255 lines
board/engicam/isiotmx6ul/Makefile new file +6
-0@@ -0,0 +1,6 @@ +# Copyright (C) 2016 Amarula Solutions B.V. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := isiotmx6ul.oboard/engicam/isiotmx6ul/README new file +28
-0@@ -0,0 +1,28 @@ +How to use U-Boot on Engicam Is.IoT MX6UL Starter Kit: +----------------------------------------------------- + +- Configure U-Boot for Engicam Is.IoT MX6UL + +$ make mrproper +$ make imx6ul_isiot_mmc_defconfig +$ make + +This will generate the SPL image called SPL and the u-boot-dtb.img. + +- Flash the SPL image into the micro SD card: + +sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1; sync + +- Flash the u-boot-dtb.img image into the micro SD card: + +sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 bs=1k seek=69; sync + +- Jumper settings: + +MMC Boot: JM3 Closed + +- Connect the Serial cable between the Starter Kit and the PC for the console. +(J28 is the Linux Serial console connector) + +- Insert the micro SD card in the board, power it up and U-Boot messages should +come up.board/engicam/isiotmx6ul/isiotmx6ul.c new file +203
-0@@ -0,0 +1,247 @@ +/* +* Copyright (C) 2016 Amarula Solutions B.V. +* Copyright (C) 2016 Engicam S.r.l. +* Author: Jagan Teki <[email protected]> +* +* SPDX-License-Identifier: GPL-2.0+ +*/ + +#include <common.h> + +#include <asm/io.h> +#include <asm/gpio.h> +#include <linux/sizes.h> + +#include <asm/arch/clock.h> +#include <asm/arch/crm_regs.h> +#include <asm/arch/iomux.h> +#include <asm/arch/mx6-pins.h> +#include <asm/arch/sys_proto.h> +#include <asm/imx-common/iomux-v3.h> + +DECLARE_GLOBAL_DATA_PTR ; + +#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +static iomux_v3_cfg_t const uart1_pads[] = { +MX6_PAD_UART1_TX_DATA__UART1_DCE_TX |MUX_PAD_CTRL (UART_PAD_CTRL ), +MX6_PAD_UART1_RX_DATA__UART1_DCE_RX |MUX_PAD_CTRL (UART_PAD_CTRL ), +}; + +int board_early_init_f (void ) +{ +imx_iomux_v3_setup_multiple_pads (uart1_pads,ARRAY_SIZE (uart1_pads)); + +return 0 ; +} + +int board_init (void ) +{ +/* Address of boot parameters */ + gd->bd->bi_boot_params =PHYS_SDRAM +0x100 ; + +return 0 ; +} + +int dram_init (void ) +{ + gd->ram_size =imx_ddr_size (); + +return 0 ; +} + +#ifdef CONFIG_SPL_BUILD +#include <libfdt.h> +#include <spl.h> + +#include <asm/arch/crm_regs.h> +#include <asm/arch/mx6-ddr.h> + +/* MMC board initialization is needed till adding DM support in SPL */ +#if defined(CONFIG_FSL_ESDHC ) && !defined(CONFIG_DM_MMC ) +#include <mmc.h> +#include <fsl_esdhc.h> + +#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \ + PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +static iomux_v3_cfg_t const usdhc1_pads[] = { +MX6_PAD_SD1_CLK__USDHC1_CLK |MUX_PAD_CTRL (USDHC_PAD_CTRL ), +MX6_PAD_SD1_CMD__USDHC1_CMD |MUX_PAD_CTRL (USDHC_PAD_CTRL ), +MX6_PAD_SD1_DATA0__USDHC1_DATA0 |MUX_PAD_CTRL (USDHC_PAD_CTRL ), +MX6_PAD_SD1_DATA1__USDHC1_DATA1 |MUX_PAD_CTRL (USDHC_PAD_CTRL ), +MX6_PAD_SD1_DATA2__USDHC1_DATA2 |MUX_PAD_CTRL (USDHC_PAD_CTRL ), +MX6_PAD_SD1_DATA3__USDHC1_DATA3 |MUX_PAD_CTRL (USDHC_PAD_CTRL ), + +/* VSELECT */ +MX6_PAD_GPIO1_IO05__USDHC1_VSELECT |MUX_PAD_CTRL (USDHC_PAD_CTRL ), +/* CD */ +MX6_PAD_UART1_RTS_B__GPIO1_IO19 |MUX_PAD_CTRL (NO_PAD_CTRL ), +/* RST_B */ +MX6_PAD_GPIO1_IO09__GPIO1_IO09 |MUX_PAD_CTRL (NO_PAD_CTRL ), +}; + +#define USDHC1_CD_GPIO IMX_GPIO_NR(1, 19) + +struct fsl_esdhc_cfg usdhc_cfg[1 ] = { + {USDHC1_BASE_ADDR ,0 ,4 }, +}; + +int board_mmc_getcd (struct mmc *mmc) +{ +struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; +int ret =0 ; + +switch (cfg->esdhc_base) { +case USDHC1_BASE_ADDR : + ret = !gpio_get_value (USDHC1_CD_GPIO ); +break ; + } + +return ret; +} + +int board_mmc_init (bd_t *bis) +{ +int i, ret; + +/* +* According to the board_mmc_init() the following map is done: +* (U-boot device node) (Physical Port) +* mmc0 USDHC1 +*/ +for (i =0 ; i <CONFIG_SYS_FSL_USDHC_NUM ; i++) { +switch (i) { +case 0 : +imx_iomux_v3_setup_multiple_pads ( + usdhc1_pads,ARRAY_SIZE (usdhc1_pads)); +gpio_direction_input (USDHC1_CD_GPIO ); + usdhc_cfg[i].sdhc_clk =mxc_get_clock (MXC_ESDHC_CLK ); +break ; +default : +printf ("Warning - USDHC%d controller not supporting\n" , + i +1 ); +return 0 ; + } + + ret =fsl_esdhc_initialize (bis, &usdhc_cfg[i]); +if (ret) { +printf ("Warning: failed to initialize mmc dev %d\n" , i); +return ret; + } + } + +return 0 ; +} +#endif /* CONFIG_FSL_ESDHC */ + +static struct mx6ul_iomux_grp_regs mx6_grp_ioregs = { + .grp_addds =0x00000030 , + .grp_ddrmode_ctl =0x00020000 , + .grp_b0ds =0x00000030 , + .grp_ctlds =0x00000030 , + .grp_b1ds =0x00000030 , + .grp_ddrpke =0x00000000 , + .grp_ddrmode =0x00020000 , + .grp_ddr_type =0x000c0000 , +}; + +static struct mx6ul_iomux_ddr_regs mx6_ddr_ioregs = { + .dram_dqm0 =0x00000030 , + .dram_dqm1 =0x00000030 , + .dram_ras =0x00000030 , + .dram_cas =0x00000030 , + .dram_odt0 =0x00000030 , + .dram_odt1 =0x00000030 , + .dram_sdba2 =0x00000000 , + .dram_sdclk_0 =0x00000008 , + .dram_sdqs0 =0x00000038 , + .dram_sdqs1 =0x00000030 , + .dram_reset =0x00000030 , +}; + +static struct mx6_mmdc_calibration mx6_mmcd_calib = { + .p0_mpwldectrl0 =0x00070007 , + .p0_mpdgctrl0 =0x41490145 , + .p0_mprddlctl =0x40404546 , + .p0_mpwrdlctl =0x4040524D , +}; + +struct mx6_ddr_sysinfo ddr_sysinfo = { + .dsize =0 , + .cs_density =20 , + .ncs =1 , + .cs1_mirror =0 , + .rtt_wr =2 , + .rtt_nom =1 ,/* RTT_Nom = RZQ/2 */ + .walat =1 ,/* Write additional latency */ + .ralat =5 ,/* Read additional latency */ + .mif3_mode =3 ,/* Command prediction working mode */ + .bi_on =1 ,/* Bank interleaving enabled */ + .sde_to_rst =0x10 ,/* 14 cycles, 200us (JEDEC default) */ + .rst_to_cke =0x23 ,/* 33 cycles, 500us (JEDEC default) */ + .ddr_type =DDR_TYPE_DDR3 , +}; + +static struct mx6_ddr3_cfg mem_ddr = { + .mem_speed =800 , + .density =4 , + .width =16 , + .banks =8 , + .rowaddr =15 , + .coladdr =10 , + .pagesz =2 , + .trcd =1375 , + .trcmin =4875 , + .trasmin =3500 , +}; + +static void ccgr_init (void ) +{
board/engicam/isiotmx6ul/isiotmx6ul.c line 213
Quoted 10 lines
board/engicam/isiotmx6ul/isiotmx6ul.c new file +10
-0+struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR ; + +writel (0xFFFFFFFF , &ccm->CCGR0); +writel (0xFFFFFFFF , &ccm->CCGR1); +writel (0xFFFFFFFF , &ccm->CCGR2); +writel (0xFFFFFFFF , &ccm->CCGR3); +writel (0xFFFFFFFF , &ccm->CCGR4); +writel (0xFFFFFFFF , &ccm->CCGR5); +writel (0xFFFFFFFF , &ccm->CCGR6); +writel (0xFFFFFFFF , &ccm->CCGR7);
Just a mention here: why do you activate all clocks instead of just what you really need ?
Quoted 215 lines
board/engicam/isiotmx6ul/isiotmx6ul.c new file +34
-0+} + +static void spl_dram_init (void ) +{ +mx6ul_dram_iocfg (mem_ddr.width, &mx6_ddr_ioregs, &mx6_grp_ioregs); +mx6_dram_cfg (&ddr_sysinfo, &mx6_mmcd_calib, &mem_ddr); +} + +void board_init_f (ulong dummy) +{ +/* setup AIPS and disable watchdog */ +arch_cpu_init (); + +ccgr_init (); + +/* iomux and setup of i2c */ +board_early_init_f (); + +/* setup GP timer */ +timer_init (); + +/* UART clocks enabled and gd valid - init serial console */ +preloader_console_init (); + +/* DDR initialization */ +spl_dram_init (); + +/* Clear the BSS. */ +memset (__bss_start,0 , __bss_end - __bss_start); + +/* load/boot image from boot device */ +board_init_r (NULL ,0 ); +} +#endif /* CONFIG_SPL_BUILD */ configs/imx6ul_isiot_mmc_defconfig new file +36
-0@@ -0,0 +1,36 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX6=y +CONFIG_SPL_GPIO_SUPPORT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_TARGET_MX6UL_ISIOT=y +CONFIG_SPL_EXT_SUPPORT=y +CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ul-isiot-mmc" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,ENV_IS_IN_MMC" +CONFIG_BOOTDELAY=3 +CONFIG_DEFAULT_FDT_FILE="imx6ul-isiot-emmc.dtb" +CONFIG_SPL=y +CONFIG_HUSH_PARSER=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_FIT_SIGNATURE=y +CONFIG_SYS_PROMPT="isiotmx6ul> " +# CONFIG_CMD_IMLS is not set +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_MMC=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +# CONFIG_BLK is not set +# CONFIG_DM_MMC_OPS is not set +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX6=y +CONFIG_MXC_UART=y +CONFIG_IMX_THERMAL=yinclude/configs/imx6ul_isiot.h new file +132
-0@@ -0,0 +1,142 @@ +/* +* Copyright (C) 2016 Amarula Solutions B.V. +* Copyright (C) 2016 Engicam S.r.l. +* +* Configuration settings for the Engicam Is.IoT MX6UL Starter Kits. +* +* SPDX-License-Identifier: GPL-2.0+ +*/ + +#ifndef __IMX6UL_ISIOT_CONFIG_H +#define __IMX6UL_ISIOT_CONFIG_H + +#include <linux/sizes.h> +#include "mx6_common.h" + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M) + +/* Total Size of Environment Sector */ +#define CONFIG_ENV_SIZE SZ_128K + +/* Allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE + +/* Environment */ +#ifndef CONFIG_ENV_IS_NOWHERE +/* Environment in MMC */ +# if defined(CONFIG_ENV_IS_IN_MMC ) +# define CONFIG_ENV_OFFSET 0x100000 +# endif +#endif + +/* Default environment */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "script=boot.scr\0" \ + "image=uImage\0" \ + "fit_image=fit.itb\0" \ + "splashpos=m,m\0" \ + "console=ttymxc0\0" \ + "fdt_high=0xffffffff\0" \ + "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ + "fdt_addr=0x87800000\0" \ + "boot_fdt=try\0" \ + "mmcdev=0\0" \ + "mmcpart=1\0" \ + "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ + "mmcautodetect=yes\0" \ + "mmcargs=setenv bootargs console=${console},${baudrate} " \ + "root=${mmcroot}\0" \ + "loadbootscript=" \ + "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ + "bootscript=echo Running bootscript from mmc ...; " \ + "source\0" \ + "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ + "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ + "loadfit=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${fit_image}\0" \ + "fitboot=echo Booting FIT image from mmc ...; " \ + "run mmcargs; " \ + "bootm ${loadaddr}\0" \ + "mmcboot=echo Booting from mmc ...; " \ + "run mmcargs; " \ + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ + "if run loadfdt; then " \ + "bootm ${loadaddr} - ${fdt_addr}; " \ + "else " \ + "if test ${boot_fdt} = try; then " \ + "bootm; " \ + "else " \ + "echo WARN: Cannot load the DT; " \ + "fi; " \ + "fi; " \ + "else " \ + "bootm; " \ + "fi\0" + +# define CONFIG_BOOTCOMMAND \ + "if mmc rescan; then " \ + "if run loadbootscript; then " \ + "run bootscript; " \ + "else " \ + "if run loadfit; then " \ + "run fitboot; " \ + "else " \ + "if run loadimage; then " \ + "run mmcboot; " \ + "fi; " \ + "fi; " \ + "fi; " \ + "fi" + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_MEMTEST_START 0x80000000 +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000) + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_SYS_HZ 1000 + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_SP_OFFSET) + +/* FIT */ +#ifdef CONFIG_FIT +# define CONFIG_HASH_VERIFY +# define CONFIG_SHA1 +# define CONFIG_SHA256 +# define CONFIG_IMAGE_FORMAT_LEGACY +#endif + +/* UART */ +#ifdef CONFIG_MXC_UART +# define CONFIG_MXC_UART_BASE UART1_BASE +#endif + +/* MMC */ +#ifdef CONFIG_FSL_USDHC +# define CONFIG_SYS_MMC_ENV_DEV 0 +# define CONFIG_SYS_FSL_USDHC_NUM 1 +# define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#endif + +/* SPL */ +#ifdef CONFIG_SPL
include/configs/imx6ul_isiot.h line 142
Quoted 10 lines
include/configs/imx6ul_isiot.h new file +10
-0+# define CONFIG_SPL_MMC_SUPPORT + +# include "imx6_spl.h" +# ifdef CONFIG_SPL_BUILD +# undef CONFIG_DM_GPIO +# undef CONFIG_DM_MMC +# endif +#endif + +#endif /* __IMX6UL_ISIOT_CONFIG_H */
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH v4 2/9 arm: imx6ul: Add Engicam Is.IoT MX6UL Starter Kit initial support
Quoted 119 lines · Stefano Babic
Hi Jagan,
Quoted 101 lines · Jagan Teki
From: Jagan Teki <[email protected]>
Boot from MMC:
-------------
U-Boot SPL 2017.01-rc2-gba3c151-dirty (Jan 02 2017 - 16:59:33) Trying to boot from MMC1U-Boot 2017.01-rc2-gba3c151-dirty (Jan 02 2017 - 16:59:33 +0100)
CPU: Freescale i.MX6UL rev1.1 528 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 33C Reset cause: POR Model: Engicam Is.IoT MX6UL Starterkit DRAM: 512 MiB MMC: FSL_SDHC: 0*** Warning - bad CRC, using default environment
In: serial Out: serial Err: serial Net: CPU Net Initialization FailedNo ethernet found.
Hit any key to stop autoboot: 0
isiotmx6ul>Cc Stefano Babic <[email protected]>Cc Matteo Lisi <[email protected]>Cc Michael Trimarchi <[email protected]>Signed-off-by Jagan Teki <[email protected]>--- arch/arm/cpu/armv7/mx6/Kconfig | 11 ++ arch/arm/dts/Makefile | 3 +- arch/arm/dts/imx6ul-isiot-mmc.dts | 50 +++++++ arch/arm/dts/imx6ul-isiot.dtsi | 92 +++++++++++++ board/engicam/isiotmx6ul/Kconfig | 12 ++ board/engicam/isiotmx6ul/MAINTAINERS | 6 + board/engicam/isiotmx6ul/Makefile | 6 + board/engicam/isiotmx6ul/README | 28 ++++ board/engicam/isiotmx6ul/isiotmx6ul.c | 247 ++++++++++++++++++++++++++++++++++ configs/imx6ul_isiot_mmc_defconfig | 36 +++++ include/configs/imx6ul_isiot.h | 142 +++++++++++++++++++ 11 files changed, 632 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/imx6ul-isiot-mmc.dts create mode 100644 arch/arm/dts/imx6ul-isiot.dtsi create mode 100644 board/engicam/isiotmx6ul/Kconfig create mode 100644 board/engicam/isiotmx6ul/MAINTAINERS create mode 100644 board/engicam/isiotmx6ul/Makefile create mode 100644 board/engicam/isiotmx6ul/README create mode 100644 board/engicam/isiotmx6ul/isiotmx6ul.c create mode 100644 configs/imx6ul_isiot_mmc_defconfig create mode 100644 include/configs/imx6ul_isiot.harch/arm/cpu/armv7/mx6/Kconfig +11
-0@@ -205,6 +205,16 @@ config TARGET_MX6UL_GEAM select DM_THERMAL select SUPPORT_SPL +config TARGET_MX6UL_ISIOT + bool "Support Engicam Is.IoT MX6UL" + select MX6UL + select OF_CONTROL + select DM + select DM_GPIO + select DM_MMC + select DM_THERMAL + select SUPPORT_SPL + config TARGET_MX6ULL_14X14_EVK bool "Support mx6ull_14x14_evk" select MX6ULL@@ -313,6 +323,7 @@ source "board/embest/mx6boards/Kconfig" source "board/engicam/geam6ul/Kconfig" source "board/engicam/icorem6/Kconfig" source "board/engicam/icorem6_rqs/Kconfig" +source "board/engicam/isiotmx6ul/Kconfig" source "board/freescale/mx6qarm2/Kconfig" source "board/freescale/mx6qsabreauto/Kconfig" source "board/freescale/mx6sabresd/Kconfig"arch/arm/dts/Makefile +2
-1@@ -313,7 +313,8 @@ dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \ imx6dl-icore-rqs.dtb \ imx6q-icore.dtb \ imx6q-icore-rqs.dtb \ - imx6ul-geam-kit.dtb + imx6ul-geam-kit.dtb \ + imx6ul-isiot-mmc.dtb dtb-$(CONFIG_MX7) += imx7-colibri.dtbarch/arm/dts/imx6ul-isiot-mmc.dts new file +0
-0arch/arm/dts/imx6ul-isiot-mmc.dts line 9
Quoted 9 lines
arch/arm/dts/imx6ul-isiot-mmc.dts new file +9
-0@@ -0,0 +1,50 @@ +/* + * Copyright (C) 2016 Amarula Solutions B.V. + * Copyright (C) 2016 Engicam S.r.l. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + *I have seen that a lot of files slipped into mainline, and I have myself not paid enough attention befeore (see your
imx6ul-geam-kit.dtsfor example).
Quoted 4 lines
But we moved some years ago to SPDX-License-Identifier. Other DTS files are using this as well without copying the whole license. Could you do this here, too ? It would be also nice if you plan to fix this for all Engicam's boards, thanks !
Yes for boards, I will prepare patch.
For devicetress, since the base dtsi files copied from Linux, we keep the license as it is. I am not sure all other dts(i) files use the SPDX-License-Identifier. example imx6sll-evk, imx6ull-14x14-evk and all sunxi .
Quoted 47 lines
Quoted 16 lines
arch/arm/dts/imx6ul-isiot-mmc.dts new file +9
-0+ +/dts-v1/; + +#include "imx6ul-isiot.dtsi" + +/ { + model = "Engicam Is.IoT MX6UL MMC Starterkit"; + compatible = "engicam,imx6ul-isiot", "fsl,imx6ul"; +};arch/arm/dts/imx6ul-isiot.dtsi new file +0
-0arch/arm/dts/imx6ul-isiot.dtsi line 3
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arch/arm/dts/imx6ul-isiot.dtsi new file +3
-0@@ -0,0 +1,92 @@ +/* + * Copyright (C) 2016 Amarula Solutions B.V. + * Copyright (C) 2016 Engicam S.r.l.Ditto.
Quoted 24 lines
board/engicam/isiotmx6ul/Kconfig new file +12
-0@@ -0,0 +1,12 @@ +if TARGET_MX6UL_ISIOT + +config SYS_BOARD + default "isiotmx6ul" + +config SYS_VENDOR + default "engicam" + +config SYS_CONFIG_NAME + default "imx6ul_isiot" + +endifboard/engicam/isiotmx6ul/MAINTAINERS new file +0
-0@@ -0,0 +1,6 @@
Quoted 8 lines
board/engicam/isiotmx6ul/MAINTAINERS line 6
Quoted 6 lines
board/engicam/isiotmx6ul/MAINTAINERS new file +6
-0+GEAM6UL BOARD +M: Jagan Teki <[email protected]> +S: Maintained +F: board/engicam/isiotmx6ul +F: include/configs/imx6ul_isiot.h +F: configs/imx6ul_isiot_mmc_defconfigShould you not add the DTS files ?
Good idea, I will add.
Quoted 261 lines
Quoted 261 lines
board/engicam/isiotmx6ul/Makefile new file +6
-0@@ -0,0 +1,6 @@ +# Copyright (C) 2016 Amarula Solutions B.V. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := isiotmx6ul.oboard/engicam/isiotmx6ul/README new file +28
-0@@ -0,0 +1,28 @@ +How to use U-Boot on Engicam Is.IoT MX6UL Starter Kit: +----------------------------------------------------- + +- Configure U-Boot for Engicam Is.IoT MX6UL + +$ make mrproper +$ make imx6ul_isiot_mmc_defconfig +$ make + +This will generate the SPL image called SPL and the u-boot-dtb.img. + +- Flash the SPL image into the micro SD card: + +sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1; sync + +- Flash the u-boot-dtb.img image into the micro SD card: + +sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 bs=1k seek=69; sync + +- Jumper settings: + +MMC Boot: JM3 Closed + +- Connect the Serial cable between the Starter Kit and the PC for the console. +(J28 is the Linux Serial console connector) + +- Insert the micro SD card in the board, power it up and U-Boot messages should +come up.board/engicam/isiotmx6ul/isiotmx6ul.c new file +208
-0@@ -0,0 +1,247 @@ +/* +* Copyright (C) 2016 Amarula Solutions B.V. +* Copyright (C) 2016 Engicam S.r.l. +* Author: Jagan Teki <[email protected]> +* +* SPDX-License-Identifier: GPL-2.0+ +*/ + +#include <common.h> + +#include <asm/io.h> +#include <asm/gpio.h> +#include <linux/sizes.h> + +#include <asm/arch/clock.h> +#include <asm/arch/crm_regs.h> +#include <asm/arch/iomux.h> +#include <asm/arch/mx6-pins.h> +#include <asm/arch/sys_proto.h> +#include <asm/imx-common/iomux-v3.h> + +DECLARE_GLOBAL_DATA_PTR ; + +#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +static iomux_v3_cfg_t const uart1_pads[] = { +MX6_PAD_UART1_TX_DATA__UART1_DCE_TX |MUX_PAD_CTRL (UART_PAD_CTRL ), +MX6_PAD_UART1_RX_DATA__UART1_DCE_RX |MUX_PAD_CTRL (UART_PAD_CTRL ), +}; + +int board_early_init_f (void ) +{ +imx_iomux_v3_setup_multiple_pads (uart1_pads,ARRAY_SIZE (uart1_pads)); + +return 0 ; +} + +int board_init (void ) +{ +/* Address of boot parameters */ + gd->bd->bi_boot_params =PHYS_SDRAM +0x100 ; + +return 0 ; +} + +int dram_init (void ) +{ + gd->ram_size =imx_ddr_size (); + +return 0 ; +} + +#ifdef CONFIG_SPL_BUILD +#include <libfdt.h> +#include <spl.h> + +#include <asm/arch/crm_regs.h> +#include <asm/arch/mx6-ddr.h> + +/* MMC board initialization is needed till adding DM support in SPL */ +#if defined(CONFIG_FSL_ESDHC ) && !defined(CONFIG_DM_MMC ) +#include <mmc.h> +#include <fsl_esdhc.h> + +#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \ + PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +static iomux_v3_cfg_t const usdhc1_pads[] = { +MX6_PAD_SD1_CLK__USDHC1_CLK |MUX_PAD_CTRL (USDHC_PAD_CTRL ), +MX6_PAD_SD1_CMD__USDHC1_CMD |MUX_PAD_CTRL (USDHC_PAD_CTRL ), +MX6_PAD_SD1_DATA0__USDHC1_DATA0 |MUX_PAD_CTRL (USDHC_PAD_CTRL ), +MX6_PAD_SD1_DATA1__USDHC1_DATA1 |MUX_PAD_CTRL (USDHC_PAD_CTRL ), +MX6_PAD_SD1_DATA2__USDHC1_DATA2 |MUX_PAD_CTRL (USDHC_PAD_CTRL ), +MX6_PAD_SD1_DATA3__USDHC1_DATA3 |MUX_PAD_CTRL (USDHC_PAD_CTRL ), + +/* VSELECT */ +MX6_PAD_GPIO1_IO05__USDHC1_VSELECT |MUX_PAD_CTRL (USDHC_PAD_CTRL ), +/* CD */ +MX6_PAD_UART1_RTS_B__GPIO1_IO19 |MUX_PAD_CTRL (NO_PAD_CTRL ), +/* RST_B */ +MX6_PAD_GPIO1_IO09__GPIO1_IO09 |MUX_PAD_CTRL (NO_PAD_CTRL ), +}; + +#define USDHC1_CD_GPIO IMX_GPIO_NR(1, 19) + +struct fsl_esdhc_cfg usdhc_cfg[1 ] = { + {USDHC1_BASE_ADDR ,0 ,4 }, +}; + +int board_mmc_getcd (struct mmc *mmc) +{ +struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; +int ret =0 ; + +switch (cfg->esdhc_base) { +case USDHC1_BASE_ADDR : + ret = !gpio_get_value (USDHC1_CD_GPIO ); +break ; + } + +return ret; +} + +int board_mmc_init (bd_t *bis) +{ +int i, ret; + +/* +* According to the board_mmc_init() the following map is done: +* (U-boot device node) (Physical Port) +* mmc0 USDHC1 +*/ +for (i =0 ; i <CONFIG_SYS_FSL_USDHC_NUM ; i++) { +switch (i) { +case 0 : +imx_iomux_v3_setup_multiple_pads ( + usdhc1_pads,ARRAY_SIZE (usdhc1_pads)); +gpio_direction_input (USDHC1_CD_GPIO ); + usdhc_cfg[i].sdhc_clk =mxc_get_clock (MXC_ESDHC_CLK ); +break ; +default : +printf ("Warning - USDHC%d controller not supporting\n" , + i +1 ); +return 0 ; + } + + ret =fsl_esdhc_initialize (bis, &usdhc_cfg[i]); +if (ret) { +printf ("Warning: failed to initialize mmc dev %d\n" , i); +return ret; + } + } + +return 0 ; +} +#endif /* CONFIG_FSL_ESDHC */ + +static struct mx6ul_iomux_grp_regs mx6_grp_ioregs = { + .grp_addds =0x00000030 , + .grp_ddrmode_ctl =0x00020000 , + .grp_b0ds =0x00000030 , + .grp_ctlds =0x00000030 , + .grp_b1ds =0x00000030 , + .grp_ddrpke =0x00000000 , + .grp_ddrmode =0x00020000 , + .grp_ddr_type =0x000c0000 , +}; + +static struct mx6ul_iomux_ddr_regs mx6_ddr_ioregs = { + .dram_dqm0 =0x00000030 , + .dram_dqm1 =0x00000030 , + .dram_ras =0x00000030 , + .dram_cas =0x00000030 , + .dram_odt0 =0x00000030 , + .dram_odt1 =0x00000030 , + .dram_sdba2 =0x00000000 , + .dram_sdclk_0 =0x00000008 , + .dram_sdqs0 =0x00000038 , + .dram_sdqs1 =0x00000030 , + .dram_reset =0x00000030 , +}; + +static struct mx6_mmdc_calibration mx6_mmcd_calib = { + .p0_mpwldectrl0 =0x00070007 , + .p0_mpdgctrl0 =0x41490145 , + .p0_mprddlctl =0x40404546 , + .p0_mpwrdlctl =0x4040524D , +}; + +struct mx6_ddr_sysinfo ddr_sysinfo = { + .dsize =0 , + .cs_density =20 , + .ncs =1 , + .cs1_mirror =0 , + .rtt_wr =2 , + .rtt_nom =1 ,/* RTT_Nom = RZQ/2 */ + .walat =1 ,/* Write additional latency */ + .ralat =5 ,/* Read additional latency */ + .mif3_mode =3 ,/* Command prediction working mode */ + .bi_on =1 ,/* Bank interleaving enabled */ + .sde_to_rst =0x10 ,/* 14 cycles, 200us (JEDEC default) */ + .rst_to_cke =0x23 ,/* 33 cycles, 500us (JEDEC default) */ + .ddr_type =DDR_TYPE_DDR3 , +}; + +static struct mx6_ddr3_cfg mem_ddr = { + .mem_speed =800 , + .density =4 , + .width =16 , + .banks =8 , + .rowaddr =15 , + .coladdr =10 , + .pagesz =2 , + .trcd =1375 , + .trcmin =4875 , + .trasmin =3500 , +}; + +static void ccgr_init (void ) +{ +struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR ; + +writel (0xFFFFFFFF , &ccm->CCGR0); +writel (0xFFFFFFFF , &ccm->CCGR1); +writel (0xFFFFFFFF , &ccm->CCGR2);
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board/engicam/isiotmx6ul/isiotmx6ul.c line 213
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board/engicam/isiotmx6ul/isiotmx6ul.c new file +5
-0+writel (0xFFFFFFFF , &ccm->CCGR3); +writel (0xFFFFFFFF , &ccm->CCGR4); +writel (0xFFFFFFFF , &ccm->CCGR5); +writel (0xFFFFFFFF , &ccm->CCGR6); +writel (0xFFFFFFFF , &ccm->CCGR7);Just a mention here: why do you activate all clocks instead of just what you really need ?
May be yes, but it's better to have full clock initialization so-that nothing broke during SPL runtime.
thanks!
Signature · 4 lines
Jagan Teki Free Software Engineer | www.openedev.com U-Boot, Linux | Upstream Maintainer Hyderabad, India.
PATCH v4 2/9 arm: imx6ul: Add Engicam Is.IoT MX6UL Starter Kit initial support
Hi Jagan, Tom,
Quoted 125 lines · Jagan Teki
Quoted 119 lines · Stefano Babic
Hi Jagan,
Quoted 101 lines · Jagan Teki
From: Jagan Teki <[email protected]>
Boot from MMC:
-------------
U-Boot SPL 2017.01-rc2-gba3c151-dirty (Jan 02 2017 - 16:59:33) Trying to boot from MMC1U-Boot 2017.01-rc2-gba3c151-dirty (Jan 02 2017 - 16:59:33 +0100)
CPU: Freescale i.MX6UL rev1.1 528 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 33C Reset cause: POR Model: Engicam Is.IoT MX6UL Starterkit DRAM: 512 MiB MMC: FSL_SDHC: 0*** Warning - bad CRC, using default environment
In: serial Out: serial Err: serial Net: CPU Net Initialization FailedNo ethernet found.
Hit any key to stop autoboot: 0
isiotmx6ul>Cc Stefano Babic <[email protected]>Cc Matteo Lisi <[email protected]>Cc Michael Trimarchi <[email protected]>Signed-off-by Jagan Teki <[email protected]>--- arch/arm/cpu/armv7/mx6/Kconfig | 11 ++ arch/arm/dts/Makefile | 3 +- arch/arm/dts/imx6ul-isiot-mmc.dts | 50 +++++++ arch/arm/dts/imx6ul-isiot.dtsi | 92 +++++++++++++ board/engicam/isiotmx6ul/Kconfig | 12 ++ board/engicam/isiotmx6ul/MAINTAINERS | 6 + board/engicam/isiotmx6ul/Makefile | 6 + board/engicam/isiotmx6ul/README | 28 ++++ board/engicam/isiotmx6ul/isiotmx6ul.c | 247 ++++++++++++++++++++++++++++++++++ configs/imx6ul_isiot_mmc_defconfig | 36 +++++ include/configs/imx6ul_isiot.h | 142 +++++++++++++++++++ 11 files changed, 632 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/imx6ul-isiot-mmc.dts create mode 100644 arch/arm/dts/imx6ul-isiot.dtsi create mode 100644 board/engicam/isiotmx6ul/Kconfig create mode 100644 board/engicam/isiotmx6ul/MAINTAINERS create mode 100644 board/engicam/isiotmx6ul/Makefile create mode 100644 board/engicam/isiotmx6ul/README create mode 100644 board/engicam/isiotmx6ul/isiotmx6ul.c create mode 100644 configs/imx6ul_isiot_mmc_defconfig create mode 100644 include/configs/imx6ul_isiot.harch/arm/cpu/armv7/mx6/Kconfig +11
-0@@ -205,6 +205,16 @@ config TARGET_MX6UL_GEAM select DM_THERMAL select SUPPORT_SPL +config TARGET_MX6UL_ISIOT + bool "Support Engicam Is.IoT MX6UL" + select MX6UL + select OF_CONTROL + select DM + select DM_GPIO + select DM_MMC + select DM_THERMAL + select SUPPORT_SPL + config TARGET_MX6ULL_14X14_EVK bool "Support mx6ull_14x14_evk" select MX6ULL@@ -313,6 +323,7 @@ source "board/embest/mx6boards/Kconfig" source "board/engicam/geam6ul/Kconfig" source "board/engicam/icorem6/Kconfig" source "board/engicam/icorem6_rqs/Kconfig" +source "board/engicam/isiotmx6ul/Kconfig" source "board/freescale/mx6qarm2/Kconfig" source "board/freescale/mx6qsabreauto/Kconfig" source "board/freescale/mx6sabresd/Kconfig"arch/arm/dts/Makefile +2
-1@@ -313,7 +313,8 @@ dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \ imx6dl-icore-rqs.dtb \ imx6q-icore.dtb \ imx6q-icore-rqs.dtb \ - imx6ul-geam-kit.dtb + imx6ul-geam-kit.dtb \ + imx6ul-isiot-mmc.dtb dtb-$(CONFIG_MX7) += imx7-colibri.dtbarch/arm/dts/imx6ul-isiot-mmc.dts new file +0
-0arch/arm/dts/imx6ul-isiot-mmc.dts line 9
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arch/arm/dts/imx6ul-isiot-mmc.dts new file +9
-0@@ -0,0 +1,50 @@ +/* + * Copyright (C) 2016 Amarula Solutions B.V. + * Copyright (C) 2016 Engicam S.r.l. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + *I have seen that a lot of files slipped into mainline, and I have myself not paid enough attention befeore (see your
imx6ul-geam-kit.dtsfor example).Quoted 4 lines
But we moved some years ago to SPDX-License-Identifier. Other DTS files are using this as well without copying the whole license. Could you do this here, too ? It would be also nice if you plan to fix this for all Engicam's boards, thanks !
Quoted 6 lines
Yes for boards, I will prepare patch.
For devicetress, since the base dtsi files copied from Linux, we keep the license as it is. I am not sure all other dts(i) files use the SPDX-License-Identifier. example imx6sll-evk, imx6ull-14x14-evk and all sunxi .
It is true that some files slipped into mainline copying again all license stuff - and several files ported from Linux was adjusting for SPDX.
Tom, what do you think ?
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arch/arm/dts/imx6ul-isiot-mmc.dts new file +9
-0+ +/dts-v1/; + +#include "imx6ul-isiot.dtsi" + +/ { + model = "Engicam Is.IoT MX6UL MMC Starterkit"; + compatible = "engicam,imx6ul-isiot", "fsl,imx6ul"; +};arch/arm/dts/imx6ul-isiot.dtsi new file +0
-0arch/arm/dts/imx6ul-isiot.dtsi line 3
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arch/arm/dts/imx6ul-isiot.dtsi new file +3
-0@@ -0,0 +1,92 @@ +/* + * Copyright (C) 2016 Amarula Solutions B.V. + * Copyright (C) 2016 Engicam S.r.l.Ditto.
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board/engicam/isiotmx6ul/Kconfig new file +12
-0@@ -0,0 +1,12 @@ +if TARGET_MX6UL_ISIOT + +config SYS_BOARD + default "isiotmx6ul" + +config SYS_VENDOR + default "engicam" + +config SYS_CONFIG_NAME + default "imx6ul_isiot" + +endifboard/engicam/isiotmx6ul/MAINTAINERS new file +0
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board/engicam/isiotmx6ul/MAINTAINERS line 6
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board/engicam/isiotmx6ul/MAINTAINERS new file +6
-0+GEAM6UL BOARD +M: Jagan Teki <[email protected]> +S: Maintained +F: board/engicam/isiotmx6ul +F: include/configs/imx6ul_isiot.h +F: configs/imx6ul_isiot_mmc_defconfigShould you not add the DTS files ?
Good idea, I will add.
Quoted 261 lines
Quoted 261 lines
board/engicam/isiotmx6ul/Makefile new file +6
-0@@ -0,0 +1,6 @@ +# Copyright (C) 2016 Amarula Solutions B.V. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := isiotmx6ul.oboard/engicam/isiotmx6ul/README new file +28
-0@@ -0,0 +1,28 @@ +How to use U-Boot on Engicam Is.IoT MX6UL Starter Kit: +----------------------------------------------------- + +- Configure U-Boot for Engicam Is.IoT MX6UL + +$ make mrproper +$ make imx6ul_isiot_mmc_defconfig +$ make + +This will generate the SPL image called SPL and the u-boot-dtb.img. + +- Flash the SPL image into the micro SD card: + +sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1; sync + +- Flash the u-boot-dtb.img image into the micro SD card: + +sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 bs=1k seek=69; sync + +- Jumper settings: + +MMC Boot: JM3 Closed + +- Connect the Serial cable between the Starter Kit and the PC for the console. +(J28 is the Linux Serial console connector) + +- Insert the micro SD card in the board, power it up and U-Boot messages should +come up.board/engicam/isiotmx6ul/isiotmx6ul.c new file +208
-0@@ -0,0 +1,247 @@ +/* +* Copyright (C) 2016 Amarula Solutions B.V. +* Copyright (C) 2016 Engicam S.r.l. +* Author: Jagan Teki <[email protected]> +* +* SPDX-License-Identifier: GPL-2.0+ +*/ + +#include <common.h> + +#include <asm/io.h> +#include <asm/gpio.h> +#include <linux/sizes.h> + +#include <asm/arch/clock.h> +#include <asm/arch/crm_regs.h> +#include <asm/arch/iomux.h> +#include <asm/arch/mx6-pins.h> +#include <asm/arch/sys_proto.h> +#include <asm/imx-common/iomux-v3.h> + +DECLARE_GLOBAL_DATA_PTR ; + +#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +static iomux_v3_cfg_t const uart1_pads[] = { +MX6_PAD_UART1_TX_DATA__UART1_DCE_TX |MUX_PAD_CTRL (UART_PAD_CTRL ), +MX6_PAD_UART1_RX_DATA__UART1_DCE_RX |MUX_PAD_CTRL (UART_PAD_CTRL ), +}; + +int board_early_init_f (void ) +{ +imx_iomux_v3_setup_multiple_pads (uart1_pads,ARRAY_SIZE (uart1_pads)); + +return 0 ; +} + +int board_init (void ) +{ +/* Address of boot parameters */ + gd->bd->bi_boot_params =PHYS_SDRAM +0x100 ; + +return 0 ; +} + +int dram_init (void ) +{ + gd->ram_size =imx_ddr_size (); + +return 0 ; +} + +#ifdef CONFIG_SPL_BUILD +#include <libfdt.h> +#include <spl.h> + +#include <asm/arch/crm_regs.h> +#include <asm/arch/mx6-ddr.h> + +/* MMC board initialization is needed till adding DM support in SPL */ +#if defined(CONFIG_FSL_ESDHC ) && !defined(CONFIG_DM_MMC ) +#include <mmc.h> +#include <fsl_esdhc.h> + +#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \ + PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +static iomux_v3_cfg_t const usdhc1_pads[] = { +MX6_PAD_SD1_CLK__USDHC1_CLK |MUX_PAD_CTRL (USDHC_PAD_CTRL ), +MX6_PAD_SD1_CMD__USDHC1_CMD |MUX_PAD_CTRL (USDHC_PAD_CTRL ), +MX6_PAD_SD1_DATA0__USDHC1_DATA0 |MUX_PAD_CTRL (USDHC_PAD_CTRL ), +MX6_PAD_SD1_DATA1__USDHC1_DATA1 |MUX_PAD_CTRL (USDHC_PAD_CTRL ), +MX6_PAD_SD1_DATA2__USDHC1_DATA2 |MUX_PAD_CTRL (USDHC_PAD_CTRL ), +MX6_PAD_SD1_DATA3__USDHC1_DATA3 |MUX_PAD_CTRL (USDHC_PAD_CTRL ), + +/* VSELECT */ +MX6_PAD_GPIO1_IO05__USDHC1_VSELECT |MUX_PAD_CTRL (USDHC_PAD_CTRL ), +/* CD */ +MX6_PAD_UART1_RTS_B__GPIO1_IO19 |MUX_PAD_CTRL (NO_PAD_CTRL ), +/* RST_B */ +MX6_PAD_GPIO1_IO09__GPIO1_IO09 |MUX_PAD_CTRL (NO_PAD_CTRL ), +}; + +#define USDHC1_CD_GPIO IMX_GPIO_NR(1, 19) + +struct fsl_esdhc_cfg usdhc_cfg[1 ] = { + {USDHC1_BASE_ADDR ,0 ,4 }, +}; + +int board_mmc_getcd (struct mmc *mmc) +{ +struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; +int ret =0 ; + +switch (cfg->esdhc_base) { +case USDHC1_BASE_ADDR : + ret = !gpio_get_value (USDHC1_CD_GPIO ); +break ; + } + +return ret; +} + +int board_mmc_init (bd_t *bis) +{ +int i, ret; + +/* +* According to the board_mmc_init() the following map is done: +* (U-boot device node) (Physical Port) +* mmc0 USDHC1 +*/ +for (i =0 ; i <CONFIG_SYS_FSL_USDHC_NUM ; i++) { +switch (i) { +case 0 : +imx_iomux_v3_setup_multiple_pads ( + usdhc1_pads,ARRAY_SIZE (usdhc1_pads)); +gpio_direction_input (USDHC1_CD_GPIO ); + usdhc_cfg[i].sdhc_clk =mxc_get_clock (MXC_ESDHC_CLK ); +break ; +default : +printf ("Warning - USDHC%d controller not supporting\n" , + i +1 ); +return 0 ; + } + + ret =fsl_esdhc_initialize (bis, &usdhc_cfg[i]); +if (ret) { +printf ("Warning: failed to initialize mmc dev %d\n" , i); +return ret; + } + } + +return 0 ; +} +#endif /* CONFIG_FSL_ESDHC */ + +static struct mx6ul_iomux_grp_regs mx6_grp_ioregs = { + .grp_addds =0x00000030 , + .grp_ddrmode_ctl =0x00020000 , + .grp_b0ds =0x00000030 , + .grp_ctlds =0x00000030 , + .grp_b1ds =0x00000030 , + .grp_ddrpke =0x00000000 , + .grp_ddrmode =0x00020000 , + .grp_ddr_type =0x000c0000 , +}; + +static struct mx6ul_iomux_ddr_regs mx6_ddr_ioregs = { + .dram_dqm0 =0x00000030 , + .dram_dqm1 =0x00000030 , + .dram_ras =0x00000030 , + .dram_cas =0x00000030 , + .dram_odt0 =0x00000030 , + .dram_odt1 =0x00000030 , + .dram_sdba2 =0x00000000 , + .dram_sdclk_0 =0x00000008 , + .dram_sdqs0 =0x00000038 , + .dram_sdqs1 =0x00000030 , + .dram_reset =0x00000030 , +}; + +static struct mx6_mmdc_calibration mx6_mmcd_calib = { + .p0_mpwldectrl0 =0x00070007 , + .p0_mpdgctrl0 =0x41490145 , + .p0_mprddlctl =0x40404546 , + .p0_mpwrdlctl =0x4040524D , +}; + +struct mx6_ddr_sysinfo ddr_sysinfo = { + .dsize =0 , + .cs_density =20 , + .ncs =1 , + .cs1_mirror =0 , + .rtt_wr =2 , + .rtt_nom =1 ,/* RTT_Nom = RZQ/2 */ + .walat =1 ,/* Write additional latency */ + .ralat =5 ,/* Read additional latency */ + .mif3_mode =3 ,/* Command prediction working mode */ + .bi_on =1 ,/* Bank interleaving enabled */ + .sde_to_rst =0x10 ,/* 14 cycles, 200us (JEDEC default) */ + .rst_to_cke =0x23 ,/* 33 cycles, 500us (JEDEC default) */ + .ddr_type =DDR_TYPE_DDR3 , +}; + +static struct mx6_ddr3_cfg mem_ddr = { + .mem_speed =800 , + .density =4 , + .width =16 , + .banks =8 , + .rowaddr =15 , + .coladdr =10 , + .pagesz =2 , + .trcd =1375 , + .trcmin =4875 , + .trasmin =3500 , +}; + +static void ccgr_init (void ) +{ +struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR ; + +writel (0xFFFFFFFF , &ccm->CCGR0); +writel (0xFFFFFFFF , &ccm->CCGR1); +writel (0xFFFFFFFF , &ccm->CCGR2);Quoted 8 lines
board/engicam/isiotmx6ul/isiotmx6ul.c line 213
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board/engicam/isiotmx6ul/isiotmx6ul.c new file +5
-0+writel (0xFFFFFFFF , &ccm->CCGR3); +writel (0xFFFFFFFF , &ccm->CCGR4); +writel (0xFFFFFFFF , &ccm->CCGR5); +writel (0xFFFFFFFF , &ccm->CCGR6); +writel (0xFFFFFFFF , &ccm->CCGR7);Just a mention here: why do you activate all clocks instead of just what you really need ?
Quoted 2 lines
May be yes, but it's better to have full clock initialization so-that nothing broke during SPL runtime.
You are the board maintainer, and it is your decision. Anyway, clocks are not disable in u-boot, and they can remain on in Linux, because they are set just if needed. Some kernels had disabled in the past for some platform (I know OMAP3) all not required clocks, but this was in the era before DT. Kernel just supposes that nothing is set.
Best regards,
Stefano Babic
PATCH v4 2/9 arm: imx6ul: Add Engicam Is.IoT MX6UL Starter Kit initial support
Hi
On 28 Jan 2017 1:25 p.m., "Stefano Babic" <[email protected]> wrote:
Hi Jagan, Tom,
Quoted 29 lines · Jagan Teki
Quoted 28 lines · Stefano Babic
Hi Jagan,
Quoted 25 lines · Jagan Teki
From: Jagan Teki <[email protected]>
Boot from MMC:
-------------
U-Boot SPL 2017.01-rc2-gba3c151-dirty (Jan 02 2017 - 16:59:33) Trying to boot from MMC1U-Boot 2017.01-rc2-gba3c151-dirty (Jan 02 2017 - 16:59:33 +0100)
CPU: Freescale i.MX6UL rev1.1 528 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 33C Reset cause: POR Model: Engicam Is.IoT MX6UL Starterkit DRAM: 512 MiB MMC: FSL_SDHC: 0*** Warning - bad CRC, using default environment
In: serial Out: serial Err: serial Net: CPU Net Initialization FailedNo ethernet found.
Hit any key to stop autoboot: 0
isiotmx6ul>
Quoted 14 lines
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Cc Stefano Babic <[email protected]>Cc Matteo Lisi <[email protected]>Cc Michael Trimarchi <[email protected]>Signed-off-by Jagan Teki <[email protected]>--- arch/arm/cpu/armv7/mx6/Kconfig | 11 ++Quoted 8 lines
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arch/arm/dts/Makefile | 3 +- arch/arm/dts/imx6ul-isiot-mmc.dts | 50 +++++++ arch/arm/dts/imx6ul-isiot.dtsi | 92 +++++++++++++ board/engicam/isiotmx6ul/Kconfig | 12 ++ board/engicam/isiotmx6ul/MAINTAINERS | 6 + board/engicam/isiotmx6ul/Makefile | 6 + board/engicam/isiotmx6ul/README | 28 ++++ board/engicam/isiotmx6ul/isiotmx6ul.c | 247
++++++++++++++++++++++++++++++++++
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configs/imx6ul_isiot_mmc_defconfig | 36 +++++ include/configs/imx6ul_isiot.h | 142 +++++++++++++++++++ 11 files changed, 632 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/imx6ul-isiot-mmc.dts create mode 100644 arch/arm/dts/imx6ul-isiot.dtsi create mode 100644 board/engicam/isiotmx6ul/Kconfig create mode 100644 board/engicam/isiotmx6ul/MAINTAINERS create mode 100644 board/engicam/isiotmx6ul/Makefile create mode 100644 board/engicam/isiotmx6ul/README create mode 100644 board/engicam/isiotmx6ul/isiotmx6ul.c create mode 100644 configs/imx6ul_isiot_mmc_defconfig create mode 100644 include/configs/imx6ul_isiot.h
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arch/arm/cpu/armv7/mx6/
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arch/arm/cpu/armv7/mx6/ renamed from arch/arm/cpu/armv7/mx6/Kconfig +0
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Kconfig
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index c646966..72780d7 100644
arch/arm/cpu/armv7/mx6/Kconfig +11
-0@@ -205,6 +205,16 @@ config TARGET_MX6UL_GEAM select DM_THERMAL select SUPPORT_SPL +config TARGET_MX6UL_ISIOT + bool "Support Engicam Is.IoT MX6UL" + select MX6UL + select OF_CONTROL + select DM + select DM_GPIO + select DM_MMC + select DM_THERMAL + select SUPPORT_SPL + config TARGET_MX6ULL_14X14_EVK bool "Support mx6ull_14x14_evk" select MX6ULL@@ -313,6 +323,7 @@ source "board/embest/mx6boards/Kconfig" source "board/engicam/geam6ul/Kconfig" source "board/engicam/icorem6/Kconfig" source "board/engicam/icorem6_rqs/Kconfig" +source "board/engicam/isiotmx6ul/Kconfig" source "board/freescale/mx6qarm2/Kconfig" source "board/freescale/mx6qsabreauto/Kconfig" source "board/freescale/mx6sabresd/Kconfig"arch/arm/dts/Makefile +2
-1@@ -313,7 +313,8 @@ dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \ imx6dl-icore-rqs.dtb \ imx6q-icore.dtb \ imx6q-icore-rqs.dtb \ - imx6ul-geam-kit.dtb + imx6ul-geam-kit.dtb \ + imx6ul-isiot-mmc.dtb
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arch/arm/dts/Makefile +0
-0dtb-$(CONFIG_MX7) += imx7-colibri.dtb(quoted diff) +0
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b/arch/arm/dts/imx6ul-isiot-mmc.dts
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new file mode 100644
index 0000000..bb5086aarch/arm/dts/imx6ul-isiot-mmc.dts line 9
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arch/arm/dts/imx6ul-isiot-mmc.dts new file +9
-0@@ -0,0 +1,50 @@ +/* + * Copyright (C) 2016 Amarula Solutions B.V. + * Copyright (C) 2016 Engicam S.r.l. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + *I have seen that a lot of files slipped into mainline, and I have myself not paid enough attention befeore (see your
imx6ul-geam-kit.dtsfor example).Quoted 4 lines
But we moved some years ago to SPDX-License-Identifier. Other DTS files are using this as well without copying the whole license. Could you do this here, too ? It would be also nice if you plan to fix this for all Engicam's boards, thanks !
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Yes for boards, I will prepare patch.
For devicetress, since the base dtsi files copied from Linux, we keep the license as it is. I am not sure all other dts(i) files use the SPDX-License-Identifier. example imx6sll-evk, imx6ull-14x14-evk and all sunxi .
It is true that some files slipped into mainline copying again all license stuff - and several files ported from Linux was adjusting for SPDX.
Tom, what do you think ?
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arch/arm/dts/imx6ul-isiot.
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arch/arm/dts/imx6ul-isiot-mmc.dts new file +9
-0+ +/dts-v1/; + +#include "imx6ul-isiot.dtsi" + +/ { + model = "Engicam Is.IoT MX6UL MMC Starterkit"; + compatible = "engicam,imx6ul-isiot", "fsl,imx6ul"; +};arch/arm/dts/imx6ul-isiot. renamed from arch/arm/dts/imx6ul-isiot.dtsi +0
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dtsi
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arch/arm/dts/imx6ul-isiot.dtsi line 3
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new file mode 100644
index 0000000..6108a1aarch/arm/dts/imx6ul-isiot.dtsi new file +3
-0@@ -0,0 +1,92 @@ +/* + * Copyright (C) 2016 Amarula Solutions B.V. + * Copyright (C) 2016 Engicam S.r.l.Ditto.
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b/board/engicam/isiotmx6ul/Kconfig
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new file mode 100644
index 0000000..213ffadboard/engicam/isiotmx6ul/Kconfig new file +5
-0@@ -0,0 +1,12 @@ +if TARGET_MX6UL_ISIOT + +config SYS_BOARD + default "isiotmx6ul" +
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board/engicam/isiotmx6ul/Kconfig new file +7
-0+config SYS_VENDOR + default "engicam" + +config SYS_CONFIG_NAME + default "imx6ul_isiot" + +endif(quoted diff) +0
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b/board/engicam/isiotmx6ul/MAINTAINERS
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new file mode 100644
index 0000000..0258531board/engicam/isiotmx6ul/MAINTAINERS new file +0
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board/engicam/isiotmx6ul/MAINTAINERS line 6
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board/engicam/isiotmx6ul/MAINTAINERS new file +6
-0+GEAM6UL BOARD +M: Jagan Teki <[email protected]> +S: Maintained +F: board/engicam/isiotmx6ul +F: include/configs/imx6ul_isiot.h +F: configs/imx6ul_isiot_mmc_defconfigShould you not add the DTS files ?
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Good idea, I will add.
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b/board/engicam/isiotmx6ul/Makefile
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new file mode 100644
index 0000000..f4f8c78board/engicam/isiotmx6ul/Makefile new file +0
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board/engicam/isiotmx6ul/
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board/engicam/isiotmx6ul/Makefile new file +6
-0@@ -0,0 +1,6 @@ +# Copyright (C) 2016 Amarula Solutions B.V. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := isiotmx6ul.oboard/engicam/isiotmx6ul/ renamed from board/engicam/isiotmx6ul/README +0
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README
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new file mode 100644
index 0000000..1d177acboard/engicam/isiotmx6ul/README new file +16
-0@@ -0,0 +1,28 @@ +How to use U-Boot on Engicam Is.IoT MX6UL Starter Kit: +----------------------------------------------------- + +- Configure U-Boot for Engicam Is.IoT MX6UL + +$ make mrproper +$ make imx6ul_isiot_mmc_defconfig +$ make + +This will generate the SPL image called SPL and the u-boot-dtb.img. + +- Flash the SPL image into the micro SD card: + +sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1; sync + +- Flash the u-boot-dtb.img image into the micro SD card:
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board/engicam/isiotmx6ul/README
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board/engicam/isiotmx6ul/README new file +8
-0+ +sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 bs=1k seek=69; sync + +- Jumper settings: + +MMC Boot: JM3 Closed + +- Connect the Serial cable between the Starter Kit and the PC for the
console.
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board/engicam/isiotmx6ul/README
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board/engicam/isiotmx6ul/README new file +3
-0+(J28 is the Linux Serial console connector) + +- Insert the micro SD card in the board, power it up and U-Boot
messages should
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board/engicam/isiotmx6ul/README new file +1
-0+come up.(quoted diff) +0
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b/board/engicam/isiotmx6ul/isiotmx6ul.c
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index 0000000..c0b18c3board/engicam/isiotmx6ul/isiotmx6ul.c new file +18
-0@@ -0,0 +1,247 @@ +/* +* Copyright (C) 2016 Amarula Solutions B.V. +* Copyright (C) 2016 Engicam S.r.l. +* Author: Jagan Teki <[email protected]> +* +* SPDX-License-Identifier: GPL-2.0+ +*/ + +#include <common.h> + +#include <asm/io.h> +#include <asm/gpio.h> +#include <linux/sizes.h> + +#include <asm/arch/clock.h> +#include <asm/arch/crm_regs.h> +#include <asm/arch/iomux.h> +#include <asm/arch/mx6-pins.h>
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board/engicam/isiotmx6ul/isiotmx6ul.c
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board/engicam/isiotmx6ul/isiotmx6ul.c new file +8
-0+#include <asm/arch/sys_proto.h> +#include <asm/imx-common/iomux-v3.h> + +DECLARE_GLOBAL_DATA_PTR ; + +#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST |
PAD_CTL_HYS)
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board/engicam/isiotmx6ul/isiotmx6ul.c
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board/engicam/isiotmx6ul/isiotmx6ul.c new file +9
-0+ +static iomux_v3_cfg_t const uart1_pads[] = { +MX6_PAD_UART1_TX_DATA__UART1_DCE_TX |MUX_PAD_CTRL (UART_PAD_CTRL ), +MX6_PAD_UART1_RX_DATA__UART1_DCE_RX |MUX_PAD_CTRL (UART_PAD_CTRL ), +}; + +int board_early_init_f (void ) +{ + imx_iomux_v3_setup_multiple_pads(uart1_pads,
ARRAY_SIZE(uart1_pads));
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board/engicam/isiotmx6ul/isiotmx6ul.c new file +79
-0+ +return 0 ; +} + +int board_init (void ) +{ +/* Address of boot parameters */ + gd->bd->bi_boot_params =PHYS_SDRAM +0x100 ; + +return 0 ; +} + +int dram_init (void ) +{ + gd->ram_size =imx_ddr_size (); + +return 0 ; +} + +#ifdef CONFIG_SPL_BUILD +#include <libfdt.h> +#include <spl.h> + +#include <asm/arch/crm_regs.h> +#include <asm/arch/mx6-ddr.h> + +/* MMC board initialization is needed till adding DM support in SPL */ +#if defined(CONFIG_FSL_ESDHC) && !defined(CONFIG_DM_MMC) +#include <mmc.h> +#include <fsl_esdhc.h> + +#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \ + PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +static iomux_v3_cfg_t const usdhc1_pads[] = { + MX6_PAD_SD1_CLK__USDHC1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD1_CMD__USDHC1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD1_DATA0__USDHC1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD1_DATA1__USDHC1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD1_DATA2__USDHC1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD1_DATA3__USDHC1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + + /* VSELECT */ + MX6_PAD_GPIO1_IO05__USDHC1_VSELECT | MUX_PAD_CTRL(USDHC_PAD_CTRL), + /* CD */ + MX6_PAD_UART1_RTS_B__GPIO1_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* RST_B */ + MX6_PAD_GPIO1_IO09__GPIO1_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +#define USDHC1_CD_GPIO IMX_GPIO_NR(1, 19) + +struct fsl_esdhc_cfg usdhc_cfg[1] = { + {USDHC1_BASE_ADDR, 0, 4}, +}; + +int board_mmc_getcd(struct mmc *mmc) +{ + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + int ret = 0; + + switch (cfg->esdhc_base) { + case USDHC1_BASE_ADDR: + ret = !gpio_get_value(USDHC1_CD_GPIO); + break; + } + + return ret; +} + +int board_mmc_init(bd_t *bis) +{ + int i, ret; + + /* + * According to the board_mmc_init() the following map is done: + * (U-boot device node) (Physical Port) + * mmc0 USDHC1
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board/engicam/isiotmx6ul/isiotmx6ul.c
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board/engicam/isiotmx6ul/isiotmx6ul.c new file +8
-0+*/ +for (i =0 ; i <CONFIG_SYS_FSL_USDHC_NUM ; i++) { +switch (i) { +case 0 : +imx_iomux_v3_setup_multiple_pads ( + usdhc1_pads,ARRAY_SIZE (usdhc1_pads)); +gpio_direction_input (USDHC1_CD_GPIO ); + usdhc_cfg[i].sdhc_clk =
mxc_get_clock(MXC_ESDHC_CLK);
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board/engicam/isiotmx6ul/isiotmx6ul.c
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board/engicam/isiotmx6ul/isiotmx6ul.c new file +3
-0+break ; +default : + printf("Warning - USDHC%d controller not
supporting\n",
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board/engicam/isiotmx6ul/isiotmx6ul.c
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board/engicam/isiotmx6ul/isiotmx6ul.c new file +7
-0+ i + 1); +return 0 ; + } + + ret =fsl_esdhc_initialize (bis, &usdhc_cfg[i]); +if (ret) { + printf("Warning: failed to initialize mmc dev
%d\n", i);
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board/engicam/isiotmx6ul/isiotmx6ul.c new file +76
-0+ return ret; + } + } + +return 0 ; +} +#endif /* CONFIG_FSL_ESDHC */ + +static struct mx6ul_iomux_grp_regs mx6_grp_ioregs = { + .grp_addds =0x00000030 , + .grp_ddrmode_ctl =0x00020000 , + .grp_b0ds =0x00000030 , + .grp_ctlds =0x00000030 , + .grp_b1ds =0x00000030 , + .grp_ddrpke =0x00000000 , + .grp_ddrmode =0x00020000 , + .grp_ddr_type =0x000c0000 , +}; + +static struct mx6ul_iomux_ddr_regs mx6_ddr_ioregs = { + .dram_dqm0 =0x00000030 , + .dram_dqm1 =0x00000030 , + .dram_ras =0x00000030 , + .dram_cas =0x00000030 , + .dram_odt0 =0x00000030 , + .dram_odt1 =0x00000030 , + .dram_sdba2 =0x00000000 , + .dram_sdclk_0 =0x00000008 , + .dram_sdqs0 =0x00000038 , + .dram_sdqs1 =0x00000030 , + .dram_reset =0x00000030 , +}; + +static struct mx6_mmdc_calibration mx6_mmcd_calib = { + .p0_mpwldectrl0 =0x00070007 , + .p0_mpdgctrl0 =0x41490145 , + .p0_mprddlctl =0x40404546 , + .p0_mpwrdlctl =0x4040524D , +}; + +struct mx6_ddr_sysinfo ddr_sysinfo = { + .dsize =0 , + .cs_density =20 , + .ncs =1 , + .cs1_mirror =0 , + .rtt_wr =2 , + .rtt_nom =1 ,/* RTT_Nom = RZQ/2 */ + .walat =1 ,/* Write additional latency */ + .ralat =5 ,/* Read additional latency */ + .mif3_mode =3 ,/* Command prediction working mode */ + .bi_on =1 ,/* Bank interleaving enabled */ + .sde_to_rst =0x10 ,/* 14 cycles, 200us (JEDEC default) */ + .rst_to_cke =0x23 ,/* 33 cycles, 500us (JEDEC default) */ + .ddr_type =DDR_TYPE_DDR3 , +}; + +static struct mx6_ddr3_cfg mem_ddr = { + .mem_speed =800 , + .density =4 , + .width =16 , + .banks =8 , + .rowaddr =15 , + .coladdr =10 , + .pagesz =2 , + .trcd =1375 , + .trcmin =4875 , + .trasmin =3500 , +}; + +static void ccgr_init (void ) +{ +struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR ; + +writel (0xFFFFFFFF , &ccm->CCGR0); +writel (0xFFFFFFFF , &ccm->CCGR1); +writel (0xFFFFFFFF , &ccm->CCGR2);Quoted 8 lines
board/engicam/isiotmx6ul/isiotmx6ul.c line 213
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board/engicam/isiotmx6ul/isiotmx6ul.c new file +5
-0+writel (0xFFFFFFFF , &ccm->CCGR3); +writel (0xFFFFFFFF , &ccm->CCGR4); +writel (0xFFFFFFFF , &ccm->CCGR5); +writel (0xFFFFFFFF , &ccm->CCGR6); +writel (0xFFFFFFFF , &ccm->CCGR7);Just a mention here: why do you activate all clocks instead of just what you really need ?
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May be yes, but it's better to have full clock initialization so-that nothing broke during SPL runtime.
You are the board maintainer, and it is your decision. Anyway, clocks are not disable in u-boot, and they can remain on in Linux, because they are set just if needed. Some kernels had disabled in the past for some platform (I know OMAP3) all not required clocks, but this was in the era before DT. Kernel just supposes that nothing is set.
I agree with Stefano. Clocks part should clean up. We have done in the past for OMAP architecture
Michael
Best regards,
Stefano Babic
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PATCH v4 2/9 arm: imx6ul: Add Engicam Is.IoT MX6UL Starter Kit initial support
Quoted 502 lines · Michael Nazzareno Trimarchi
Hi
On 28 Jan 2017 1:25 p.m., "Stefano Babic" <[email protected]> wrote:
Hi Jagan, Tom,
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Hi Jagan,
Quoted 25 lines · Jagan Teki
From: Jagan Teki <[email protected]>
Boot from MMC:
-------------
U-Boot SPL 2017.01-rc2-gba3c151-dirty (Jan 02 2017 - 16:59:33) Trying to boot from MMC1U-Boot 2017.01-rc2-gba3c151-dirty (Jan 02 2017 - 16:59:33 +0100)
CPU: Freescale i.MX6UL rev1.1 528 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 33C Reset cause: POR Model: Engicam Is.IoT MX6UL Starterkit DRAM: 512 MiB MMC: FSL_SDHC: 0*** Warning - bad CRC, using default environment
In: serial Out: serial Err: serial Net: CPU Net Initialization FailedNo ethernet found.
Hit any key to stop autoboot: 0
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Cc Stefano Babic <[email protected]>Cc Matteo Lisi <[email protected]>Cc Michael Trimarchi <[email protected]>Signed-off-by Jagan Teki <[email protected]>--- arch/arm/cpu/armv7/mx6/Kconfig | 11 ++Quoted 8 lines
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arch/arm/dts/Makefile | 3 +- arch/arm/dts/imx6ul-isiot-mmc.dts | 50 +++++++ arch/arm/dts/imx6ul-isiot.dtsi | 92 +++++++++++++ board/engicam/isiotmx6ul/Kconfig | 12 ++ board/engicam/isiotmx6ul/MAINTAINERS | 6 + board/engicam/isiotmx6ul/Makefile | 6 + board/engicam/isiotmx6ul/README | 28 ++++ board/engicam/isiotmx6ul/isiotmx6ul.c | 247++++++++++++++++++++++++++++++++++
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configs/imx6ul_isiot_mmc_defconfig | 36 +++++ include/configs/imx6ul_isiot.h | 142 +++++++++++++++++++ 11 files changed, 632 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/imx6ul-isiot-mmc.dts create mode 100644 arch/arm/dts/imx6ul-isiot.dtsi create mode 100644 board/engicam/isiotmx6ul/Kconfig create mode 100644 board/engicam/isiotmx6ul/MAINTAINERS create mode 100644 board/engicam/isiotmx6ul/Makefile create mode 100644 board/engicam/isiotmx6ul/README create mode 100644 board/engicam/isiotmx6ul/isiotmx6ul.c create mode 100644 configs/imx6ul_isiot_mmc_defconfig create mode 100644 include/configs/imx6ul_isiot.hQuoted 1 line
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arch/arm/cpu/armv7/mx6/
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arch/arm/cpu/armv7/mx6/ renamed from arch/arm/cpu/armv7/mx6/Kconfig +0
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KconfigQuoted 40 lines
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index c646966..72780d7 100644
arch/arm/cpu/armv7/mx6/Kconfig +11
-0@@ -205,6 +205,16 @@ config TARGET_MX6UL_GEAM select DM_THERMAL select SUPPORT_SPL +config TARGET_MX6UL_ISIOT + bool "Support Engicam Is.IoT MX6UL" + select MX6UL + select OF_CONTROL + select DM + select DM_GPIO + select DM_MMC + select DM_THERMAL + select SUPPORT_SPL + config TARGET_MX6ULL_14X14_EVK bool "Support mx6ull_14x14_evk" select MX6ULL@@ -313,6 +323,7 @@ source "board/embest/mx6boards/Kconfig" source "board/engicam/geam6ul/Kconfig" source "board/engicam/icorem6/Kconfig" source "board/engicam/icorem6_rqs/Kconfig" +source "board/engicam/isiotmx6ul/Kconfig" source "board/freescale/mx6qarm2/Kconfig" source "board/freescale/mx6qsabreauto/Kconfig" source "board/freescale/mx6sabresd/Kconfig"arch/arm/dts/Makefile +2
-1@@ -313,7 +313,8 @@ dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \ imx6dl-icore-rqs.dtb \ imx6q-icore.dtb \ imx6q-icore-rqs.dtb \ - imx6ul-geam-kit.dtb + imx6ul-geam-kit.dtb \ + imx6ul-isiot-mmc.dtbQuoted 3 lines
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arch/arm/dts/Makefile +0
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new file mode 100644
index 0000000..bb5086aarch/arm/dts/imx6ul-isiot-mmc.dts line 9
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arch/arm/dts/imx6ul-isiot-mmc.dts new file +9
-0@@ -0,0 +1,50 @@ +/* + * Copyright (C) 2016 Amarula Solutions B.V. + * Copyright (C) 2016 Engicam S.r.l. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + *I have seen that a lot of files slipped into mainline, and I have myself not paid enough attention befeore (see your
imx6ul-geam-kit.dtsfor example).Quoted 4 lines
But we moved some years ago to SPDX-License-Identifier. Other DTS files are using this as well without copying the whole license. Could you do this here, too ? It would be also nice if you plan to fix this for all Engicam's boards, thanks !
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Yes for boards, I will prepare patch.
For devicetress, since the base dtsi files copied from Linux, we keep the license as it is. I am not sure all other dts(i) files use the SPDX-License-Identifier. example imx6sll-evk, imx6ull-14x14-evk and all sunxi .
It is true that some files slipped into mainline copying again all license stuff - and several files ported from Linux was adjusting for SPDX.
Tom, what do you think ?
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arch/arm/dts/imx6ul-isiot.
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arch/arm/dts/imx6ul-isiot-mmc.dts new file +9
-0+ +/dts-v1/; + +#include "imx6ul-isiot.dtsi" + +/ { + model = "Engicam Is.IoT MX6UL MMC Starterkit"; + compatible = "engicam,imx6ul-isiot", "fsl,imx6ul"; +};arch/arm/dts/imx6ul-isiot. renamed from arch/arm/dts/imx6ul-isiot.dtsi +0
-0dtsi
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arch/arm/dts/imx6ul-isiot.dtsi line 3
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new file mode 100644
index 0000000..6108a1aarch/arm/dts/imx6ul-isiot.dtsi new file +3
-0@@ -0,0 +1,92 @@ +/* + * Copyright (C) 2016 Amarula Solutions B.V. + * Copyright (C) 2016 Engicam S.r.l.Ditto.
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Review
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-0b/board/engicam/isiotmx6ul/Kconfig
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new file mode 100644
index 0000000..213ffadboard/engicam/isiotmx6ul/Kconfig new file +5
-0@@ -0,0 +1,12 @@ +if TARGET_MX6UL_ISIOT + +config SYS_BOARD + default "isiotmx6ul" +Quoted 8 lines
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board/engicam/isiotmx6ul/Kconfig new file +7
-0+config SYS_VENDOR + default "engicam" + +config SYS_CONFIG_NAME + default "imx6ul_isiot" + +endif(quoted diff) +0
-0b/board/engicam/isiotmx6ul/MAINTAINERS
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new file mode 100644
index 0000000..0258531board/engicam/isiotmx6ul/MAINTAINERS new file +0
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board/engicam/isiotmx6ul/MAINTAINERS line 6
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board/engicam/isiotmx6ul/MAINTAINERS new file +6
-0+GEAM6UL BOARD +M: Jagan Teki <[email protected]> +S: Maintained +F: board/engicam/isiotmx6ul +F: include/configs/imx6ul_isiot.h +F: configs/imx6ul_isiot_mmc_defconfigShould you not add the DTS files ?
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Good idea, I will add.
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-0b/board/engicam/isiotmx6ul/Makefile
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new file mode 100644
index 0000000..f4f8c78board/engicam/isiotmx6ul/Makefile new file +0
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board/engicam/isiotmx6ul/
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board/engicam/isiotmx6ul/Makefile new file +6
-0@@ -0,0 +1,6 @@ +# Copyright (C) 2016 Amarula Solutions B.V. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := isiotmx6ul.oboard/engicam/isiotmx6ul/ renamed from board/engicam/isiotmx6ul/README +0
-0README
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new file mode 100644
index 0000000..1d177acboard/engicam/isiotmx6ul/README new file +16
-0@@ -0,0 +1,28 @@ +How to use U-Boot on Engicam Is.IoT MX6UL Starter Kit: +----------------------------------------------------- + +- Configure U-Boot for Engicam Is.IoT MX6UL + +$ make mrproper +$ make imx6ul_isiot_mmc_defconfig +$ make + +This will generate the SPL image called SPL and the u-boot-dtb.img. + +- Flash the SPL image into the micro SD card: + +sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1; sync + +- Flash the u-boot-dtb.img image into the micro SD card:Quoted 8 lines
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board/engicam/isiotmx6ul/README
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board/engicam/isiotmx6ul/README new file +8
-0+ +sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 bs=1k seek=69; sync + +- Jumper settings: + +MMC Boot: JM3 Closed + +- Connect the Serial cable between the Starter Kit and the PC for theconsole.
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board/engicam/isiotmx6ul/README
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board/engicam/isiotmx6ul/README new file +3
-0+(J28 is the Linux Serial console connector) + +- Insert the micro SD card in the board, power it up and U-Bootmessages should
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board/engicam/isiotmx6ul/README new file +1
-0+come up.(quoted diff) +0
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b/board/engicam/isiotmx6ul/isiotmx6ul.cQuoted 23 lines
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index 0000000..c0b18c3board/engicam/isiotmx6ul/isiotmx6ul.c new file +18
-0@@ -0,0 +1,247 @@ +/* +* Copyright (C) 2016 Amarula Solutions B.V. +* Copyright (C) 2016 Engicam S.r.l. +* Author: Jagan Teki <[email protected]> +* +* SPDX-License-Identifier: GPL-2.0+ +*/ + +#include <common.h> + +#include <asm/io.h> +#include <asm/gpio.h> +#include <linux/sizes.h> + +#include <asm/arch/clock.h> +#include <asm/arch/crm_regs.h> +#include <asm/arch/iomux.h> +#include <asm/arch/mx6-pins.h> Quoted 8 lines
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board/engicam/isiotmx6ul/isiotmx6ul.c
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board/engicam/isiotmx6ul/isiotmx6ul.c new file +8
-0+#include <asm/arch/sys_proto.h> +#include <asm/imx-common/iomux-v3.h> + +DECLARE_GLOBAL_DATA_PTR ; + +#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST |
PAD_CTL_HYS)Quoted 9 lines
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board/engicam/isiotmx6ul/isiotmx6ul.c
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board/engicam/isiotmx6ul/isiotmx6ul.c new file +9
-0+ +static iomux_v3_cfg_t const uart1_pads[] = { +MX6_PAD_UART1_TX_DATA__UART1_DCE_TX |MUX_PAD_CTRL (UART_PAD_CTRL ), +MX6_PAD_UART1_RX_DATA__UART1_DCE_RX |MUX_PAD_CTRL (UART_PAD_CTRL ), +}; + +int board_early_init_f (void ) +{ + imx_iomux_v3_setup_multiple_pads(uart1_pads,
ARRAY_SIZE(uart1_pads));Quoted 79 lines
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board/engicam/isiotmx6ul/isiotmx6ul.c new file +79
-0+ +return 0 ; +} + +int board_init (void ) +{ +/* Address of boot parameters */ + gd->bd->bi_boot_params =PHYS_SDRAM +0x100 ; + +return 0 ; +} + +int dram_init (void ) +{ + gd->ram_size =imx_ddr_size (); + +return 0 ; +} + +#ifdef CONFIG_SPL_BUILD +#include <libfdt.h> +#include <spl.h> + +#include <asm/arch/crm_regs.h> +#include <asm/arch/mx6-ddr.h> + +/* MMC board initialization is needed till adding DM support in SPL */ +#if defined(CONFIG_FSL_ESDHC) && !defined(CONFIG_DM_MMC) +#include <mmc.h> +#include <fsl_esdhc.h> + +#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \ + PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +static iomux_v3_cfg_t const usdhc1_pads[] = { + MX6_PAD_SD1_CLK__USDHC1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD1_CMD__USDHC1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD1_DATA0__USDHC1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD1_DATA1__USDHC1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD1_DATA2__USDHC1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD1_DATA3__USDHC1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + + /* VSELECT */ + MX6_PAD_GPIO1_IO05__USDHC1_VSELECT | MUX_PAD_CTRL(USDHC_PAD_CTRL), + /* CD */ + MX6_PAD_UART1_RTS_B__GPIO1_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* RST_B */ + MX6_PAD_GPIO1_IO09__GPIO1_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +#define USDHC1_CD_GPIO IMX_GPIO_NR(1, 19) + +struct fsl_esdhc_cfg usdhc_cfg[1] = { + {USDHC1_BASE_ADDR, 0, 4}, +}; + +int board_mmc_getcd(struct mmc *mmc) +{ + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + int ret = 0; + + switch (cfg->esdhc_base) { + case USDHC1_BASE_ADDR: + ret = !gpio_get_value(USDHC1_CD_GPIO); + break; + } + + return ret; +} + +int board_mmc_init(bd_t *bis) +{ + int i, ret; + + /* + * According to the board_mmc_init() the following map is done: + * (U-boot device node) (Physical Port) + * mmc0 USDHC1Quoted 8 lines
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board/engicam/isiotmx6ul/isiotmx6ul.c
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board/engicam/isiotmx6ul/isiotmx6ul.c new file +8
-0+*/ +for (i =0 ; i <CONFIG_SYS_FSL_USDHC_NUM ; i++) { +switch (i) { +case 0 : +imx_iomux_v3_setup_multiple_pads ( + usdhc1_pads,ARRAY_SIZE (usdhc1_pads)); +gpio_direction_input (USDHC1_CD_GPIO ); + usdhc_cfg[i].sdhc_clk =
mxc_get_clock(MXC_ESDHC_CLK);Quoted 3 lines
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board/engicam/isiotmx6ul/isiotmx6ul.c
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board/engicam/isiotmx6ul/isiotmx6ul.c new file +3
-0+break ; +default : + printf("Warning - USDHC%d controller notsupporting\n",
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board/engicam/isiotmx6ul/isiotmx6ul.c
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board/engicam/isiotmx6ul/isiotmx6ul.c new file +7
-0+ i + 1); +return 0 ; + } + + ret =fsl_esdhc_initialize (bis, &usdhc_cfg[i]); +if (ret) { + printf("Warning: failed to initialize mmc dev%d\n", i);
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board/engicam/isiotmx6ul/isiotmx6ul.c new file +76
-0+ return ret; + } + } + +return 0 ; +} +#endif /* CONFIG_FSL_ESDHC */ + +static struct mx6ul_iomux_grp_regs mx6_grp_ioregs = { + .grp_addds =0x00000030 , + .grp_ddrmode_ctl =0x00020000 , + .grp_b0ds =0x00000030 , + .grp_ctlds =0x00000030 , + .grp_b1ds =0x00000030 , + .grp_ddrpke =0x00000000 , + .grp_ddrmode =0x00020000 , + .grp_ddr_type =0x000c0000 , +}; + +static struct mx6ul_iomux_ddr_regs mx6_ddr_ioregs = { + .dram_dqm0 =0x00000030 , + .dram_dqm1 =0x00000030 , + .dram_ras =0x00000030 , + .dram_cas =0x00000030 , + .dram_odt0 =0x00000030 , + .dram_odt1 =0x00000030 , + .dram_sdba2 =0x00000000 , + .dram_sdclk_0 =0x00000008 , + .dram_sdqs0 =0x00000038 , + .dram_sdqs1 =0x00000030 , + .dram_reset =0x00000030 , +}; + +static struct mx6_mmdc_calibration mx6_mmcd_calib = { + .p0_mpwldectrl0 =0x00070007 , + .p0_mpdgctrl0 =0x41490145 , + .p0_mprddlctl =0x40404546 , + .p0_mpwrdlctl =0x4040524D , +}; + +struct mx6_ddr_sysinfo ddr_sysinfo = { + .dsize =0 , + .cs_density =20 , + .ncs =1 , + .cs1_mirror =0 , + .rtt_wr =2 , + .rtt_nom =1 ,/* RTT_Nom = RZQ/2 */ + .walat =1 ,/* Write additional latency */ + .ralat =5 ,/* Read additional latency */ + .mif3_mode =3 ,/* Command prediction working mode */ + .bi_on =1 ,/* Bank interleaving enabled */ + .sde_to_rst =0x10 ,/* 14 cycles, 200us (JEDEC default) */ + .rst_to_cke =0x23 ,/* 33 cycles, 500us (JEDEC default) */ + .ddr_type =DDR_TYPE_DDR3 , +}; + +static struct mx6_ddr3_cfg mem_ddr = { + .mem_speed =800 , + .density =4 , + .width =16 , + .banks =8 , + .rowaddr =15 , + .coladdr =10 , + .pagesz =2 , + .trcd =1375 , + .trcmin =4875 , + .trasmin =3500 , +}; + +static void ccgr_init (void ) +{ +struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR ; + +writel (0xFFFFFFFF , &ccm->CCGR0); +writel (0xFFFFFFFF , &ccm->CCGR1); +writel (0xFFFFFFFF , &ccm->CCGR2);Quoted 8 lines
board/engicam/isiotmx6ul/isiotmx6ul.c line 213
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board/engicam/isiotmx6ul/isiotmx6ul.c new file +5
-0+writel (0xFFFFFFFF , &ccm->CCGR3); +writel (0xFFFFFFFF , &ccm->CCGR4); +writel (0xFFFFFFFF , &ccm->CCGR5); +writel (0xFFFFFFFF , &ccm->CCGR6); +writel (0xFFFFFFFF , &ccm->CCGR7);Just a mention here: why do you activate all clocks instead of just what you really need ?
Quoted 2 lines
May be yes, but it's better to have full clock initialization so-that nothing broke during SPL runtime.
You are the board maintainer, and it is your decision. Anyway, clocks are not disable in u-boot, and they can remain on in Linux, because they are set just if needed. Some kernels had disabled in the past for some platform (I know OMAP3) all not required clocks, but this was in the era before DT. Kernel just supposes that nothing is set.
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I agree with Stefano. Clocks part should clean up. We have done in the past for OMAP architecture
I would like to go-ahead with these now, since many of i.MX(even other engicam) boards does the same. I will need to look into it and prepare patches for all.
thanks!
Signature · 4 lines
Jagan Teki Free Software Engineer | www.openedev.com U-Boot, Linux | Upstream Maintainer Hyderabad, India.
PATCH v4 2/9 arm: imx6ul: Add Engicam Is.IoT MX6UL Starter Kit initial support
Hi Jagan,
Quoted 7 lines · Jagan Teki
Quoted 7 lines
You are the board maintainer, and it is your decision. Anyway, clocks are not disable in u-boot, and they can remain on in Linux, because they are set just if needed. Some kernels had disabled in the past for some platform (I know OMAP3) all not required clocks, but this was in the era before DT. Kernel just supposes that nothing is set.
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I agree with Stefano. Clocks part should clean up. We have done in the past for OMAP architecture
I would like to go-ahead with these now, since many of
i.MX(even other engicam)boards does the same.
Just because I (or someone else) did not note this isuse in the past, it does not mean that this is a good reason to go on doing wrongly.
Fix this, and you will have time later to send patches for the other boards.
Best regards,
Stefano
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH v4 2/9 arm: imx6ul: Add Engicam Is.IoT MX6UL Starter Kit initial support
In reply to Stefano BabicQuoted 135 lines · Stefano Babic
Hi Jagan, Tom,
Quoted 125 lines · Jagan Teki
Quoted 119 lines · Stefano Babic
Hi Jagan,
Quoted 101 lines · Jagan Teki
From: Jagan Teki <[email protected]>
Boot from MMC:
-------------
U-Boot SPL 2017.01-rc2-gba3c151-dirty (Jan 02 2017 - 16:59:33) Trying to boot from MMC1U-Boot 2017.01-rc2-gba3c151-dirty (Jan 02 2017 - 16:59:33 +0100)
CPU: Freescale i.MX6UL rev1.1 528 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 33C Reset cause: POR Model: Engicam Is.IoT MX6UL Starterkit DRAM: 512 MiB MMC: FSL_SDHC: 0*** Warning - bad CRC, using default environment
In: serial Out: serial Err: serial Net: CPU Net Initialization FailedNo ethernet found.
Hit any key to stop autoboot: 0
isiotmx6ul>Cc Stefano Babic <[email protected]>Cc Matteo Lisi <[email protected]>Cc Michael Trimarchi <[email protected]>Signed-off-by Jagan Teki <[email protected]>--- arch/arm/cpu/armv7/mx6/Kconfig | 11 ++ arch/arm/dts/Makefile | 3 +- arch/arm/dts/imx6ul-isiot-mmc.dts | 50 +++++++ arch/arm/dts/imx6ul-isiot.dtsi | 92 +++++++++++++ board/engicam/isiotmx6ul/Kconfig | 12 ++ board/engicam/isiotmx6ul/MAINTAINERS | 6 + board/engicam/isiotmx6ul/Makefile | 6 + board/engicam/isiotmx6ul/README | 28 ++++ board/engicam/isiotmx6ul/isiotmx6ul.c | 247 ++++++++++++++++++++++++++++++++++ configs/imx6ul_isiot_mmc_defconfig | 36 +++++ include/configs/imx6ul_isiot.h | 142 +++++++++++++++++++ 11 files changed, 632 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/imx6ul-isiot-mmc.dts create mode 100644 arch/arm/dts/imx6ul-isiot.dtsi create mode 100644 board/engicam/isiotmx6ul/Kconfig create mode 100644 board/engicam/isiotmx6ul/MAINTAINERS create mode 100644 board/engicam/isiotmx6ul/Makefile create mode 100644 board/engicam/isiotmx6ul/README create mode 100644 board/engicam/isiotmx6ul/isiotmx6ul.c create mode 100644 configs/imx6ul_isiot_mmc_defconfig create mode 100644 include/configs/imx6ul_isiot.harch/arm/cpu/armv7/mx6/Kconfig +11
-0@@ -205,6 +205,16 @@ config TARGET_MX6UL_GEAM select DM_THERMAL select SUPPORT_SPL +config TARGET_MX6UL_ISIOT + bool "Support Engicam Is.IoT MX6UL" + select MX6UL + select OF_CONTROL + select DM + select DM_GPIO + select DM_MMC + select DM_THERMAL + select SUPPORT_SPL + config TARGET_MX6ULL_14X14_EVK bool "Support mx6ull_14x14_evk" select MX6ULL@@ -313,6 +323,7 @@ source "board/embest/mx6boards/Kconfig" source "board/engicam/geam6ul/Kconfig" source "board/engicam/icorem6/Kconfig" source "board/engicam/icorem6_rqs/Kconfig" +source "board/engicam/isiotmx6ul/Kconfig" source "board/freescale/mx6qarm2/Kconfig" source "board/freescale/mx6qsabreauto/Kconfig" source "board/freescale/mx6sabresd/Kconfig"arch/arm/dts/Makefile +2
-1@@ -313,7 +313,8 @@ dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \ imx6dl-icore-rqs.dtb \ imx6q-icore.dtb \ imx6q-icore-rqs.dtb \ - imx6ul-geam-kit.dtb + imx6ul-geam-kit.dtb \ + imx6ul-isiot-mmc.dtb dtb-$(CONFIG_MX7) += imx7-colibri.dtbarch/arm/dts/imx6ul-isiot-mmc.dts new file +0
-0arch/arm/dts/imx6ul-isiot-mmc.dts line 9
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arch/arm/dts/imx6ul-isiot-mmc.dts new file +9
-0@@ -0,0 +1,50 @@ +/* + * Copyright (C) 2016 Amarula Solutions B.V. + * Copyright (C) 2016 Engicam S.r.l. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + *I have seen that a lot of files slipped into mainline, and I have myself not paid enough attention befeore (see your
imx6ul-geam-kit.dtsfor example).Quoted 4 lines
But we moved some years ago to SPDX-License-Identifier. Other DTS files are using this as well without copying the whole license. Could you do this here, too ? It would be also nice if you plan to fix this for all Engicam's boards, thanks !
Quoted 6 lines
Yes for boards, I will prepare patch.
For devicetress, since the base dtsi files copied from Linux, we keep the license as it is. I am not sure all other dts(i) files use the SPDX-License-Identifier. example imx6sll-evk, imx6ull-14x14-evk and all sunxi .
Quoted 4 lines
It is true that some files slipped into mainline copying again all license stuff - and several files ported from Linux was adjusting for SPDX.
Tom, what do you think ?
The DT files we copy from the kernel are the exception to the rule, they should just keep the usual full license header they come in with. This is even "easier" to do now, given that we can append any U-Boot centric bits into a -uboot.dtsi file and keep the upstream DT files unmodified entirely.
Signature · 8 lines
Tom -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 819 bytes Desc: Digital signature URL: <http://lists.denx.de/pipermail/u-boot/attachments/20170128/eddf6801/attachment.sig>
PATCH v4 3/9 arm: dts: imx6ul-isiot: Add I2C nodes
In reply to Jagan TekiFrom: Jagan Teki <[email protected]>
Add I2C nodes for Engicam Is.IoT MX6UL module.
Cc Stefano Babic <[email protected]>
Cc Matteo Lisi <[email protected]>
Cc Michael Trimarchi <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
--- arch/arm/dts/imx6ul-isiot.dtsi | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+)
arch/arm/dts/imx6ul-isiot.dtsi +28 -0
@@ -56,6 +56,20 @@ }; }; +&i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; +}; + +&i2c2 { + clock_frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; +}; + &uart1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>;
@@ -72,6 +86,20 @@ }; &iomuxc { + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0 + MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0 + MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0 + >; + }; + pinctrl_uart1: uart1grp { fsl,pins = < MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
Signature · 1 line
1.9.1
PATCH v4 4/9 imx6: isiotmx6ul: Add I2C support
In reply to Jagan TekiFrom: Jagan Teki <[email protected]>
Add I2C support for Engicam Is.IoT MX6UL module.
isiotmx6ul> i2c bus
Bus 0: i2c at 021a0000 Bus 1: i2c at 021a4000
isiotmx6ul> i2c dev 0
Setting bus to 0
isiotmx6ul> i2c dev
Current bus is 0
isiotmx6ul> i2c speed 100000
Setting bus speed to 100000 Hz
isiotmx6ul> i2c probe
Valid chip addresses: 00 2C 44 78
isiotmx6ul> i2c md 2C 0xff
00ff: 00 00 00 00 0f f0 01 64 ff ff 00 00 00 00 00 00 .......d........
Cc Stefano Babic <[email protected]>
Cc Matteo Lisi <[email protected]>
Cc Michael Trimarchi <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
--- arch/arm/cpu/armv7/mx6/Kconfig | 1 + configs/imx6ul_isiot_mmc_defconfig | 2 ++ 2 files changed, 3 insertions(+)
arch/arm/cpu/armv7/mx6/Kconfig +1 -0
@@ -211,6 +211,7 @@ config TARGET_MX6UL_ISIOT select OF_CONTROL select DM select DM_GPIO + select DM_I2C select DM_MMC select DM_THERMAL select SUPPORT_SPL
configs/imx6ul_isiot_mmc_defconfig +2 -0
@@ -21,6 +21,7 @@ CONFIG_SYS_PROMPT="isiotmx6ul> " # CONFIG_CMD_IMLS is not set CONFIG_CMD_MEMTEST=y CONFIG_CMD_MMC=y +CONFIG_CMD_I2C=y CONFIG_CMD_GPIO=y CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y
@@ -29,6 +30,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y # CONFIG_BLK is not set +CONFIG_SYS_I2C_MXC=y # CONFIG_DM_MMC_OPS is not set CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y
Signature · 1 line
1.9.1
PATCH v4 4/9 imx6: isiotmx6ul: Add I2C support
Quoted 53 lines · Jagan Teki
From: Jagan Teki <[email protected]>
Add I2C support for Engicam Is.IoT MX6UL module.
isiotmx6ul> i2c bus
Bus 0: i2c at 021a0000 Bus 1: i2c at 021a4000isiotmx6ul> i2c dev 0
Setting bus to 0
isiotmx6ul> i2c dev
Current bus is 0
isiotmx6ul> i2c speed 100000
Setting bus speed to 100000 Hz
isiotmx6ul> i2c probe
Valid chip addresses: 00 2C 44 78
isiotmx6ul> i2c md 2C0xff
00ff: 00 00 00 00 0f f0 01 64 ff ff 00 00 00 00 00 00 .......d........Cc Stefano Babic <[email protected]>Cc Matteo Lisi <[email protected]>Cc Michael Trimarchi <[email protected]>Signed-off-by Jagan Teki <[email protected]>--- arch/arm/cpu/armv7/mx6/Kconfig | 1 + configs/imx6ul_isiot_mmc_defconfig | 2 ++ 2 files changed, 3 insertions(+)arch/arm/cpu/armv7/mx6/Kconfig +1
-0@@ -211,6 +211,7 @@ config TARGET_MX6UL_ISIOT select OF_CONTROL select DM select DM_GPIO + select DM_I2C select DM_MMC select DM_THERMAL select SUPPORT_SPLconfigs/imx6ul_isiot_mmc_defconfig +1
-0@@ -21,6 +21,7 @@ CONFIG_SYS_PROMPT="isiotmx6ul> " # CONFIG_CMD_IMLS is not set CONFIG_CMD_MEMTEST=y CONFIG_CMD_MMC=y +CONFIG_CMD_I2C=y CONFIG_CMD_GPIO=y CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y
configs/imx6ul_isiot_mmc_defconfig CONFIG_CMD_EXT4_WRITE=y · line 36
Quoted 7 lines
configs/imx6ul_isiot_mmc_defconfig +1
-0@@ -29,6 +30,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y # CONFIG_BLK is not set +CONFIG_SYS_I2C_MXC=y # CONFIG_DM_MMC_OPS is not set CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y
Reviewed-by Stefano Babic <[email protected]>
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH v4 5/9 arm: dts: imx6ul-isiot: Add FEC node
In reply to Jagan TekiFrom: Jagan Teki <[email protected]>
Add FEC node for Engicam Is.IoT MX6UL module.
Cc Stefano Babic <[email protected]>
Cc Matteo Lisi <[email protected]>
Cc Michael Trimarchi <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
--- arch/arm/dts/imx6ul-isiot.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+)
arch/arm/dts/imx6ul-isiot.dtsi +22 -0
@@ -56,6 +56,13 @@ }; }; +&fec1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet1>; + phy-mode = "rmii"; + status = "okay"; +}; + &i2c1 { clock-frequency = <100000>; pinctrl-names = "default";
@@ -86,6 +93,21 @@ }; &iomuxc { + pinctrl_enet1: enet1grp { + fsl,pins = < + MX6UL_PAD_ENET2_RX_DATA0__ENET1_MDIO 0x1b0b0 + MX6UL_PAD_ENET2_RX_DATA1__ENET1_MDC 0x1b0b0 + MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0 + MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0 + MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0 + MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0 + MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031 + MX6UL_PAD_ENET2_RX_EN__GPIO2_IO10 0x1b0b0 + >; + }; + pinctrl_i2c1: i2c1grp { fsl,pins = < MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0
Signature · 1 line
1.9.1
PATCH v4 5/9 arm: dts: imx6ul-isiot: Add FEC node
Quoted 43 lines · Jagan Teki
From: Jagan Teki <[email protected]>
Add FEC node for Engicam Is.IoT MX6UL module.
Cc Stefano Babic <[email protected]>Cc Matteo Lisi <[email protected]>Cc Michael Trimarchi <[email protected]>Signed-off-by Jagan Teki <[email protected]>--- arch/arm/dts/imx6ul-isiot.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+)arch/arm/dts/imx6ul-isiot.dtsi +15
-0@@ -56,6 +56,13 @@ }; }; +&fec1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet1>; + phy-mode = "rmii"; + status = "okay"; +}; + &i2c1 { clock-frequency = <100000>; pinctrl-names = "default";@@ -86,6 +93,21 @@ }; &iomuxc { + pinctrl_enet1: enet1grp { + fsl,pins = < + MX6UL_PAD_ENET2_RX_DATA0__ENET1_MDIO 0x1b0b0 + MX6UL_PAD_ENET2_RX_DATA1__ENET1_MDC 0x1b0b0 + MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0 + MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0
arch/arm/dts/imx6ul-isiot.dtsi line 113
Quoted 10 lines
arch/arm/dts/imx6ul-isiot.dtsi +7
-0+ MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0 + MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0 + MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031 + MX6UL_PAD_ENET2_RX_EN__GPIO2_IO10 0x1b0b0 + >; + }; + pinctrl_i2c1: i2c1grp { fsl,pins = < MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0
Reviewed-by Stefano Babic <[email protected]>
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH v4 6/9 imx6: isiotmx6ul: Add FEC support
In reply to Jagan TekiFrom: Jagan Teki <[email protected]>
Add FEC support for Engicam Is.IoT MX6UL module.
Cc Stefano Babic <[email protected]>
Cc Matteo Lisi <[email protected]>
Cc Michael Trimarchi <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
--- arch/arm/cpu/armv7/mx6/Kconfig | 1 + configs/imx6ul_isiot_mmc_defconfig | 3 +++ include/configs/imx6ul_isiot.h | 10 ++++++++++ 3 files changed, 14 insertions(+)
arch/arm/cpu/armv7/mx6/Kconfig +1 -0
@@ -210,6 +210,7 @@ config TARGET_MX6UL_ISIOT select MX6UL select OF_CONTROL select DM + select DM_ETH select DM_GPIO select DM_I2C select DM_MMC
configs/imx6ul_isiot_mmc_defconfig +3 -0
@@ -23,6 +23,8 @@ CONFIG_CMD_MEMTEST=y CONFIG_CMD_MMC=y CONFIG_CMD_I2C=y CONFIG_CMD_GPIO=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y
@@ -32,6 +34,7 @@ CONFIG_CMD_FS_GENERIC=y # CONFIG_BLK is not set CONFIG_SYS_I2C_MXC=y # CONFIG_DM_MMC_OPS is not set +CONFIG_FEC_MXC=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_MXC_UART=y
include/configs/imx6ul_isiot.h +10 -0
@@ -128,6 +128,16 @@# define CONFIG_SYS_FSL_ESDHC_ADDR 0#endif +/* Ethernet */ +#ifdef CONFIG_FEC_MXC +# define CONFIG_FEC_MXC_PHYADDR 0 +# define CONFIG_FEC_XCV_TYPE RMII + +# define CONFIG_MII +# define CONFIG_PHYLIB +# define CONFIG_PHY_SMSC +#endif +/* SPL */ #ifdef CONFIG_SPL # define CONFIG_SPL_MMC_SUPPORT
Signature · 1 line
1.9.1
PATCH v4 7/9 imx6: isiotmx6ul: Add NAND support
In reply to Jagan TekiFrom: Jagan Teki <[email protected]>
Add NAND support for Engicam Is.IoT MX6UL board.
Cc Stefano Babic <[email protected]>
Cc Matteo Lisi <[email protected]>
Cc Michael Trimarchi <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
--- arch/arm/dts/Makefile | 3 +- arch/arm/dts/imx6ul-isiot-nand.dts | 50 +++++++++++++++++++++++++ board/engicam/isiotmx6ul/MAINTAINERS | 1 + board/engicam/isiotmx6ul/isiotmx6ul.c | 69 +++++++++++++++++++++++++++++++++++ configs/imx6ul_isiot_nand_defconfig | 39 ++++++++++++++++++++ include/configs/imx6ul_isiot.h | 25 ++++++++++++- 6 files changed, 185 insertions(+), 2 deletions(-) create mode 100644 arch/arm/dts/imx6ul-isiot-nand.dts create mode 100644 configs/imx6ul_isiot_nand_defconfig
arch/arm/dts/Makefile +2 -1
@@ -314,7 +314,8 @@ dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \ imx6q-icore.dtb \ imx6q-icore-rqs.dtb \ imx6ul-geam-kit.dtb \ - imx6ul-isiot-mmc.dtb + imx6ul-isiot-mmc.dtb \ + imx6ul-isiot-nand.dtb dtb-$(CONFIG_MX7) += imx7-colibri.dtb
arch/arm/dts/imx6ul-isiot-nand.dts new file +50 -0
50 lines not on this page · raw message
board/engicam/isiotmx6ul/MAINTAINERS +1 -0
@@ -4,3 +4,4 @@ S: Maintained F: board/engicam/isiotmx6ul F: include/configs/imx6ul_isiot.h F: configs/imx6ul_isiot_mmc_defconfig +F: configs/imx6ul_isiot_nand_defconfig
board/engicam/isiotmx6ul/isiotmx6ul.c +69 -0
80 lines not on this page · raw message
configs/imx6ul_isiot_nand_defconfig new file +39 -0
@@ -0,0 +1,39 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX6=y +CONFIG_SPL_GPIO_SUPPORT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_TARGET_MX6UL_ISIOT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ul-isiot-nand" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,ENV_IS_IN_NAND" +CONFIG_BOOTDELAY=3 +CONFIG_DEFAULT_FDT_FILE="imx6ul-isiot-nand.dtb" +CONFIG_SPL=y +CONFIG_SPL_DMA_SUPPORT=y +CONFIG_HUSH_PARSER=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_FIT_SIGNATURE=y +CONFIG_SYS_PROMPT="isiotmx6ul> " +# CONFIG_CMD_IMLS is not set +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_MMC=y +CONFIG_CMD_NAND=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +# CONFIG_BLK is not set +# CONFIG_DM_MMC_OPS is not set +CONFIG_NAND_MXS=y +CONFIG_FEC_MXC=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX6=y +CONFIG_MXC_UART=y +CONFIG_IMX_THERMAL=y
include/configs/imx6ul_isiot.h +24 -1
@@ -27,6 +27,10 @@/* Environment in MMC */ # if defined(CONFIG_ENV_IS_IN_MMC )# define CONFIG_ENV_OFFSET 0x100000 +/* Environment in NAND */ +# elif defined(CONFIG_ENV_IS_IN_NAND ) +# define CONFIG_ENV_OFFSET 0x400000 +# define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE# endif #endif
@@ -128,6 +132,21 @@# define CONFIG_SYS_FSL_ESDHC_ADDR 0#endif +/* NAND */ +#ifdef CONFIG_NAND_MXS +# define CONFIG_SYS_MAX_NAND_DEVICE 1 +# define CONFIG_SYS_NAND_BASE 0x40000000 +# define CONFIG_SYS_NAND_5_ADDR_CYCLE +# define CONFIG_SYS_NAND_ONFI_DETECTION +# define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE +# define CONFIG_SYS_NAND_U_BOOT_OFFS 0x200000 + +/* APBH DMA */ +# define CONFIG_APBH_DMA +# define CONFIG_APBH_DMA_BURST +# define CONFIG_APBH_DMA_BURST8 +#endif +/* Ethernet */ #ifdef CONFIG_FEC_MXC # define CONFIG_FEC_MXC_PHYADDR 0
@@ -140,7 +159,11 @@/* SPL */ #ifdef CONFIG_SPL -# define CONFIG_SPL_MMC_SUPPORT +# ifdef CONFIG_NAND_MXS +# define CONFIG_SPL_NAND_SUPPORT +# else +# define CONFIG_SPL_MMC_SUPPORT +# endif # include "imx6_spl.h" # ifdef CONFIG_SPL_BUILD
Signature · 1 line
1.9.1
PATCH v4 8/9 imx6: isiotmx6ul: Add nandboot env support
In reply to Jagan TekiFrom: Jagan Teki <[email protected]>
Add config options for booting Linux from NAND in UBI format.
Cc Stefano Babic <[email protected]>
Cc Matteo Lisi <[email protected]>
Cc Michael Trimarchi <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
--- configs/imx6ul_isiot_nand_defconfig | 1 + include/configs/imx6ul_isiot.h | 32 +++++++++++++++++++++++++++++++- 2 files changed, 32 insertions(+), 1 deletion(-)
configs/imx6ul_isiot_nand_defconfig +1 -0
@@ -21,6 +21,7 @@ CONFIG_SYS_PROMPT="isiotmx6ul> " CONFIG_CMD_MEMTEST=y CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y +CONFIG_CMD_UBI=y CONFIG_CMD_GPIO=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y
include/configs/imx6ul_isiot.h +31 -1
@@ -48,9 +48,12 @@"mmcdev=0\0" \"mmcpart=1\0" \"mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ +"nandroot=ubi0:rootfs rootfstype=ubifs\0" \"mmcautodetect=yes\0" \"mmcargs=setenv bootargs console=${console},${baudrate} " \"root=${mmcroot}\0" \ +"ubiargs=setenv bootargs console=${console},${baudrate} " \ +"ubi.mtd=5 root=${nandroot} ${mtdparts}\0" \"loadbootscript=" \"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \"bootscript=echo Running bootscript from mmc ...; " \
@@ -75,8 +78,21 @@"fi; " \"else " \"bootm; " \ -"fi\0" +"fi\0" \ +"nandboot=echo Booting from nand ...; " \ +"if mtdparts; then " \ +"echo Starting nand boot ...; " \ +"else " \ +"mtdparts default; " \ +"fi; " \ +"run ubiargs; " \ +"nand read ${loadaddr} kernel 0x800000; " \ +"nand read ${fdt_addr} dtb 0x100000; " \ + "bootm ${loadaddr} - ${fdt_addr}\0" +#ifdef CONFIG_NAND_MXS +# define CONFIG_BOOTCOMMAND "run nandboot" +#else # define CONFIG_BOOTCOMMAND \ "if mmc rescan; then " \ "if run loadbootscript; then " \
@@ -91,6 +107,7 @@"fi; " \"fi; " \ "fi" +#endif /* Miscellaneous configurable options */ #define CONFIG_SYS_MEMTEST_START 0x80000000
@@ -141,6 +158,19 @@# define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE# define CONFIG_SYS_NAND_U_BOOT_OFFS 0x200000 +/* MTD device */ +# define CONFIG_MTD_DEVICE +# define CONFIG_CMD_MTDPARTS +# define CONFIG_MTD_PARTITIONS +# define MTDIDS_DEFAULT "nand0=gpmi-nand" +# define MTDPARTS_DEFAULT "mtdparts=gpmi-nand:2m(spl),2m(uboot)," \ + "1m(env),8m(kernel),1m(dtb),-(rootfs)" + +/* UBI */ +# define CONFIG_CMD_UBIFS +# define CONFIG_RBTREE +# define CONFIG_LZO +/* APBH DMA */ # define CONFIG_APBH_DMA # define CONFIG_APBH_DMA_BURST
Signature · 1 line
1.9.1
PATCH v4 9/9 imx6ul: isiotmx6ul: Enable I2C support
In reply to Jagan TekiFrom: Jagan Teki <[email protected]>
Enable I2C support for Engicam Is.IoT NAND module.
Cc Stefano Babic <[email protected]>
Cc Matteo Lisi <[email protected]>
Cc Michael Trimarchi <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
--- configs/imx6ul_isiot_nand_defconfig | 2 ++ 1 file changed, 2 insertions(+)
configs/imx6ul_isiot_nand_defconfig +2 -0
@@ -26,6 +26,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y +CONFIG_CMD_I2C=y CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y
@@ -36,5 +37,6 @@ CONFIG_NAND_MXS=y CONFIG_FEC_MXC=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y +CONFIG_SYS_I2C_MXC=y CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y
Signature · 1 line
1.9.1