Patch "pinctrl: baytrail: Rectify debounce support" has been added to the 4.9-stable tree
Subsystems (3)
This is a note to let you know that I've just added the patch titled
pinctrl: baytrail: Rectify debounce support
to the 4.9-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
pinctrl-baytrail-rectify-debounce-support.patch
and it can be found in the queue-4.9 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.
Quoted 1 line
From
04ff5a095d662e0879f0eb04b9247e092210aeffMon Sep 17 00:00:00 2001
From: Andy Shevchenko <[email protected]>
Date: Tue, 10 Jan 2017 16:38:52 +0200
Subject: pinctrl: baytrail: Rectify debounce support
From: Andy Shevchenko <[email protected]>
commit 04ff5a095d662e0879f0eb04b9247e092210aeff upstream.
The commit 658b476c742f ("pinctrl: baytrail: Add debounce configuration") implements debounce for Baytrail pin control, but seems wasn't tested properly.
The register which keeps debounce value is separated from the configuration one. Writing wrong values to the latter will guarantee wrong behaviour of the driver and even might break something physically.
Besides above there is missed case how to disable it, which is actually done through the bit in configuration register.
Rectify implementation here by using proper register for debounce value.
--- drivers/pinctrl/intel/pinctrl-baytrail.c | 28 +++++++++++++++++----------- 1 file changed, 17 insertions(+), 11 deletions(-)
drivers/pinctrl/intel/pinctrl-baytrail.c +17 -11
@@ -1092,6 +1092,7 @@ static int byt_pin_config_get(struct pinenum pin_config_param param =pinconf_to_config_param (*config);void __iomem *conf_reg =byt_gpio_reg (vg, offset,BYT_CONF0_REG );void __iomem *val_reg =byt_gpio_reg (vg, offset,BYT_VAL_REG ); +void __iomem *db_reg =byt_gpio_reg (vg, offset,BYT_DEBOUNCE_REG );unsigned long flags;u32 conf, pull, val, debounce;u16 arg =0 ;
@@ -1128,7 +1129,7 @@ static int byt_pin_config_get(struct pinreturn -EINVAL ;raw_spin_lock_irqsave (&vg->lock, flags); - debounce =readl (byt_gpio_reg (vg, offset,BYT_DEBOUNCE_REG )); + debounce =readl (db_reg);raw_spin_unlock_irqrestore (&vg->lock, flags);switch (debounce &BYT_DEBOUNCE_PULSE_MASK ) {
@@ -1176,6 +1177,7 @@ static int byt_pin_config_set(struct pinunsigned int param, arg;void __iomem *conf_reg =byt_gpio_reg (vg, offset,BYT_CONF0_REG );void __iomem *val_reg =byt_gpio_reg (vg, offset,BYT_VAL_REG ); +void __iomem *db_reg =byt_gpio_reg (vg, offset,BYT_DEBOUNCE_REG );unsigned long flags;u32 conf, val, debounce;int i, ret =0 ;
@@ -1238,36 +1240,40 @@ static int byt_pin_config_set(struct pinbreak ;case PIN_CONFIG_INPUT_DEBOUNCE : - debounce =readl (byt_gpio_reg (vg, offset, -BYT_DEBOUNCE_REG )); - conf &= ~BYT_DEBOUNCE_PULSE_MASK ; + debounce =readl (db_reg); + debounce &= ~BYT_DEBOUNCE_PULSE_MASK ;switch (arg) { +case 0 : + conf &=BYT_DEBOUNCE_EN ; +break ;case 375 : - conf |=BYT_DEBOUNCE_PULSE_375US ; + debounce |=BYT_DEBOUNCE_PULSE_375US ;break ;case 750 : - conf |=BYT_DEBOUNCE_PULSE_750US ; + debounce |=BYT_DEBOUNCE_PULSE_750US ;break ;case 1500 : - conf |=BYT_DEBOUNCE_PULSE_1500US ; + debounce |=BYT_DEBOUNCE_PULSE_1500US ;break ;case 3000 : - conf |=BYT_DEBOUNCE_PULSE_3MS ; + debounce |=BYT_DEBOUNCE_PULSE_3MS ;break ;case 6000 : - conf |=BYT_DEBOUNCE_PULSE_6MS ; + debounce |=BYT_DEBOUNCE_PULSE_6MS ;break ;case 12000 : - conf |=BYT_DEBOUNCE_PULSE_12MS ; + debounce |=BYT_DEBOUNCE_PULSE_12MS ;break ;case 24000 : - conf |=BYT_DEBOUNCE_PULSE_24MS ; + debounce |=BYT_DEBOUNCE_PULSE_24MS ;break ;default : ret = -EINVAL ; } +if (!ret) +writel (debounce, db_reg);break ;default : ret = -ENOTSUPP ;
Patches currently in stable-queue which might be from [email protected] are
queue-4.9/pinctrl-baytrail-rectify-debounce-support.patch queue-4.9/platform-x86-intel_mid_powerbtn-set-irq_oneshot.patch queue-4.9/platform-x86-mlx-platform-free-first-dev-on-error.patch