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drivers: hwmon: Add On-Chip Controller driver

PATCH Superseded Eddie James 3 participants 10 messages Feb 14, 2017 – Mar 12, 2017

Subsystems (3)

v8 of 9 Superseded Latest is v9 →

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#0 lore raw

v8 cover drivers: hwmon: Add On-Chip Controller driver

From: "Edward A. James" <[email protected]>

This patchset adds a hwmon driver to support the OCC (On-Chip Controller) on the IBM POWER8 and POWER9 processors, from a BMC (Baseboard Management Controller). The OCC is an embedded processor that provides real time power and thermal monitoring.

The driver provides an interface on a BMC to poll OCC sensor data, set user power caps, and perform some basic OCC error handling. It interfaces with userspace through hwmon.

The driver is currently functional only for the OCC on POWER8 chips. Communicating with the POWER9 OCC requries FSI support.

Since v7:
* change Makefile and Kconfig to build a single module for the driver
* include p9 file in build
* change Kconfig from "PPC" to "IBM"
* remove EXPORT_SYMBOL
* bundle occ_config and occ_ops structures into occ_init_data structure
* few style tweaks suggested by Joel

Edward A. James (6):
hwmon: Add core On-Chip Controller support for POWER CPUs
hwmon: occ: Add sysfs interface
hwmon: occ: Add I2C transport implementation for SCOM operations
hwmon: occ: Add callbacks for parsing P8 OCC datastructures
hwmon: occ: Add hwmon implementation for the P8 OCC
hwmon: occ: Add callbacks for parsing P9 OCC datastructures

 Documentation/devicetree/bindings/hwmon/occ.txt |  13 +
 Documentation/hwmon/occ                         | 116 +++++++
 MAINTAINERS                                     |   7 +
 drivers/hwmon/Kconfig                           |   2 +
 drivers/hwmon/Makefile                          |   1 +
 drivers/hwmon/occ/Kconfig                       |  39 +++
 drivers/hwmon/occ/Makefile                      |   5 +
 drivers/hwmon/occ/occ.c                         | 440 ++++++++++++++++++++++++
 drivers/hwmon/occ/occ.h                         |  77 +++++
 drivers/hwmon/occ/occ_p8.c                      | 256 ++++++++++++++
 drivers/hwmon/occ/occ_p8.h                      |  25 ++
 drivers/hwmon/occ/occ_p8_i2c.c                  |  99 ++++++
 drivers/hwmon/occ/occ_p9.c                      | 320 +++++++++++++++++
 drivers/hwmon/occ/occ_p9.h                      |  25 ++
 drivers/hwmon/occ/occ_scom_i2c.c                |  69 ++++
 drivers/hwmon/occ/occ_scom_i2c.h                |  21 ++
 drivers/hwmon/occ/occ_sysfs.c                   | 245 +++++++++++++
 drivers/hwmon/occ/occ_sysfs.h                   |  25 ++
 drivers/hwmon/occ/scom.h                        |  42 +++
 19 files changed, 1827 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/hwmon/occ.txt
 create mode 100644 Documentation/hwmon/occ
 create mode 100644 drivers/hwmon/occ/Kconfig
 create mode 100644 drivers/hwmon/occ/Makefile
 create mode 100644 drivers/hwmon/occ/occ.c
 create mode 100644 drivers/hwmon/occ/occ.h
 create mode 100644 drivers/hwmon/occ/occ_p8.c
 create mode 100644 drivers/hwmon/occ/occ_p8.h
 create mode 100644 drivers/hwmon/occ/occ_p8_i2c.c
 create mode 100644 drivers/hwmon/occ/occ_p9.c
 create mode 100644 drivers/hwmon/occ/occ_p9.h
 create mode 100644 drivers/hwmon/occ/occ_scom_i2c.c
 create mode 100644 drivers/hwmon/occ/occ_scom_i2c.h
 create mode 100644 drivers/hwmon/occ/occ_sysfs.c
 create mode 100644 drivers/hwmon/occ/occ_sysfs.h
 create mode 100644 drivers/hwmon/occ/scom.h
Signature · 1 line
1.8.3.1
#1 lore raw

PATCH v8 1/6 hwmon: Add core On-Chip Controller support for POWER CPUs

From: "Edward A. James" <[email protected]>

Add core support for polling the OCC for it's sensor data and parsing that data into sensor-specific information.

---
 Documentation/hwmon/occ    |  42 +++++
 MAINTAINERS                |   7 +
 drivers/hwmon/Kconfig      |   2 +
 drivers/hwmon/Makefile     |   1 +
 drivers/hwmon/occ/Kconfig  |  13 ++
 drivers/hwmon/occ/Makefile |   1 +
 drivers/hwmon/occ/occ.c    | 440 +++++++++++++++++++++++++++++++++++++++++++++
 drivers/hwmon/occ/occ.h    |  77 ++++++++
 drivers/hwmon/occ/scom.h   |  42 +++++
 9 files changed, 625 insertions(+)
 create mode 100644 Documentation/hwmon/occ
 create mode 100644 drivers/hwmon/occ/Kconfig
 create mode 100644 drivers/hwmon/occ/Makefile
 create mode 100644 drivers/hwmon/occ/occ.c
 create mode 100644 drivers/hwmon/occ/occ.h
 create mode 100644 drivers/hwmon/occ/scom.h
Documentation/hwmon/occ new file +42 -0
new file mode 100644
index 0000000..d1c863b
@@ -0,0 +1,42 @@
+=================
+Kernel driver occ
+=================
+
+Supported chips:
+ * POWER8
+ * POWER9
+
+Please note that the driver does not run on these processors. Instead, the
+driver runs on a connected service processor, such as an AST2400. (see the
+BMC - Host Communications section).
+
+Author: Eddie James <[email protected]>
+
+Description
+-----------
+
+This driver implements support for the OCC (On-Chip Controller) on the IBM
+POWER8 and POWER9 processors, from a BMC (Baseboard Management Controller). The
+OCC is an embedded processor that provides real time power and thermal
+monitoring.
+
+This driver provides an interface on a BMC to poll OCC sensor data, set user
+power caps, and perform some basic OCC error handling.
+
+Currently, all versions of the OCC support four types of sensor data: power,
+temperature, frequency, and "caps," which indicate limits and thresholds used
+internally on the OCC.
+
+BMC - Host Communications
+-------------------------
+
+For the POWER8 application, the BMC can communicate with the P8 over I2C bus.
+However, to access the OCC register space, any data transfer must use a SCOM
+operation. SCOM is a procedure to initiate a data transfer, typically of 8
+bytes. SCOMs consist of writing a 32-bit command register and then
+reading/writing two 32-bit data registers. This driver implements these
+SCOM operations over I2C bus in order to communicate with the OCC.
+
+For the POWER9 application, the BMC can communicate with the P9 over FSI bus
+and SBE engine. Once again, SCOM operations are required. This driver will
+implement SCOM ops over FSI/SBE. This will require the FSI driver.
MAINTAINERS +7 -0
index 5f10c28..e765b0a 100644
@@ -9128,6 +9128,13 @@ T:	git git://linuxtv.org/media_tree.git
 S:	Maintained
 F:	drivers/media/i2c/ov7670.c
 
+ON-CHIP CONTROLLER HWMON POWER8/POWER9 DRIVER
+M:	Eddie James <[email protected]>
+L:	[email protected]
+S:	Maintained
+F:	Documentation/hwmon/occ
+F:	drivers/hwmon/occ/
+
 ONENAND FLASH DRIVER
 M:	Kyungmin Park <[email protected]>
 L:	[email protected]
drivers/hwmon/Kconfig +2 -0
index 190d270..e80ca81 100644
@@ -1240,6 +1240,8 @@ config SENSORS_NSA320
 	  This driver can also be built as a module. If so, the module
 	  will be called nsa320-hwmon.
 
+source drivers/hwmon/occ/Kconfig
+
 config SENSORS_PCF8591
 	tristate "Philips PCF8591 ADC/DAC"
 	depends on I2C
drivers/hwmon/Makefile +1 -0
index d2cb7e8..2b7edbb 100644
@@ -169,6 +169,7 @@ obj-$(CONFIG_SENSORS_WM831X)	+= wm831x-hwmon.o
 obj-$(CONFIG_SENSORS_WM8350)	+= wm8350-hwmon.o
 obj-$(CONFIG_SENSORS_XGENE)	+= xgene-hwmon.o
 
+obj-$(CONFIG_SENSORS_IBM_OCC)	+= occ/
 obj-$(CONFIG_PMBUS)		+= pmbus/
 
 ccflags-$(CONFIG_HWMON_DEBUG_CHIP) := -DDEBUG
drivers/hwmon/occ/Kconfig new file +13 -0
new file mode 100644
index 0000000..61be588
@@ -0,0 +1,13 @@
+#
+# On Chip Controller configuration
+#
+
+menuconfig SENSORS_IBM_OCC
+	bool "IBM On-Chip Controller"
+	help
+	  If you say yes here you get support to monitor IBM Power CPU
+	  sensors via the On-Chip Controller (OCC), from a service
+	  processor.
+
+	  Generally this is used by management controllers such as a BMC
+	  on an OpenPower system.
drivers/hwmon/occ/Makefile new file +1 -0
new file mode 100644
index 0000000..3ed79a5
@@ -0,0 +1 @@
+obj-$(CONFIG_SENSORS_IBM_OCC) += occ.o
drivers/hwmon/occ/occ.c new file +440 -0

440 lines not on this page · raw message

drivers/hwmon/occ/occ.h new file +77 -0

77 lines not on this page · raw message

drivers/hwmon/occ/scom.h new file +42 -0

42 lines not on this page · raw message

Signature · 1 line
1.8.3.1
#2 lore raw

PATCH v8 2/6 hwmon: occ: Add sysfs interface

In reply to Eddie James

From: "Edward A. James" <[email protected]>

Add a generic mechanism to expose the sensors provided by the OCC in sysfs.

---
 Documentation/hwmon/occ       |  62 +++++++++++
 drivers/hwmon/occ/Makefile    |   2 +-
 drivers/hwmon/occ/occ_sysfs.c | 245 ++++++++++++++++++++++++++++++++++++++++++
 drivers/hwmon/occ/occ_sysfs.h |  25 +++++
 4 files changed, 333 insertions(+), 1 deletion(-)
 create mode 100644 drivers/hwmon/occ/occ_sysfs.c
 create mode 100644 drivers/hwmon/occ/occ_sysfs.h
Documentation/hwmon/occ +62 -0
index d1c863b..580af26 100644
@@ -27,6 +27,68 @@ Currently, all versions of the OCC support four types of sensor data: power,
 temperature, frequency, and "caps," which indicate limits and thresholds used
 internally on the OCC.
 
+sysfs Entries
+-------------
+
+The OCC driver uses the hwmon sysfs framework to provide data to userspace.
+
+The driver exports a number of sysfs files for each type of sensor. The
+sensor-specific files vary depending on the processor type, though many of the
+attributes are common for both the POWER8 and POWER9.
+
+The hwmon interface cannot define every type of sensor that may be used.
+Therefore, the frequency sensor on the OCC uses the "input" type sensor defined
+by the hwmon interface, rather than defining a new type of custom sensor.
+
+Below are detailed the names and meaning of each sensor file for both types of
+processors. All sensors are read-only unless otherwise specified. <x> indicates
+the hwmon index. sensor id indicates the unique internal OCC identifer. Please
+see the POWER OCC specification for details on all these sensor values.
+
+frequency:
+	all processors:
+		in<x>_input - frequency value
+		in<x>_label - sensor id
+temperature:
+	POWER8:
+		temp<x>_input - temperature value
+		temp<x>_label - sensor id
+	POWER9 (in addition to above):
+		temp<x>_type - FRU type
+
+power:
+	POWER8:
+		power<x>_input - power value
+		power<x>_label - sensor id
+		power<x>_average - accumulator
+		power<x>_average_interval - update tag (number of samples in
+			accumulator)
+	POWER9:
+		power<x>_input - power value
+		power<x>_label - sensor id
+		power<x>_average_min - accumulator[0]
+		power<x>_average_max - accumulator[1] (64 bits total)
+		power<x>_average_interval - update tag
+		power<x>_reset_history - (function_id | (apss_channel << 8)
+
+caps:
+	POWER8:
+		power<x>_cap - current powercap
+		power<x>_cap_max - max powercap
+		power<x>_cap_min - min powercap
+		power<x>_max - normal powercap
+		power<x>_alarm - user powercap, r/w
+	POWER9:
+		power<x>_cap_alarm - user powercap source
+
+The driver also provides two sysfs entries through hwmon to better
+control the driver and monitor the master OCC. Though there may be multiple
+OCCs present on the system, these two files are only present for the "master"
+OCC.
+	name - read the name of the driver
+	update_interval - read or write the minimum interval for polling the
+		OCC.
+
 BMC - Host Communications
 -------------------------
 
drivers/hwmon/occ/Makefile +1 -1
index 3ed79a5..67b5367 100644
@@ -1 +1 @@
-obj-$(CONFIG_SENSORS_IBM_OCC) += occ.o
+obj-$(CONFIG_SENSORS_IBM_OCC) += occ.o occ_sysfs.o
drivers/hwmon/occ/occ_sysfs.c new file +245 -0

245 lines not on this page · raw message

drivers/hwmon/occ/occ_sysfs.h new file +25 -0
new file mode 100644
index 0000000..fcd4f59a
@@ -0,0 +1,25 @@
+/*
+ * occ_sysfs.h - OCC sysfs interface
+ *
+ * This file contains the data structures and function prototypes for the OCC
+ * hwmon sysfs entries.
+ *
+ * Copyright 2017 IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __OCC_SYSFS_H__
+#define __OCC_SYSFS_H__
+
+struct occ;
+struct device;
+struct occ_sysfs;
+
+struct occ_sysfs *occ_sysfs_start(struct device *dev, struct occ *occ,
+				  const u32 *sensor_hwmon_configs,
+				  const char *name);
+#endif /* __OCC_SYSFS_H__ */
Signature · 1 line
1.8.3.1
maintainer
#3 lore raw

Re: [PATCH linux v8 2/6] hwmon: occ: Add sysfs interface

Quoted 160 lines · Eddie James

From: "Edward A. James" <[email protected]>

Add a generic mechanism to expose the sensors provided by the OCC in sysfs.

---
 Documentation/hwmon/occ       |  62 +++++++++++
 drivers/hwmon/occ/Makefile    |   2 +-
 drivers/hwmon/occ/occ_sysfs.c | 245 ++++++++++++++++++++++++++++++++++++++++++
 drivers/hwmon/occ/occ_sysfs.h |  25 +++++
 4 files changed, 333 insertions(+), 1 deletion(-)
 create mode 100644 drivers/hwmon/occ/occ_sysfs.c
 create mode 100644 drivers/hwmon/occ/occ_sysfs.h
Documentation/hwmon/occ +62 -0
index d1c863b..580af26 100644
@@ -27,6 +27,68 @@ Currently, all versions of the OCC support four types of sensor data: power,
 temperature, frequency, and "caps," which indicate limits and thresholds used
 internally on the OCC.
 
+sysfs Entries
+-------------
+
+The OCC driver uses the hwmon sysfs framework to provide data to userspace.
+
+The driver exports a number of sysfs files for each type of sensor. The
+sensor-specific files vary depending on the processor type, though many of the
+attributes are common for both the POWER8 and POWER9.
+
+The hwmon interface cannot define every type of sensor that may be used.
+Therefore, the frequency sensor on the OCC uses the "input" type sensor defined
+by the hwmon interface, rather than defining a new type of custom sensor.
+
+Below are detailed the names and meaning of each sensor file for both types of
+processors. All sensors are read-only unless otherwise specified. <x> indicates
+the hwmon index. sensor id indicates the unique internal OCC identifer. Please
+see the POWER OCC specification for details on all these sensor values.
+
+frequency:
+	all processors:
+		in<x>_input - frequency value
+		in<x>_label - sensor id
+temperature:
+	POWER8:
+		temp<x>_input - temperature value
+		temp<x>_label - sensor id
+	POWER9 (in addition to above):
+		temp<x>_type - FRU type
+
+power:
+	POWER8:
+		power<x>_input - power value
+		power<x>_label - sensor id
+		power<x>_average - accumulator
+		power<x>_average_interval - update tag (number of samples in
+			accumulator)
+	POWER9:
+		power<x>_input - power value
+		power<x>_label - sensor id
+		power<x>_average_min - accumulator[0]
+		power<x>_average_max - accumulator[1] (64 bits total)
+		power<x>_average_interval - update tag
+		power<x>_reset_history - (function_id | (apss_channel << 8)
+
+caps:
+	POWER8:
+		power<x>_cap - current powercap
+		power<x>_cap_max - max powercap
+		power<x>_cap_min - min powercap
+		power<x>_max - normal powercap
+		power<x>_alarm - user powercap, r/w
+	POWER9:
+		power<x>_cap_alarm - user powercap source
+
+The driver also provides two sysfs entries through hwmon to better
+control the driver and monitor the master OCC. Though there may be multiple
+OCCs present on the system, these two files are only present for the "master"
+OCC.
+	name - read the name of the driver
+	update_interval - read or write the minimum interval for polling the
+		OCC.
+
 BMC - Host Communications
 -------------------------
 
drivers/hwmon/occ/Makefile +1 -1
index 3ed79a5..67b5367 100644
@@ -1 +1 @@
-obj-$(CONFIG_SENSORS_IBM_OCC) += occ.o
+obj-$(CONFIG_SENSORS_IBM_OCC) += occ.o occ_sysfs.o
drivers/hwmon/occ/occ_sysfs.c new file +58 -0
new file mode 100644
index 0000000..d6baf8d
@@ -0,0 +1,245 @@
+/*
+ * occ_sysfs.c - OCC sysfs interface
+ *
+ * This file contains the methods and data structures for implementing the OCC
+ * hwmon sysfs entries.
+ *
+ * Copyright 2017 IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/delay.h>
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/init.h>
+#include <linux/jiffies.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/mutex.h>
+#include <linux/slab.h>
+#include "occ.h"
+#include "occ_sysfs.h"
+
+#define OCC_HWMON_NAME_LENGTH	32
+
+struct occ_sysfs {
+	struct device *dev;
+	struct occ *occ;
+
+	char hwmon_name[OCC_HWMON_NAME_LENGTH + 1];
+	const u32 *sensor_hwmon_configs;
+	struct hwmon_channel_info **occ_sensors;
+	struct hwmon_chip_info occ_info;
+	u16 user_powercap;
+};
+
+static int occ_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
+			  u32 attr, int channel, long *val)
+{
+	int rc;
+	struct occ_sysfs *driver = dev_get_drvdata(dev);
+	struct occ *occ = driver->occ;
+
+	switch (type) {
+	case hwmon_in:
+		rc = occ_get_sensor_field(occ, FREQ, channel, attr, val);
+		break;
+	case hwmon_temp:
+		rc = occ_get_sensor_field(occ, TEMP, channel, attr, val);
+		break;
+	case hwmon_power:
+		rc = occ_get_sensor_field(occ, POWER, channel, attr, val);
+		break;

drivers/hwmon/occ/occ_sysfs.c line 68

Quoted 10 lines
drivers/hwmon/occ/occ_sysfs.c new file +10 -0
+	default:
+		rc = -EOPNOTSUPP;
+	}
+
+	return rc;
+}
+
+static int occ_hwmon_read_string(struct device *dev,
+				 enum hwmon_sensor_types type, u32 attr,
+				 int channel, char **str)

We have changed the last parameter to const char **str, meaning this no longer works.

Quoted 5 lines
drivers/hwmon/occ/occ_sysfs.c new file +5 -0
+{
+	int rc;
+	unsigned long val = 0;
+
+	if (!((type == hwmon_in && attr == hwmon_in_label) ||

drivers/hwmon/occ/occ_sysfs.c line 83

Quoted 10 lines
drivers/hwmon/occ/occ_sysfs.c new file +10 -0
+	    (type == hwmon_temp && attr == hwmon_temp_label) ||
+	    (type == hwmon_power && attr == hwmon_power_label)))
+		return -EOPNOTSUPP;
+
+	/* will fetch the "label", the sensor_id */
+	rc = occ_hwmon_read(dev, type, attr, channel, &val);
+	if (rc < 0)
+		return rc;
+
+	rc = snprintf(*str, PAGE_SIZE - 1, "%lu", val);

Umm ... this doesn't work anyway. It is supposed to be something like

	*str = <some string>;

Doesn't this crash ?

Guenter

Quoted 194 lines
drivers/hwmon/occ/occ_sysfs.c new file +162 -0
+	if (rc > 0)
+		rc = 0;
+
+	return rc;
+}
+
+static int occ_hwmon_write(struct device *dev, enum hwmon_sensor_types type,
+			   u32 attr, int channel, long val)
+{
+	int rc;
+	struct occ_sysfs *driver = dev_get_drvdata(dev);
+
+	if (type == hwmon_power && attr == hwmon_power_alarm) {
+		rc = occ_set_user_powercap(driver->occ, val);
+		if (rc) {
+			dev_err(dev, "set user powercap failed:%d\n", rc);
+			return rc;
+		}
+
+		driver->user_powercap = val;
+
+		return rc;
+	}
+
+	return -EOPNOTSUPP;
+}
+
+static umode_t occ_is_visible(const void *data, enum hwmon_sensor_types type,
+			      u32 attr, int channel)
+{
+	const struct occ_sysfs *driver = data;
+
+	switch (type) {
+	case hwmon_chip:
+		if (attr == hwmon_chip_update_interval)
+			return 0644;
+		break;
+	case hwmon_in:
+		if (BIT(attr) & driver->sensor_hwmon_configs[0])
+			return 0444;
+		break;
+	case hwmon_temp:
+		if (BIT(attr) & driver->sensor_hwmon_configs[1])
+			return 0444;
+		break;
+	case hwmon_power:
+		/* user power limit */
+		if (attr == hwmon_power_alarm)
+			return 0644;
+		else if ((BIT(attr) & driver->sensor_hwmon_configs[2]) ||
+			 (BIT(attr) & driver->sensor_hwmon_configs[3]))
+			return 0444;
+		break;
+	default:
+		return 0;
+	}
+
+	return 0;
+}
+
+static const struct hwmon_ops occ_hwmon_ops = {
+	.is_visible = occ_is_visible,
+	.read = occ_hwmon_read,
+	.read_string = occ_hwmon_read_string,
+	.write = occ_hwmon_write,
+};
+
+static const enum hwmon_sensor_types occ_sensor_types[MAX_OCC_SENSOR_TYPE] = {
+	hwmon_in,
+	hwmon_temp,
+	hwmon_power,
+	hwmon_power
+};
+
+struct occ_sysfs *occ_sysfs_start(struct device *dev, struct occ *occ,
+				  const u32 *sensor_hwmon_configs,
+				  const char *name)
+{
+	int rc, i, j, num_sensors, index = 0, id;
+	char *brk;
+	struct occ_blocks *resp = NULL;
+	u32 *sensor_config;
+	struct occ_sysfs *hwmon = devm_kzalloc(dev, sizeof(struct occ_sysfs),
+					       GFP_KERNEL);
+	if (!hwmon)
+		return ERR_PTR(-ENOMEM);
+
+	/* need space for null-termination */
+	hwmon->occ_sensors =
+		devm_kzalloc(dev, sizeof(struct hwmon_channel_info *) *
+			     (MAX_OCC_SENSOR_TYPE + 1), GFP_KERNEL);
+	if (!hwmon->occ_sensors)
+		return ERR_PTR(-ENOMEM);
+
+	hwmon->occ = occ;
+	hwmon->sensor_hwmon_configs = sensor_hwmon_configs;
+	hwmon->occ_info.ops = &occ_hwmon_ops;
+	hwmon->occ_info.info =
+		(const struct hwmon_channel_info **)hwmon->occ_sensors;
+
+	occ_get_response_blocks(occ, &resp);
+
+	for (i = 0; i < MAX_OCC_SENSOR_TYPE; ++i)
+		resp->sensor_block_id[i] = -1;
+
+	/* read sensor data from occ */
+	rc = occ_update_device(occ);
+	if (rc)
+		return ERR_PTR(rc);
+
+	for (i = 0; i < MAX_OCC_SENSOR_TYPE; i++) {
+		id = resp->sensor_block_id[i];
+		if (id < 0)
+			continue;
+
+		num_sensors = resp->blocks[id].header.num_sensors;
+		/* need null-termination */
+		sensor_config = devm_kzalloc(dev,
+					     sizeof(u32) * (num_sensors + 1),
+					     GFP_KERNEL);
+		if (!sensor_config)
+			return ERR_PTR(-ENOMEM);
+
+		for (j = 0; j < num_sensors; j++)
+			sensor_config[j] = sensor_hwmon_configs[i];
+
+		hwmon->occ_sensors[index] =
+			devm_kzalloc(dev, sizeof(struct hwmon_channel_info),
+				     GFP_KERNEL);
+		if (!hwmon->occ_sensors[index])
+			return ERR_PTR(-ENOMEM);
+
+		hwmon->occ_sensors[index]->type = occ_sensor_types[i];
+		hwmon->occ_sensors[index]->config = sensor_config;
+		index++;
+	}
+
+	/* search for bad chars */
+	strncpy(hwmon->hwmon_name, name, OCC_HWMON_NAME_LENGTH);
+	brk = strpbrk(hwmon->hwmon_name, "-* \t\n");
+	while (brk) {
+		*brk = '_';
+		brk = strpbrk(brk,  "-* \t\n");
+	}
+
+	hwmon->dev = devm_hwmon_device_register_with_info(dev,
+							  hwmon->hwmon_name,
+							  hwmon,
+							  &hwmon->occ_info,
+							  NULL);
+	if (IS_ERR(hwmon->dev)) {
+		dev_err(dev, "cannot register hwmon device %s: %ld\n",
+			hwmon->hwmon_name, PTR_ERR(hwmon->dev));
+		return ERR_CAST(hwmon->dev);
+	}
+
+	return hwmon;
+}
+
+MODULE_AUTHOR("Eddie James <[email protected]>");
+MODULE_DESCRIPTION("OCC sysfs driver");
+MODULE_LICENSE("GPL");
drivers/hwmon/occ/occ_sysfs.h new file +25 -0
new file mode 100644
index 0000000..fcd4f59a
@@ -0,0 +1,25 @@
+/*
+ * occ_sysfs.h - OCC sysfs interface
+ *
+ * This file contains the data structures and function prototypes for the OCC
+ * hwmon sysfs entries.
+ *
+ * Copyright 2017 IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __OCC_SYSFS_H__
+#define __OCC_SYSFS_H__
+
+struct occ;
+struct device;
+struct occ_sysfs;
+
+struct occ_sysfs *occ_sysfs_start(struct device *dev, struct occ *occ,
+				  const u32 *sensor_hwmon_configs,
+				  const char *name);
+#endif /* __OCC_SYSFS_H__ */
#4 lore raw

PATCH v8 3/6 hwmon: occ: Add I2C transport implementation for SCOM operations

In reply to Eddie James

From: "Edward A. James" <eajames-r/[email protected]>

Add functions to send SCOM operations over I2C bus. The BMC can communicate with the Power8 host processor over I2C, but needs to use SCOM operations in order to access the OCC register space.

---
 drivers/hwmon/occ/Makefile       |  2 +-
 drivers/hwmon/occ/occ_scom_i2c.c | 69 ++++++++++++++++++++++++++++++++++++++++
 drivers/hwmon/occ/occ_scom_i2c.h | 21 ++++++++++++
 3 files changed, 91 insertions(+), 1 deletion(-)
 create mode 100644 drivers/hwmon/occ/occ_scom_i2c.c
 create mode 100644 drivers/hwmon/occ/occ_scom_i2c.h
drivers/hwmon/occ/Makefile +1 -1
index 67b5367..9cc36e7 100644
@@ -1 +1 @@
-obj-$(CONFIG_SENSORS_IBM_OCC) += occ.o occ_sysfs.o
+obj-$(CONFIG_SENSORS_IBM_OCC) += occ.o occ_sysfs.o occ_scom_i2c.o
drivers/hwmon/occ/occ_scom_i2c.c new file +69 -0

69 lines not on this page · raw message

drivers/hwmon/occ/occ_scom_i2c.h new file +21 -0
new file mode 100644
index 0000000..f84647d
@@ -0,0 +1,21 @@
+/*
+ * occ_scom_i2c.h - hwmon OCC driver
+ *
+ * This file contains function protoypes for peforming SCOM operations over I2C
+ * bus to access the OCC.
+ *
+ * Copyright 2017 IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __OCC_SCOM_I2C_H__
+#define __OCC_SCOM_I2C_H__
+
+int occ_i2c_getscom(void *bus, u32 address, u64 *data);
+int occ_i2c_putscom(void *bus, u32 address, u32 data0, u32 data1);
+
+#endif /* __OCC_SCOM_I2C_H__ */
Signature · 6 lines
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#5 lore raw

PATCH v8 4/6 hwmon: occ: Add callbacks for parsing P8 OCC datastructures

In reply to Eddie James

From: "Edward A. James" <[email protected]>

Add functions to parse the data structures that are specific to the OCC on the POWER8 processor. These are the sensor data structures, including temperature, frequency, power, and "caps."

---
 Documentation/hwmon/occ    |   9 ++
 drivers/hwmon/occ/Makefile |   2 +-
 drivers/hwmon/occ/occ_p8.c | 256 +++++++++++++++++++++++++++++++++++++++++++++
 drivers/hwmon/occ/occ_p8.h |  25 +++++
 4 files changed, 291 insertions(+), 1 deletion(-)
 create mode 100644 drivers/hwmon/occ/occ_p8.c
 create mode 100644 drivers/hwmon/occ/occ_p8.h
Documentation/hwmon/occ +9 -0
index 580af26..4ec8842 100644
@@ -27,6 +27,15 @@ Currently, all versions of the OCC support four types of sensor data: power,
 temperature, frequency, and "caps," which indicate limits and thresholds used
 internally on the OCC.
 
+The format for the POWER8 OCC sensor data can be found in the P8 OCC
+specification:
+github.com/open-power/docs/blob/master/occ/OCC_OpenPwr_FW_Interfaces.pdf
+This document provides the details of the OCC sensors: power, frequency,
+temperature, and caps. These sensor formats are specific to the POWER8 OCC. A
+number of data structures, such as command format, response headers, and the
+like, are also defined in this specification, and are common to both POWER8 and
+POWER9 OCCs.
+
 sysfs Entries
 -------------
 
drivers/hwmon/occ/Makefile +1 -1
index 9cc36e7..f59cca4 100644
@@ -1 +1 @@
-obj-$(CONFIG_SENSORS_IBM_OCC) += occ.o occ_sysfs.o occ_scom_i2c.o
+obj-$(CONFIG_SENSORS_IBM_OCC) += occ.o occ_sysfs.o occ_scom_i2c.o occ_p8.o
drivers/hwmon/occ/occ_p8.c new file +256 -0

256 lines not on this page · raw message

drivers/hwmon/occ/occ_p8.h new file +25 -0
new file mode 100644
index 0000000..5f9cceb
@@ -0,0 +1,25 @@
+/*
+ * occ_p8.h - OCC hwmon driver
+ *
+ * This file contains Power8-specific function prototypes
+ *
+ * Copyright 2017 IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __OCC_P8_H__
+#define __OCC_P8_H__
+
+struct device;
+struct occ;
+struct occ_bus_ops;
+
+const u32 *p8_get_sensor_hwmon_configs(void);
+struct occ *p8_occ_init(struct device *dev, void *bus,
+			const struct occ_bus_ops *bus_ops);
+
+#endif /* __OCC_P8_H__ */
Signature · 1 line
1.8.3.1
#6 lore raw

PATCH v8 5/6 hwmon: occ: Add hwmon implementation for the P8 OCC

In reply to Eddie James

From: "Edward A. James" <[email protected]>

Add code to tie the hwmon sysfs code and the POWER8 OCC code together, as well as probe the entire driver from the I2C bus. I2C is the communication method between the BMC and the P8 OCC.

---
 Documentation/devicetree/bindings/hwmon/occ.txt | 13 ++++
 drivers/hwmon/occ/Kconfig                       | 15 ++++
 drivers/hwmon/occ/Makefile                      |  4 +-
 drivers/hwmon/occ/occ_p8_i2c.c                  | 99 +++++++++++++++++++++++++
 4 files changed, 130 insertions(+), 1 deletion(-)
 create mode 100644 Documentation/devicetree/bindings/hwmon/occ.txt
 create mode 100644 drivers/hwmon/occ/occ_p8_i2c.c
Documentation/devicetree/bindings/hwmon/occ.txt new file +13 -0
new file mode 100644
index 0000000..b0d2b36
@@ -0,0 +1,13 @@
+HWMON I2C driver for IBM POWER CPU OCC (On Chip Controller)
+
+Required properties:
+ - compatible: must be "ibm,p8-occ-i2c"
+ - reg: physical address
+
+Example:
+i2c3: i2c-bus@100 {
+	occ@50 {
+		compatible = "ibm,p8-occ-i2c";
+		reg = <0x50>;
+	};
+};
drivers/hwmon/occ/Kconfig +15 -0
index 61be588..d521720 100644
@@ -11,3 +11,18 @@ menuconfig SENSORS_IBM_OCC
 
 	  Generally this is used by management controllers such as a BMC
 	  on an OpenPower system.
+
+if SENSORS_IBM_OCC
+
+config SENSORS_IBM_OCC_P8_I2C
+	tristate "POWER8 OCC hwmon support"
+	depends on I2C
+	help
+	  Provide a hwmon sysfs interface for the POWER8 On-Chip Controller,
+	  exposing temperature, frequency and power measurements. This
+	  interface runs on the service processor, not the POWER CPU.
+
+	  This driver can also be built as a module. If so, the module will be
+	  called hwmon_occ_p8.
+
+endif
drivers/hwmon/occ/Makefile +3 -1
index f59cca4..864b044 100644
@@ -1 +1,3 @@
-obj-$(CONFIG_SENSORS_IBM_OCC) += occ.o occ_sysfs.o occ_scom_i2c.o occ_p8.o
+obj-$(CONFIG_SENSORS_IBM_OCC_P8_I2C) += hwmon_occ_p8.o
+
+hwmon_occ_p8-objs := occ.o occ_sysfs.o occ_scom_i2c.o occ_p8.o occ_p8_i2c.o
drivers/hwmon/occ/occ_p8_i2c.c new file +99 -0

99 lines not on this page · raw message

Signature · 1 line
1.8.3.1
#7 lore raw

PATCH v8 6/6 hwmon: occ: Add callbacks for parsing P9 OCC datastructures

In reply to Eddie James

From: "Edward A. James" <eajames-r/[email protected]>

Add functions to parse the data structures that are specific to the OCC on the POWER9 processor. These are the sensor data structures, including temperature, frequency, power, and "caps."

---
 Documentation/hwmon/occ    |   3 +
 drivers/hwmon/occ/Kconfig  |  11 ++
 drivers/hwmon/occ/Makefile |   2 +
 drivers/hwmon/occ/occ_p9.c | 320 +++++++++++++++++++++++++++++++++++++++++++++
 drivers/hwmon/occ/occ_p9.h |  25 ++++
 5 files changed, 361 insertions(+)
 create mode 100644 drivers/hwmon/occ/occ_p9.c
 create mode 100644 drivers/hwmon/occ/occ_p9.h
Documentation/hwmon/occ +3 -0
index 4ec8842..8fb3f41 100644
@@ -36,6 +36,9 @@ number of data structures, such as command format, response headers, and the
 like, are also defined in this specification, and are common to both POWER8 and
 POWER9 OCCs.
 
+There is currently no public P9 OCC specification, and the data structures
+defined in the POWER9 OCC driver are subject to change.
+
 sysfs Entries
 -------------
 
drivers/hwmon/occ/Kconfig +11 -0
index d521720..5b8ca27 100644
@@ -25,4 +25,15 @@ config SENSORS_IBM_OCC_P8_I2C
 	  This driver can also be built as a module. If so, the module will be
 	  called hwmon_occ_p8.
 
+config SENSORS_IBM_OCC_P9
+	tristate "POWER9 OCC hwmon support"
+	depends on !SENSORS_IBM_OCC_P8_I2C
+	help
+	  Provide a hwmon sysfs interface for the POWER9 On-Chip Controller,
+	  exposing temperature, frequency, and power measurements. This
+	  interface runs on the service processor, not the POWER CPU.
+
+	  This driver can also be built as a module. If so, the module will be
+	  called hwmon_occ_p9.
+
 endif
drivers/hwmon/occ/Makefile +2 -0
index 864b044..7b3a612 100644
@@ -1,3 +1,5 @@
 obj-$(CONFIG_SENSORS_IBM_OCC_P8_I2C) += hwmon_occ_p8.o
+obj-$(CONFIG_SENSORS_IBM_OCC_P9) += hwmon_occ_p9.o
 
 hwmon_occ_p8-objs := occ.o occ_sysfs.o occ_scom_i2c.o occ_p8.o occ_p8_i2c.o
+hwmon_occ_p9-objs := occ.o occ_sysfs.o occ_p9.o
drivers/hwmon/occ/occ_p9.c new file +320 -0

320 lines not on this page · raw message

drivers/hwmon/occ/occ_p9.h new file +25 -0
new file mode 100644
index 0000000..0fd647a
@@ -0,0 +1,25 @@
+/*
+ * occ_p9.h - OCC hwmon driver
+ *
+ * This file contains Power9-specific function prototypes
+ *
+ * Copyright 2017 IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __OCC_P9_H__
+#define __OCC_P9_H__
+
+struct device;
+struct occ;
+struct occ_bus_ops;
+
+const u32 *p9_get_sensor_hwmon_configs(void);
+struct occ *p9_occ_init(struct device *dev, void *bus,
+			const struct occ_bus_ops *bus_ops);
+
+#endif /* __OCC_P9_H__ */
Signature · 6 lines
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#8 lore raw
In reply to Eddie James

Hi Guenter,

Any thoughts on this patch set? Others welcome to chime in too.

Thanks,
Eddie

Eddie James <[email protected]> wrote on 02/14/2017 02:34:17 PM:

Quoted 9 lines

From: Eddie James <[email protected]>
To: [email protected]
Cc: [email protected], [email protected], linux- [email protected], [email protected], [email protected], [email protected], [email protected], [email protected], wsa@the- dreams.de, [email protected], [email protected], [email protected], Edward James/Austin/IBM@IBMUS
Date: 02/14/2017 02:34 PM
Subject: [PATCH linux v8 0/6] drivers: hwmon: Add On-Chip Controller

driver

Quoted 72 lines

From: "Edward A. James" <[email protected]>

This patchset adds a hwmon driver to support the OCC (On-Chip Controller) on the IBM POWER8 and POWER9 processors, from a BMC (Baseboard Management Controller). The OCC is an embedded processor that provides real time power and thermal monitoring.

The driver provides an interface on a BMC to poll OCC sensor data, set user power caps, and perform some basic OCC error handling. It interfaces with userspace through hwmon.

The driver is currently functional only for the OCC on POWER8 chips. Communicating with the POWER9 OCC requries FSI support.

Since v7:
* change Makefile and Kconfig to build a single module for the driver
* include p9 file in build
* change Kconfig from "PPC" to "IBM"
* remove EXPORT_SYMBOL
* bundle occ_config and occ_ops structures into occ_init_data structure
* few style tweaks suggested by Joel

Edward A. James (6):
hwmon: Add core On-Chip Controller support for POWER CPUs
hwmon: occ: Add sysfs interface
hwmon: occ: Add I2C transport implementation for SCOM operations
hwmon: occ: Add callbacks for parsing P8 OCC datastructures
hwmon: occ: Add hwmon implementation for the P8 OCC
hwmon: occ: Add callbacks for parsing P9 OCC datastructures

 Documentation/devicetree/bindings/hwmon/occ.txt |  13 +
 Documentation/hwmon/occ                         | 116 +++++++
 MAINTAINERS                                     |   7 +
 drivers/hwmon/Kconfig                           |   2 +
 drivers/hwmon/Makefile                          |   1 +
 drivers/hwmon/occ/Kconfig                       |  39 +++
 drivers/hwmon/occ/Makefile                      |   5 +
 drivers/hwmon/occ/occ.c                         | 440 +++++++++++++
+++++++++++
 drivers/hwmon/occ/occ.h                         |  77 +++++
 drivers/hwmon/occ/occ_p8.c                      | 256 ++++++++++++++
 drivers/hwmon/occ/occ_p8.h                      |  25 ++
 drivers/hwmon/occ/occ_p8_i2c.c                  |  99 ++++++
 drivers/hwmon/occ/occ_p9.c                      | 320 +++++++++++++++++
 drivers/hwmon/occ/occ_p9.h                      |  25 ++
 drivers/hwmon/occ/occ_scom_i2c.c                |  69 ++++
 drivers/hwmon/occ/occ_scom_i2c.h                |  21 ++
 drivers/hwmon/occ/occ_sysfs.c                   | 245 +++++++++++++
 drivers/hwmon/occ/occ_sysfs.h                   |  25 ++
 drivers/hwmon/occ/scom.h                        |  42 +++
 19 files changed, 1827 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/hwmon/occ.txt
 create mode 100644 Documentation/hwmon/occ
 create mode 100644 drivers/hwmon/occ/Kconfig
 create mode 100644 drivers/hwmon/occ/Makefile
 create mode 100644 drivers/hwmon/occ/occ.c
 create mode 100644 drivers/hwmon/occ/occ.h
 create mode 100644 drivers/hwmon/occ/occ_p8.c
 create mode 100644 drivers/hwmon/occ/occ_p8.h
 create mode 100644 drivers/hwmon/occ/occ_p8_i2c.c
 create mode 100644 drivers/hwmon/occ/occ_p9.c
 create mode 100644 drivers/hwmon/occ/occ_p9.h
 create mode 100644 drivers/hwmon/occ/occ_scom_i2c.c
 create mode 100644 drivers/hwmon/occ/occ_scom_i2c.h
 create mode 100644 drivers/hwmon/occ/occ_sysfs.c
 create mode 100644 drivers/hwmon/occ/occ_sysfs.h
 create mode 100644 drivers/hwmon/occ/scom.h

--
1.8.3.1

maintainer
#9 lore raw
Quoted 4 lines · Edward James

Hi Guenter,

Any thoughts on this patch set? Others welcome to chime in too.

Sorry, I have been busy. Weekend or next week, hopefully.

Guenter

Quoted 87 lines

Thanks,
Eddie

Eddie James <[email protected]> wrote on 02/14/2017 02:34:17 PM:

Quoted 9 lines

From: Eddie James <[email protected]>
To: [email protected]
Cc: [email protected], [email protected], linux- [email protected], [email protected], [email protected], [email protected], [email protected], [email protected], wsa@the- dreams.de, [email protected], [email protected], [email protected], Edward James/Austin/IBM@IBMUS
Date: 02/14/2017 02:34 PM
Subject: [PATCH linux v8 0/6] drivers: hwmon: Add On-Chip Controller

driver

Quoted 72 lines

From: "Edward A. James" <[email protected]>

This patchset adds a hwmon driver to support the OCC (On-Chip Controller) on the IBM POWER8 and POWER9 processors, from a BMC (Baseboard Management Controller). The OCC is an embedded processor that provides real time power and thermal monitoring.

The driver provides an interface on a BMC to poll OCC sensor data, set user power caps, and perform some basic OCC error handling. It interfaces with userspace through hwmon.

The driver is currently functional only for the OCC on POWER8 chips. Communicating with the POWER9 OCC requries FSI support.

Since v7:
* change Makefile and Kconfig to build a single module for the driver
* include p9 file in build
* change Kconfig from "PPC" to "IBM"
* remove EXPORT_SYMBOL
* bundle occ_config and occ_ops structures into occ_init_data structure
* few style tweaks suggested by Joel

Edward A. James (6):
hwmon: Add core On-Chip Controller support for POWER CPUs
hwmon: occ: Add sysfs interface
hwmon: occ: Add I2C transport implementation for SCOM operations
hwmon: occ: Add callbacks for parsing P8 OCC datastructures
hwmon: occ: Add hwmon implementation for the P8 OCC
hwmon: occ: Add callbacks for parsing P9 OCC datastructures

 Documentation/devicetree/bindings/hwmon/occ.txt |  13 +
 Documentation/hwmon/occ                         | 116 +++++++
 MAINTAINERS                                     |   7 +
 drivers/hwmon/Kconfig                           |   2 +
 drivers/hwmon/Makefile                          |   1 +
 drivers/hwmon/occ/Kconfig                       |  39 +++
 drivers/hwmon/occ/Makefile                      |   5 +
 drivers/hwmon/occ/occ.c                         | 440 +++++++++++++
+++++++++++
 drivers/hwmon/occ/occ.h                         |  77 +++++
 drivers/hwmon/occ/occ_p8.c                      | 256 ++++++++++++++
 drivers/hwmon/occ/occ_p8.h                      |  25 ++
 drivers/hwmon/occ/occ_p8_i2c.c                  |  99 ++++++
 drivers/hwmon/occ/occ_p9.c                      | 320 +++++++++++++++++
 drivers/hwmon/occ/occ_p9.h                      |  25 ++
 drivers/hwmon/occ/occ_scom_i2c.c                |  69 ++++
 drivers/hwmon/occ/occ_scom_i2c.h                |  21 ++
 drivers/hwmon/occ/occ_sysfs.c                   | 245 +++++++++++++
 drivers/hwmon/occ/occ_sysfs.h                   |  25 ++
 drivers/hwmon/occ/scom.h                        |  42 +++
 19 files changed, 1827 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/hwmon/occ.txt
 create mode 100644 Documentation/hwmon/occ
 create mode 100644 drivers/hwmon/occ/Kconfig
 create mode 100644 drivers/hwmon/occ/Makefile
 create mode 100644 drivers/hwmon/occ/occ.c
 create mode 100644 drivers/hwmon/occ/occ.h
 create mode 100644 drivers/hwmon/occ/occ_p8.c
 create mode 100644 drivers/hwmon/occ/occ_p8.h
 create mode 100644 drivers/hwmon/occ/occ_p8_i2c.c
 create mode 100644 drivers/hwmon/occ/occ_p9.c
 create mode 100644 drivers/hwmon/occ/occ_p9.h
 create mode 100644 drivers/hwmon/occ/occ_scom_i2c.c
 create mode 100644 drivers/hwmon/occ/occ_scom_i2c.h
 create mode 100644 drivers/hwmon/occ/occ_sysfs.c
 create mode 100644 drivers/hwmon/occ/occ_sysfs.h
 create mode 100644 drivers/hwmon/occ/scom.h

--
1.8.3.1