fpga: Add flag to indicate bitstream needs decrypting

PATCH In review [email protected] 4 participants 16 messages Feb 20, 2017 – Feb 22, 2017

Subsystems (3)

Device tree bindings Arm/Zynq architecture FPGA manager framework

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[email protected]

author maintainer

2017-02-20 20:55 UTC #0 lore raw

PATCH v2 1/3 fpga: Add flag to indicate bitstream needs decrypting

From: Moritz Fischer <[email protected]>

Add a flag that is passed to the write_init() callback, indicating that the bitstream is encrypted.

The low-level driver will deal with the flag, or return an error, if encrypted bitstreams are not supported.

Signed-off-by Moritz Fischer <[email protected]>

Cc Alan Tull <[email protected]>

Cc Michal Simek <[email protected]>

Cc Sören Brinkmann <[email protected]>

Cc [email protected]

---

Changes from v1:
- Renamed flag from FPGA_MGR_DECRYPT_BITSTREAM->FPGA_MGR_ENCRYPTED_BITSTREAM

---
 include/linux/fpga/fpga-mgr.h | 1 +
 1 file changed, 1 insertion(+)

include/linux/fpga/fpga-mgr.h +1 -0

index 57beb5d..e2ef94f 100644
@@ -70,6 +70,7 @@ enum fpga_mgr_states {
  */
 #define FPGA_MGR_PARTIAL_RECONFIG	BIT(0)
 #define FPGA_MGR_EXTERNAL_CONFIG	BIT(1)
+#define FPGA_MGR_ENCRYPTED_BITSTREAM	BIT(2)
 
 /**
  * struct fpga_image_info - information specific to a FPGA image

Signature · 1 line

2.7.4

[email protected]

author maintainer

2017-02-20 20:55 UTC #1 lore raw

PATCH v2 2/3 fpga: zynq: Add support for encrypted bitstreams

From: Moritz Fischer <[email protected]>

Add support for encrypted bitstreams. For this to work the system must be booted in secure mode.

In order for on-the-fly decryption to work, the PCAP clock rate needs to be lowered via the PCAP_RATE_EN bit.

Signed-off-by Moritz Fischer <[email protected]>

Cc Alan Tull <[email protected]>

Cc Michal Simek <[email protected]>

Cc Sören Brinkmann <[email protected]>

Cc [email protected]

---

Changes from v1:
- Renamed flag from FPGA_MGR_DECRYPT_BITSTREAM->FPGA_MGR_ENCRYPTED_BITSTREAM

---
 drivers/fpga/zynq-fpga.c | 28 +++++++++++++++++++++++++---
 1 file changed, 25 insertions(+), 3 deletions(-)

drivers/fpga/zynq-fpga.c +25 -3

index 34cb981..70b15b3 100644
@@ -72,6 +72,10 @@
 #define CTRL_PCAP_PR_MASK		BIT(27)
 /* Enable PCAP */
 #define CTRL_PCAP_MODE_MASK		BIT(26)
+/* Lower rate to allow decrypt on the fly */
+#define CTRL_PCAP_RATE_EN_MASK		BIT(25)
+/* System booted in secure mode */
+#define CTRL_SEC_EN_MASK		BIT(7)
 
 /* Miscellaneous Control Register bit definitions */
 /* Internal PCAP loopback */

@@ -266,6 +270,17 @@ static int zynq_fpga_ops_write_init(struct fpga_manager *mgr,
 	if (err)
 		return err;
 
+	/* check if bitstream is encrypted & and system's still secure */
+	if (info->flags & FPGA_MGR_ENCRYPTED_BITSTREAM) {
+		ctrl = zynq_fpga_read(priv, CTRL_OFFSET);
+		if (!(ctrl & CTRL_SEC_EN_MASK)) {
+			dev_err(&mgr->dev,
+				"System not secure, can't use crypted bitstreams\n");
+			err = -EINVAL;
+			goto out_err;
+		}
+	}
+
 	/* don't globally reset PL if we're doing partial reconfig */
 	if (!(info->flags & FPGA_MGR_PARTIAL_RECONFIG)) {
 		if (!zynq_fpga_has_sync(buf, count)) {

@@ -337,12 +352,19 @@ static int zynq_fpga_ops_write_init(struct fpga_manager *mgr,
 
 	/* set configuration register with following options:
 	 * - enable PCAP interface
-	 * - set throughput for maximum speed
+	 * - set throughput for maximum speed (if bistream not crypted)
 	 * - set CPU in user mode
 	 */
 	ctrl = zynq_fpga_read(priv, CTRL_OFFSET);
-	zynq_fpga_write(priv, CTRL_OFFSET,
-			(CTRL_PCAP_PR_MASK | CTRL_PCAP_MODE_MASK | ctrl));
+	if (info->flags & FPGA_MGR_ENCRYPTED_BITSTREAM)
+		zynq_fpga_write(priv, CTRL_OFFSET,
+				(CTRL_PCAP_PR_MASK | CTRL_PCAP_MODE_MASK
+				 | CTRL_PCAP_RATE_EN_MASK | ctrl));
+	else
+		zynq_fpga_write(priv, CTRL_OFFSET,
+				(CTRL_PCAP_PR_MASK | CTRL_PCAP_MODE_MASK
+				 | ctrl));
+
 
 	/* We expect that the command queue is empty right now. */
 	status = zynq_fpga_read(priv, STATUS_OFFSET);

Signature · 1 line

2.7.4

Michal Simek

Acked-by on v2 2/3

2017-02-21 13:55 UTC #2 lore raw

Re: [PATCH v2 2/3] fpga: zynq: Add support for encrypted bitstreams

Quoted 70 lines · On 20.2.2017 21:55, [email protected] wrote:

From: Moritz Fischer <[email protected]>

Add support for encrypted bitstreams. For this to work the system must be booted in secure mode.

In order for on-the-fly decryption to work, the PCAP clock rate needs to be lowered via the PCAP_RATE_EN bit.

Signed-off-by Moritz Fischer <[email protected]>

Cc Alan Tull <[email protected]>

Cc Michal Simek <[email protected]>

Cc Sören Brinkmann <[email protected]>

Cc [email protected]

---

Changes from v1:
- Renamed flag from FPGA_MGR_DECRYPT_BITSTREAM->FPGA_MGR_ENCRYPTED_BITSTREAM

---
 drivers/fpga/zynq-fpga.c | 28 +++++++++++++++++++++++++---
 1 file changed, 25 insertions(+), 3 deletions(-)

drivers/fpga/zynq-fpga.c +18 -3

index 34cb981..70b15b3 100644
@@ -72,6 +72,10 @@
 #define CTRL_PCAP_PR_MASK		BIT(27)
 /* Enable PCAP */
 #define CTRL_PCAP_MODE_MASK		BIT(26)
+/* Lower rate to allow decrypt on the fly */
+#define CTRL_PCAP_RATE_EN_MASK		BIT(25)
+/* System booted in secure mode */
+#define CTRL_SEC_EN_MASK		BIT(7)
 
 /* Miscellaneous Control Register bit definitions */
 /* Internal PCAP loopback */

@@ -266,6 +270,17 @@ static int zynq_fpga_ops_write_init(struct fpga_manager *mgr,
 	if (err)
 		return err;
 
+	/* check if bitstream is encrypted & and system's still secure */
+	if (info->flags & FPGA_MGR_ENCRYPTED_BITSTREAM) {
+		ctrl = zynq_fpga_read(priv, CTRL_OFFSET);
+		if (!(ctrl & CTRL_SEC_EN_MASK)) {
+			dev_err(&mgr->dev,
+				"System not secure, can't use crypted bitstreams\n");
+			err = -EINVAL;
+			goto out_err;
+		}
+	}
+
 	/* don't globally reset PL if we're doing partial reconfig */
 	if (!(info->flags & FPGA_MGR_PARTIAL_RECONFIG)) {
 		if (!zynq_fpga_has_sync(buf, count)) {

@@ -337,12 +352,19 @@ static int zynq_fpga_ops_write_init(struct fpga_manager *mgr,
 
 	/* set configuration register with following options:
 	 * - enable PCAP interface
-	 * - set throughput for maximum speed
+	 * - set throughput for maximum speed (if bistream not crypted)
 	 * - set CPU in user mode
 	 */
 	ctrl = zynq_fpga_read(priv, CTRL_OFFSET);
-	zynq_fpga_write(priv, CTRL_OFFSET,
-			(CTRL_PCAP_PR_MASK | CTRL_PCAP_MODE_MASK | ctrl));
+	if (info->flags & FPGA_MGR_ENCRYPTED_BITSTREAM)
+		zynq_fpga_write(priv, CTRL_OFFSET,

drivers/fpga/zynq-fpga.c static int zynq_fpga_ops_write_init(struct fpga_manager *mgr, · line 370

Quoted 10 lines

drivers/fpga/zynq-fpga.c +7 -0

+				(CTRL_PCAP_PR_MASK | CTRL_PCAP_MODE_MASK
+				 | CTRL_PCAP_RATE_EN_MASK | ctrl));
+	else
+		zynq_fpga_write(priv, CTRL_OFFSET,
+				(CTRL_PCAP_PR_MASK | CTRL_PCAP_MODE_MASK
+				 | ctrl));
+
 
 	/* We expect that the command queue is empty right now. */
 	status = zynq_fpga_read(priv, STATUS_OFFSET);

Acked-by Michal Simek <[email protected]>

Thanks,
Michal

Alan Tull

Acked-by

2017-02-21 16:36 UTC #3 lore raw

Re: [PATCH v2 2/3] fpga: zynq: Add support for encrypted bitstreams

Quoted 78 lines · Michal Simek

Quoted 77 lines · On 20.2.2017 21:55, [email protected] wrote:

From: Moritz Fischer <[email protected]>

Add support for encrypted bitstreams. For this to work the system must be booted in secure mode.

In order for on-the-fly decryption to work, the PCAP clock rate needs to be lowered via the PCAP_RATE_EN bit.

Signed-off-by Moritz Fischer <[email protected]>

Cc Alan Tull <[email protected]>

Cc Michal Simek <[email protected]>

Cc Sören Brinkmann <[email protected]>

Cc [email protected]

---

Changes from v1:
- Renamed flag from FPGA_MGR_DECRYPT_BITSTREAM->FPGA_MGR_ENCRYPTED_BITSTREAM

---
 drivers/fpga/zynq-fpga.c | 28 +++++++++++++++++++++++++---
 1 file changed, 25 insertions(+), 3 deletions(-)

drivers/fpga/zynq-fpga.c +25 -3

index 34cb981..70b15b3 100644
@@ -72,6 +72,10 @@
 #define CTRL_PCAP_PR_MASK            BIT(27)
 /* Enable PCAP */
 #define CTRL_PCAP_MODE_MASK          BIT(26)
+/* Lower rate to allow decrypt on the fly */
+#define CTRL_PCAP_RATE_EN_MASK               BIT(25)
+/* System booted in secure mode */
+#define CTRL_SEC_EN_MASK             BIT(7)
 
 /* Miscellaneous Control Register bit definitions */
 /* Internal PCAP loopback */

@@ -266,6 +270,17 @@ static int zynq_fpga_ops_write_init(struct fpga_manager *mgr,
      if (err)
              return err;
 
+     /* check if bitstream is encrypted & and system's still secure */
+     if (info->flags & FPGA_MGR_ENCRYPTED_BITSTREAM) {
+             ctrl = zynq_fpga_read(priv, CTRL_OFFSET);
+             if (!(ctrl & CTRL_SEC_EN_MASK)) {
+                     dev_err(&mgr->dev,
+                             "System not secure, can't use crypted bitstreams\n");
+                     err = -EINVAL;
+                     goto out_err;
+             }
+     }
+
      /* don't globally reset PL if we're doing partial reconfig */
      if (!(info->flags & FPGA_MGR_PARTIAL_RECONFIG)) {
              if (!zynq_fpga_has_sync(buf, count)) {

@@ -337,12 +352,19 @@ static int zynq_fpga_ops_write_init(struct fpga_manager *mgr,
 
      /* set configuration register with following options:
       * - enable PCAP interface
-      * - set throughput for maximum speed
+      * - set throughput for maximum speed (if bistream not crypted)
       * - set CPU in user mode
       */
      ctrl = zynq_fpga_read(priv, CTRL_OFFSET);
-     zynq_fpga_write(priv, CTRL_OFFSET,
-                     (CTRL_PCAP_PR_MASK | CTRL_PCAP_MODE_MASK | ctrl));
+     if (info->flags & FPGA_MGR_ENCRYPTED_BITSTREAM)
+             zynq_fpga_write(priv, CTRL_OFFSET,
+                             (CTRL_PCAP_PR_MASK | CTRL_PCAP_MODE_MASK
+                              | CTRL_PCAP_RATE_EN_MASK | ctrl));
+     else
+             zynq_fpga_write(priv, CTRL_OFFSET,
+                             (CTRL_PCAP_PR_MASK | CTRL_PCAP_MODE_MASK
+                              | ctrl));
+

Quoted 5 lines

drivers/fpga/zynq-fpga.c static int zynq_fpga_ops_write_init(struct fpga_manager *mgr, · line 370
Quoted 3 lines
drivers/fpga/zynq-fpga.c +0 -0
      /* We expect that the command queue is empty right now. */
      status = zynq_fpga_read(priv, STATUS_OFFSET);
Acked-by Michal Simek <[email protected]>

Acked-by Alan Tull <[email protected]>

Quoted 8 lines

Thanks,
Michal
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To unsubscribe from this list: send the line "unsubscribe linux-fpga" in the body of a message to [email protected]
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[email protected]

author maintainer

2017-02-20 20:55 UTC #4 lore raw

PATCH v2 3/3 fpga: region: Add fpga-region property 'encrypted-fpga-config'

In reply to [email protected]

From: Moritz Fischer <[email protected]>

Add fpga-region property to allow passing the fact that the bitstream is encrypted to the fpga-region and ultimately to the low-level driver.

Signed-off-by Moritz Fischer <[email protected]>

Cc Alan Tull <[email protected]>

Cc Michal Simek <[email protected]>

Cc Sören Brinkmann <[email protected]>

Cc [email protected]

---
 Documentation/devicetree/bindings/fpga/fpga-region.txt | 1 +
 drivers/fpga/fpga-region.c                             | 8 ++++++--
 2 files changed, 7 insertions(+), 2 deletions(-)

Documentation/devicetree/bindings/fpga/fpga-region.txt +1 -0

index 3b32ba1..81bf3ad 100644
@@ -186,6 +186,7 @@ Optional properties:
 	otherwise full reconfiguration is done.
 - external-fpga-config : boolean, set if the FPGA has already been configured
 	prior to OS boot up.
+- encrypted-fpga-config : boolean, set if the bitstream is encrypted
 - region-unfreeze-timeout-us : The maximum time in microseconds to wait for
 	bridges to successfully become enabled after the region has been
 	programmed.

drivers/fpga/fpga-region.c +6 -2

index 3222fdb..2fe2a52 100644
@@ -337,8 +337,9 @@ static int child_regions_with_firmware(struct device_node *overlay)
  * The overlay must add either firmware-name or external-fpga-config property
  * to the FPGA Region.
  *
- *   firmware-name        : program the FPGA
- *   external-fpga-config : FPGA is already programmed
+ *   firmware-name         : program the FPGA
+ *   external-fpga-config  : FPGA is already programmed
+ *   encrypted-fpga-config : FPGA bitstream is encrypted
  *
  * The overlay can add other FPGA regions, but child FPGA regions cannot have a
  * firmware-name property since those regions don't exist yet.

@@ -373,6 +374,9 @@ static int fpga_region_notify_pre_apply(struct fpga_region *region,
 	if (of_property_read_bool(nd->overlay, "external-fpga-config"))
 		info->flags |= FPGA_MGR_EXTERNAL_CONFIG;
 
+	if (of_property_read_bool(nd->overlay, "encrypted-fpga-config"))
+		info->flags |= FPGA_MGR_ENCRYPTED_BITSTREAM;
+
 	of_property_read_string(nd->overlay, "firmware-name", &firmware_name);
 
 	of_property_read_u32(nd->overlay, "region-unfreeze-timeout-us",

Signature · 1 line

2.7.4

Michal Simek

Acked-by on v2 3/3

2017-02-21 13:55 UTC #5 lore raw

Re: [PATCH v2 3/3] fpga: region: Add fpga-region property 'encrypted-fpga-config'

Quoted 46 lines · On 20.2.2017 21:55, [email protected] wrote:

From: Moritz Fischer <[email protected]>

Add fpga-region property to allow passing the fact that the bitstream is encrypted to the fpga-region and ultimately to the low-level driver.

Signed-off-by Moritz Fischer <[email protected]>

Cc Alan Tull <[email protected]>

Cc Michal Simek <[email protected]>

Cc Sören Brinkmann <[email protected]>

Cc [email protected]

---
 Documentation/devicetree/bindings/fpga/fpga-region.txt | 1 +
 drivers/fpga/fpga-region.c                             | 8 ++++++--
 2 files changed, 7 insertions(+), 2 deletions(-)

Documentation/devicetree/bindings/fpga/fpga-region.txt +1 -0

index 3b32ba1..81bf3ad 100644
@@ -186,6 +186,7 @@ Optional properties:
 	otherwise full reconfiguration is done.
 - external-fpga-config : boolean, set if the FPGA has already been configured
 	prior to OS boot up.
+- encrypted-fpga-config : boolean, set if the bitstream is encrypted
 - region-unfreeze-timeout-us : The maximum time in microseconds to wait for
 	bridges to successfully become enabled after the region has been
 	programmed.

drivers/fpga/fpga-region.c +3 -2

index 3222fdb..2fe2a52 100644
@@ -337,8 +337,9 @@ static int child_regions_with_firmware(struct device_node *overlay)
  * The overlay must add either firmware-name or external-fpga-config property
  * to the FPGA Region.
  *
- *   firmware-name        : program the FPGA
- *   external-fpga-config : FPGA is already programmed
+ *   firmware-name         : program the FPGA
+ *   external-fpga-config  : FPGA is already programmed
+ *   encrypted-fpga-config : FPGA bitstream is encrypted
  *
  * The overlay can add other FPGA regions, but child FPGA regions cannot have a
  * firmware-name property since those regions don't exist yet.

drivers/fpga/fpga-region.c static int fpga_region_notify_pre_apply(struct fpga_region *region, · line 382

Quoted 9 lines

drivers/fpga/fpga-region.c +3 -0

@@ -373,6 +374,9 @@ static int fpga_region_notify_pre_apply(struct fpga_region *region,
 	if (of_property_read_bool(nd->overlay, "external-fpga-config"))
 		info->flags |= FPGA_MGR_EXTERNAL_CONFIG;
 
+	if (of_property_read_bool(nd->overlay, "encrypted-fpga-config"))
+		info->flags |= FPGA_MGR_ENCRYPTED_BITSTREAM;
+
 	of_property_read_string(nd->overlay, "firmware-name", &firmware_name);
 
 	of_property_read_u32(nd->overlay, "region-unfreeze-timeout-us",

Acked-by Michal Simek <[email protected]>

Thanks,
Michal

Alan Tull

Acked-by

2017-02-21 16:36 UTC #6 lore raw

Re: [PATCH v2 3/3] fpga: region: Add fpga-region property 'encrypted-fpga-config'

Quoted 54 lines · Michal Simek

Quoted 53 lines · On 20.2.2017 21:55, [email protected] wrote:

From: Moritz Fischer <[email protected]>

Add fpga-region property to allow passing the fact that the bitstream is encrypted to the fpga-region and ultimately to the low-level driver.

Signed-off-by Moritz Fischer <[email protected]>

Cc Alan Tull <[email protected]>

Cc Michal Simek <[email protected]>

Cc Sören Brinkmann <[email protected]>

Cc [email protected]

---
 Documentation/devicetree/bindings/fpga/fpga-region.txt | 1 +
 drivers/fpga/fpga-region.c                             | 8 ++++++--
 2 files changed, 7 insertions(+), 2 deletions(-)

Documentation/devicetree/bindings/fpga/fpga-region.txt +1 -0

index 3b32ba1..81bf3ad 100644
@@ -186,6 +186,7 @@ Optional properties:
      otherwise full reconfiguration is done.
 - external-fpga-config : boolean, set if the FPGA has already been configured
      prior to OS boot up.
+- encrypted-fpga-config : boolean, set if the bitstream is encrypted
 - region-unfreeze-timeout-us : The maximum time in microseconds to wait for
      bridges to successfully become enabled after the region has been
      programmed.

drivers/fpga/fpga-region.c +6 -2

index 3222fdb..2fe2a52 100644
@@ -337,8 +337,9 @@ static int child_regions_with_firmware(struct device_node *overlay)
  * The overlay must add either firmware-name or external-fpga-config property
  * to the FPGA Region.
  *
- *   firmware-name        : program the FPGA
- *   external-fpga-config : FPGA is already programmed
+ *   firmware-name         : program the FPGA
+ *   external-fpga-config  : FPGA is already programmed
+ *   encrypted-fpga-config : FPGA bitstream is encrypted
  *
  * The overlay can add other FPGA regions, but child FPGA regions cannot have a
  * firmware-name property since those regions don't exist yet.

@@ -373,6 +374,9 @@ static int fpga_region_notify_pre_apply(struct fpga_region *region,
      if (of_property_read_bool(nd->overlay, "external-fpga-config"))
              info->flags |= FPGA_MGR_EXTERNAL_CONFIG;
 
+     if (of_property_read_bool(nd->overlay, "encrypted-fpga-config"))
+             info->flags |= FPGA_MGR_ENCRYPTED_BITSTREAM;
+
      of_property_read_string(nd->overlay, "firmware-name", &firmware_name);

Quoted 4 lines

drivers/fpga/fpga-region.c static int fpga_region_notify_pre_apply(struct fpga_region *region, · line 382
Quoted 2 lines
drivers/fpga/fpga-region.c +0 -0
      of_property_read_u32(nd->overlay, "region-unfreeze-timeout-us",
Acked-by Michal Simek <[email protected]>

Acked-by Alan Tull <[email protected]>

Quoted 4 lines

Thanks,
Michal

Michal Simek

Acked-by on v2 1/3

2017-02-21 13:55 UTC #7 lore raw

In reply to [email protected]

Quoted 29 lines · On 20.2.2017 21:55, [email protected] wrote:

From: Moritz Fischer <[email protected]>
Add a flag that is passed to the write_init() callback, indicating that the bitstream is encrypted.
The low-level driver will deal with the flag, or return an error, if encrypted bitstreams are not supported.
Signed-off-by Moritz Fischer <[email protected]>
Cc Alan Tull <[email protected]>
Cc Michal Simek <[email protected]>
Cc Sören Brinkmann <[email protected]>
Cc [email protected]
Cc [email protected]
---
Changes from v1:
- Renamed flag from FPGA_MGR_DECRYPT_BITSTREAM->FPGA_MGR_ENCRYPTED_BITSTREAM
---
 include/linux/fpga/fpga-mgr.h | 1 +
 1 file changed, 1 insertion(+)
include/linux/fpga/fpga-mgr.h +0 -0
index 57beb5d..e2ef94f 100644

include/linux/fpga/fpga-mgr.h enum fpga_mgr_states { · line 76

Quoted 7 lines

include/linux/fpga/fpga-mgr.h +1 -0

@@ -70,6 +70,7 @@ enum fpga_mgr_states {
  */
 #define FPGA_MGR_PARTIAL_RECONFIG	BIT(0)
 #define FPGA_MGR_EXTERNAL_CONFIG	BIT(1)
+#define FPGA_MGR_ENCRYPTED_BITSTREAM	BIT(2)
 
 /**
  * struct fpga_image_info - information specific to a FPGA image

Acked-by Michal Simek <[email protected]>

Thanks,
Michal

Alan Tull

Acked-by

2017-02-21 16:35 UTC #8 lore raw

Quoted 34 lines · Michal Simek

Quoted 33 lines · On 20.2.2017 21:55, [email protected] wrote:
From: Moritz Fischer <[email protected]>
Add a flag that is passed to the write_init() callback, indicating that the bitstream is encrypted.
The low-level driver will deal with the flag, or return an error, if encrypted bitstreams are not supported.
Signed-off-by Moritz Fischer <[email protected]>
Cc Alan Tull <[email protected]>
Cc Michal Simek <[email protected]>
Cc Sören Brinkmann <[email protected]>
Cc [email protected]
Cc [email protected]
---
Changes from v1:
- Renamed flag from FPGA_MGR_DECRYPT_BITSTREAM->FPGA_MGR_ENCRYPTED_BITSTREAM
---
 include/linux/fpga/fpga-mgr.h | 1 +
 1 file changed, 1 insertion(+)
include/linux/fpga/fpga-mgr.h +1 -0
index 57beb5d..e2ef94f 100644
@@ -70,6 +70,7 @@ enum fpga_mgr_states {
  */
 #define FPGA_MGR_PARTIAL_RECONFIG    BIT(0)
 #define FPGA_MGR_EXTERNAL_CONFIG     BIT(1)
+#define FPGA_MGR_ENCRYPTED_BITSTREAM BIT(2)
 

Quoted 5 lines

include/linux/fpga/fpga-mgr.h enum fpga_mgr_states { · line 76
Quoted 3 lines
include/linux/fpga/fpga-mgr.h +0 -0
 /**
  * struct fpga_image_info - information specific to a FPGA image
Acked-by Michal Simek <[email protected]>

Acked-by Alan Tull <[email protected]>

Quoted 7 lines

Thanks,
Michal
--
To unsubscribe from this list: send the line "unsubscribe linux-fpga" in the body of a message to [email protected]
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Alan Tull

2017-02-21 18:26 UTC #9 lore raw

On Tue, Feb 21, 2017 at 10:35 AM, Alan Tull <[email protected]>

Hi Greg,

Would it be helpful for us to resend patches for you to take with you on cc? Or is it enough that they are on lkml?

Thanks,
Alan Tull

Quoted 50 lines · wrote:

Quoted 34 lines · Michal Simek
Quoted 33 lines · On 20.2.2017 21:55, [email protected] wrote:
From: Moritz Fischer <[email protected]>
Add a flag that is passed to the write_init() callback, indicating that the bitstream is encrypted.
The low-level driver will deal with the flag, or return an error, if encrypted bitstreams are not supported.
Signed-off-by Moritz Fischer <[email protected]>
Cc Alan Tull <[email protected]>
Cc Michal Simek <[email protected]>
Cc Sören Brinkmann <[email protected]>
Cc [email protected]
Cc [email protected]
---
Changes from v1:
- Renamed flag from FPGA_MGR_DECRYPT_BITSTREAM->FPGA_MGR_ENCRYPTED_BITSTREAM
---
 include/linux/fpga/fpga-mgr.h | 1 +
 1 file changed, 1 insertion(+)
include/linux/fpga/fpga-mgr.h +1 -0
index 57beb5d..e2ef94f 100644
@@ -70,6 +70,7 @@ enum fpga_mgr_states {
  */
 #define FPGA_MGR_PARTIAL_RECONFIG    BIT(0)
 #define FPGA_MGR_EXTERNAL_CONFIG     BIT(1)
+#define FPGA_MGR_ENCRYPTED_BITSTREAM BIT(2)
 
Quoted 5 lines
include/linux/fpga/fpga-mgr.h enum fpga_mgr_states { · line 76
Quoted 3 lines
include/linux/fpga/fpga-mgr.h +0 -0
 /**
  * struct fpga_image_info - information specific to a FPGA image
Acked-by Michal Simek <[email protected]>
Acked-by Alan Tull <[email protected]>
Quoted 7 lines
Thanks,
Michal
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Michal Simek

2017-02-21 18:36 UTC #10 lore raw

Quoted 6 lines · Alan Tull

On Tue, Feb 21, 2017 at 10:35 AM, Alan Tull <[email protected]>
Hi Greg,
Would it be helpful for us to resend patches for you to take with you on cc? Or is it enough that they are on lkml?

Can I know the reason for this? I know that there were some discussion in past. But just add them to your linux-fpga.git repo and send pull request to Greg and proper time when he expects that.

Thanks,
Michal

Alan Tull

2017-02-21 18:38 UTC #11 lore raw

Quoted 12 lines · Michal Simek

Quoted 6 lines · Alan Tull
On Tue, Feb 21, 2017 at 10:35 AM, Alan Tull <[email protected]>
Hi Greg,
Would it be helpful for us to resend patches for you to take with you on cc? Or is it enough that they are on lkml?
Can I know the reason for this? I know that there were some discussion in past. But just add them to your linux-fpga.git repo and send pull request to Greg and proper time when he expects that.

Greg said it was easier for him to take them from email.

Alan

Quoted 3 lines

Thanks,
Michal

Greg Kroah-Hartman

2017-02-22 07:15 UTC #12 lore raw

In reply to Alan Tull

Quoted 6 lines · Alan Tull

On Tue, Feb 21, 2017 at 10:35 AM, Alan Tull <[email protected]>
Hi Greg,
Would it be helpful for us to resend patches for you to take with you on cc? Or is it enough that they are on lkml?

Yes, please send patches with your signed-off-by: for what I should take.

thanks,

greg k-h

Michal Simek

2017-02-22 08:22 UTC #13 lore raw

Quoted 10 lines · Greg Kroah-Hartman

Quoted 6 lines · Alan Tull
On Tue, Feb 21, 2017 at 10:35 AM, Alan Tull <[email protected]>
Hi Greg,
Would it be helpful for us to resend patches for you to take with you on cc? Or is it enough that they are on lkml?
Yes, please send patches with your signed-off-by: for what I should take.

Does it make sense to have git repo in MAINTAINERS file then?

T: git git://git.kernel.org/pub/scm/linux/kernel/git/atull/linux-fpga.git

Thanks,
Michal

Greg Kroah-Hartman

2017-02-22 13:04 UTC #14 lore raw

Quoted 9 lines · Michal Simek

Quoted 8 lines · Greg Kroah-Hartman
Quoted 6 lines · Alan Tull
On Tue, Feb 21, 2017 at 10:35 AM, Alan Tull <[email protected]>
Hi Greg,
Would it be helpful for us to resend patches for you to take with you on cc? Or is it enough that they are on lkml?

Quoted 6 lines

Quoted 2 lines
Yes, please send patches with your signed-off-by: for what I should take.
Does it make sense to have git repo in MAINTAINERS file then?
T: git git://git.kernel.org/pub/scm/linux/kernel/git/atull/linux-fpga.git

Why not, that doesn't mean that's where they get pulled from, but rather, where the latest version of the patches can be found at.

thanks,

greg k-h

Michal Simek

2017-02-22 13:24 UTC #15 lore raw

Quoted 13 lines · Greg Kroah-Hartman

Quoted 12 lines · Michal Simek
Quoted 10 lines · Greg Kroah-Hartman
Quoted 6 lines · Alan Tull
On Tue, Feb 21, 2017 at 10:35 AM, Alan Tull <[email protected]>
Hi Greg,
Would it be helpful for us to resend patches for you to take with you on cc? Or is it enough that they are on lkml?
Yes, please send patches with your signed-off-by: for what I should take.

Quoted 6 lines

Quoted 3 lines
Does it make sense to have git repo in MAINTAINERS file then?
T: git git://git.kernel.org/pub/scm/linux/kernel/git/atull/linux-fpga.git
Why not, that doesn't mean that's where they get pulled from, but rather, where the latest version of the patches can be found at.

ok.

Thanks,
Michal