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pwm: lpc32xx: switch driver to one phandle argument for PWM consumers

PATCH RESEND Superseded slemieux.tyco at gmail.com 1 participant 6 messages Feb 16, 2017 – Mar 28, 2017

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Device tree bindings PWM Arm/LPC32XX SoC support
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slemieux.tyco at gmail.com

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#0 lore raw

cover pwm: lpc32xx: switch driver to one phandle argument for PWM consumers

From: Sylvain Lemieux <[email protected]>

The change adds private of_xlate() function to process one argument given along with a PWM phandle. LPC32xx SoCs have two independent single channel PWM controllers, the argument is used as a description of PWM output frequency, see previous discussion here:

http://www.spinics.net/lists/arm-kernel/msg534068.html

The changes on actual board dts files are not needed at the moment, because all LPC32xx boards in upstream don't describe any PWM consumers.

Please refer to the following URL to view the previous patch #1 review discussion:
http://www.spinics.net/lists/arm-kernel/msg549772.html

The "Reviewed-by" and "Acked-by" from the original posting are added into this resend.

Vladimir Zapolskiy (3):
dt: pwm: lpc32xx: add description of clocks and #pwm-cells properties
pwm: lpc32xx: switch driver to one phandle argument for PWM consumers
pwm: lpc32xx: remove handling of PWM channels

 .../devicetree/bindings/pwm/lpc32xx-pwm.txt        |  7 +++++
 drivers/pwm/pwm-lpc32xx.c                          | 36 +++++++++++++++-------
 2 files changed, 32 insertions(+), 11 deletions(-)
Signature · 1 line
2.11.0
author
#1 lore raw

PATCH RESEND 1/3 dt: pwm: lpc32xx: add description of clocks and #pwm-cells properties

From: Vladimir Zapolskiy <[email protected]>

NXP LPC32xx SoCs have two simple independent PWM controllers with a single output each, in this case there is no need to specify PWM channel argument on client side, one cell for setting PWM output frequency is sufficient.

Another added to the description property 'clocks' has a standard meaning of a controller supply clock, in the LPC32xx User's Manual the clock is denoted as PWM1_CLK or PWM2_CLK clock.

Signed-off-by Vladimir Zapolskiy <[email protected]>
Reviewed-by Sylvain Lemieux <[email protected]>
Acked-by Rob Herring <[email protected]>
---
 Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt | 7 +++++++
 1 file changed, 7 insertions(+)
Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt +7 -0
index 74b5bc5dd19a..523d79662861 100644
@@ -3,15 +3,22 @@ LPC32XX PWM controller
 Required properties:
 - compatible: should be "nxp,lpc3220-pwm"
 - reg: physical base address and length of the controller's registers
+- clocks: clock phandle and clock specifier pair
+- #pwm-cells: should be 1, the cell is used to specify the period in
+  nanoseconds.
 
 Examples:
 
 pwm at 4005c000 {
 	compatible = "nxp,lpc3220-pwm";
 	reg = <0x4005c000 0x4>;
+	clocks = <&clk LPC32XX_CLK_PWM1>;
+	#pwm-cells = <1>;
 };
 
 pwm at 4005c004 {
 	compatible = "nxp,lpc3220-pwm";
 	reg = <0x4005c004 0x4>;
+	clocks = <&clk LPC32XX_CLK_PWM2>;
+	#pwm-cells = <1>;
 };
Signature · 1 line
2.11.0
author
#2 lore raw

PATCH RESEND 1/3 dt: pwm: lpc32xx: add description of clocks and #pwm-cells properties

ping

Quoted 44 lines · slemieux.tyco at gmail.com

From: Vladimir Zapolskiy <[email protected]>

NXP LPC32xx SoCs have two simple independent PWM controllers with a single output each, in this case there is no need to specify PWM channel argument on client side, one cell for setting PWM output frequency is sufficient.

Another added to the description property 'clocks' has a standard meaning of a controller supply clock, in the LPC32xx User's Manual the clock is denoted as PWM1_CLK or PWM2_CLK clock.

Signed-off-by Vladimir Zapolskiy <[email protected]>
Reviewed-by Sylvain Lemieux <[email protected]>
Acked-by Rob Herring <[email protected]>
---
 Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt | 7 +++++++
 1 file changed, 7 insertions(+)
Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt +7 -0
index 74b5bc5dd19a..523d79662861 100644
@@ -3,15 +3,22 @@ LPC32XX PWM controller
 Required properties:
 - compatible: should be "nxp,lpc3220-pwm"
 - reg: physical base address and length of the controller's registers
+- clocks: clock phandle and clock specifier pair
+- #pwm-cells: should be 1, the cell is used to specify the period in
+  nanoseconds.
 
 Examples:
 
 pwm at 4005c000 {
 	compatible = "nxp,lpc3220-pwm";
 	reg = <0x4005c000 0x4>;
+	clocks = <&clk LPC32XX_CLK_PWM1>;
+	#pwm-cells = <1>;
 };
 
 pwm at 4005c004 {
 	compatible = "nxp,lpc3220-pwm";
 	reg = <0x4005c004 0x4>;
+	clocks = <&clk LPC32XX_CLK_PWM2>;
+	#pwm-cells = <1>;
 };
author
#3 lore raw

PATCH RESEND 2/3 pwm: lpc32xx: switch driver to one phandle argument for PWM consumers

In reply to slemieux.tyco at gmail.com

From: Vladimir Zapolskiy <[email protected]>

NXP LPC32xx SoCs have two simple independent PWM controllers with a single output each, in this case there is no need to specify PWM channel argument on client side, one cell for setting PWM output frequency is sufficient.

The change adds private of_xlate() handling of a single cell value given with a PWM phandle on client side, the handling is taken from the PXA PWM driver.

Signed-off-by Vladimir Zapolskiy <[email protected]>
Reviewed-by Sylvain Lemieux <[email protected]>
---
 drivers/pwm/pwm-lpc32xx.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)
drivers/pwm/pwm-lpc32xx.c +16 -0
index a9b3cff96aac..ce8418101e85 100644
@@ -92,6 +92,20 @@ static void lpc32xx_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
 	clk_disable_unprepare(lpc32xx->clk);
 }
 
+static struct pwm_device *lpc32xx_pwm_of_xlate(struct pwm_chip *pc,
+				       const struct of_phandle_args *args)
+{
+	struct pwm_device *pwm;
+
+	pwm = pwm_request_from_chip(pc, 0, NULL);
+	if (IS_ERR(pwm))
+		return pwm;
+
+	pwm->args.period = args->args[0];
+
+	return pwm;
+}
+
 static const struct pwm_ops lpc32xx_pwm_ops = {
 	.config = lpc32xx_pwm_config,
 	.enable = lpc32xx_pwm_enable,

@@ -123,6 +137,8 @@ static int lpc32xx_pwm_probe(struct platform_device *pdev)
 	lpc32xx->chip.ops = &lpc32xx_pwm_ops;
 	lpc32xx->chip.npwm = 1;
 	lpc32xx->chip.base = -1;
+	lpc32xx->chip.of_xlate = lpc32xx_pwm_of_xlate;
+	lpc32xx->chip.of_pwm_n_cells = 1;
 
 	ret = pwmchip_add(&lpc32xx->chip);
 	if (ret < 0) {
Signature · 1 line
2.11.0
author
#4 lore raw

PATCH RESEND 3/3 pwm: lpc32xx: remove handling of PWM channels

In reply to slemieux.tyco at gmail.com

From: Vladimir Zapolskiy <[email protected]>

Because LPC32xx PWM controllers have single output which is registered as the only PWM device/channel per controller, it is known in advance that pwm->hwpwm value is always 0. On basis of this fact simplify the code by removing operations with pwm->hwpwm, there is no controls which require channel number as input.

Signed-off-by Vladimir Zapolskiy <[email protected]>
Reviewed-by Sylvain Lemieux <[email protected]>
---
 drivers/pwm/pwm-lpc32xx.c | 20 +++++++++-----------
 1 file changed, 9 insertions(+), 11 deletions(-)
drivers/pwm/pwm-lpc32xx.c +9 -11
index ce8418101e85..786c887c296d 100644
@@ -55,10 +55,10 @@ static int lpc32xx_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
 	if (duty_cycles > 255)
 		duty_cycles = 255;
 
-	val = readl(lpc32xx->base + (pwm->hwpwm << 2));
+	val = readl(lpc32xx->base);
 	val &= ~0xFFFF;
 	val |= (period_cycles << 8) | duty_cycles;
-	writel(val, lpc32xx->base + (pwm->hwpwm << 2));
+	writel(val, lpc32xx->base);
 
 	return 0;
 }

@@ -73,9 +73,9 @@ static int lpc32xx_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
 	if (ret)
 		return ret;
 
-	val = readl(lpc32xx->base + (pwm->hwpwm << 2));
+	val = readl(lpc32xx->base);
 	val |= PWM_ENABLE;
-	writel(val, lpc32xx->base + (pwm->hwpwm << 2));
+	writel(val, lpc32xx->base);
 
 	return 0;
 }

@@ -85,9 +85,9 @@ static void lpc32xx_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
 	struct lpc32xx_pwm_chip *lpc32xx = to_lpc32xx_pwm_chip(chip);
 	u32 val;
 
-	val = readl(lpc32xx->base + (pwm->hwpwm << 2));
+	val = readl(lpc32xx->base);
 	val &= ~PWM_ENABLE;
-	writel(val, lpc32xx->base + (pwm->hwpwm << 2));
+	writel(val, lpc32xx->base);
 
 	clk_disable_unprepare(lpc32xx->clk);
 }

@@ -147,9 +147,9 @@ static int lpc32xx_pwm_probe(struct platform_device *pdev)
 	}
 
 	/* When PWM is disable, configure the output to the default value */
-	val = readl(lpc32xx->base + (lpc32xx->chip.pwms[0].hwpwm << 2));
+	val = readl(lpc32xx->base);
 	val &= ~PWM_PIN_LEVEL;
-	writel(val, lpc32xx->base + (lpc32xx->chip.pwms[0].hwpwm << 2));
+	writel(val, lpc32xx->base);
 
 	platform_set_drvdata(pdev, lpc32xx);
 

@@ -159,10 +159,8 @@ static int lpc32xx_pwm_probe(struct platform_device *pdev)
 static int lpc32xx_pwm_remove(struct platform_device *pdev)
 {
 	struct lpc32xx_pwm_chip *lpc32xx = platform_get_drvdata(pdev);
-	unsigned int i;
 
-	for (i = 0; i < lpc32xx->chip.npwm; i++)
-		pwm_disable(&lpc32xx->chip.pwms[i]);
+	pwm_disable(&lpc32xx->chip.pwms[0]);
 
 	return pwmchip_remove(&lpc32xx->chip);
 }
Signature · 1 line
2.11.0
author
#5 lore raw

cover pwm: lpc32xx: switch driver to one phandle argument for PWM consumers

In reply to slemieux.tyco at gmail.com
Quoted 11 lines · slemieux.tyco at gmail.com

From: Sylvain Lemieux <[email protected]>

The change adds private of_xlate() function to process one argument given along with a PWM phandle. LPC32xx SoCs have two independent single channel PWM controllers, the argument is used as a description of PWM output frequency, see previous discussion here:

http://www.spinics.net/lists/arm-kernel/msg534068.html

The changes on actual board dts files are not needed at the moment, because all LPC32xx boards in upstream don't describe any PWM consumers.

Please refer to the following URL to view the previous patch #1 review discussion:
http://www.spinics.net/lists/arm-kernel/msg549772.html

Hi Thierry,

can you take this patchset for 4.12?

Let me know if you have more questions.

Regards,
Sylvain

Quoted 11 lines

The "Reviewed-by" and "Acked-by" from the original posting are added into this resend.

Vladimir Zapolskiy (3):
dt: pwm: lpc32xx: add description of clocks and #pwm-cells properties
pwm: lpc32xx: switch driver to one phandle argument for PWM consumers
pwm: lpc32xx: remove handling of PWM channels

 .../devicetree/bindings/pwm/lpc32xx-pwm.txt        |  7 +++++
 drivers/pwm/pwm-lpc32xx.c                          | 36 +++++++++++++++-------
 2 files changed, 32 insertions(+), 11 deletions(-)