arc: introduce timer driver and update device tree
v3 cover arc: introduce timer driver and update device tree
ARC cores may have up to 2 built-in timers: timer0 and timer1, usually at least one of them exists. They both are driven by the same core clock.
They are controlled through auxiliary registers and so we don't have to remap their control registers as we used to do with MMIO registers of external peripheral devices.
This patch series replaces legacy approach to access ARC timer via specific code in "arch/arc/lib/time.c" and uses timer driver instead.
We want to have common device tree blobs for both Linux and U-Boot. To achieve this the patch updates arc device trees with the following:
1. Separate axs10x.dts device tree in order to reflect the real structure of AXS101 and AXS103 development boards.
2. Add timer device to skeleton ARC device tree.
3. Add core_clk devices to all ARC boards as it is referenced from timer device.
---
Changes v2..v3:
- Rebase on top of upstream master
Vlad Zakharov (3):
drivers: timer: Introduce ARC timer driver
arc: dts: separate single axs10x.dts file
arc: use timer driver for ARC boards
arch/Kconfig | 3 + arch/arc/Kconfig | 9 ++- arch/arc/dts/Makefile | 3 +- arch/arc/dts/abilis_tb100.dts | 12 ++- arch/arc/dts/axc001.dtsi | 19 +++++ arch/arc/dts/axc003.dtsi | 19 +++++ arch/arc/dts/axs101.dts | 19 +++++ arch/arc/dts/axs103.dts | 19 +++++ arch/arc/dts/axs10x.dts | 57 -------------- arch/arc/dts/axs10x_mb.dtsi | 66 ++++++++++++++++ arch/arc/dts/nsim.dts | 12 ++- arch/arc/dts/skeleton.dtsi | 19 ++++- arch/arc/include/asm/arcregs.h | 4 + arch/arc/lib/Makefile | 1 - arch/arc/lib/timer.c | 24 ------ board/synopsys/axs10x/Kconfig | 2 +- configs/axs101_defconfig | 4 +- configs/axs103_defconfig | 3 +- doc/device-tree-bindings/timer/arc_timer.txt | 24 ++++++ drivers/timer/Kconfig | 9 +++ drivers/timer/Makefile | 1 + drivers/timer/arc_timer.c | 113 +++++++++++++++++++++++++++ include/configs/axs10x.h | 2 - include/configs/nsim.h | 5 -- include/configs/tb100.h | 5 -- 25 files changed, 344 insertions(+), 110 deletions(-) create mode 100644 arch/arc/dts/axc001.dtsi create mode 100644 arch/arc/dts/axc003.dtsi create mode 100644 arch/arc/dts/axs101.dts create mode 100644 arch/arc/dts/axs103.dts delete mode 100644 arch/arc/dts/axs10x.dts create mode 100644 arch/arc/dts/axs10x_mb.dtsi delete mode 100644 arch/arc/lib/timer.c create mode 100644 doc/device-tree-bindings/timer/arc_timer.txt create mode 100644 drivers/timer/arc_timer.c
Signature · 1 line
2.7.4
PATCH v3 1/3 drivers: timer: Introduce ARC timer driver
This commit introduces timer driver for ARC.
ARC timers are configured via ARC AUX registers so we use special functions to access timer control registers.
This driver allows utilization of either timer0 or timer1 depending on which one is available in real hardware. Essentially only existing timers should be mentioned in board's Device Tree description.
---
Changes v2..v3:
- Rebase on top of upstream master
arch/arc/include/asm/arcregs.h | 4 + doc/device-tree-bindings/timer/arc_timer.txt | 24 ++++++ drivers/timer/Kconfig | 9 +++ drivers/timer/Makefile | 1 + drivers/timer/arc_timer.c | 113 +++++++++++++++++++++++++++ 5 files changed, 151 insertions(+) create mode 100644 doc/device-tree-bindings/timer/arc_timer.txt create mode 100644 drivers/timer/arc_timer.c
arch/arc/include/asm/arcregs.h +4 -0
@@ -33,6 +33,10 @@#define ARC_AUX_TIMER0_CTRL 0x22/* Timer 0 control */ #define ARC_AUX_TIMER0_LIMIT 0x23/* Timer 0 limit */ +#define ARC_AUX_TIMER1_CNT 0x100/* Timer 1 count */ +#define ARC_AUX_TIMER1_CTRL 0x101/* Timer 1 control */ +#define ARC_AUX_TIMER1_LIMIT 0x102/* Timer 1 limit */ +#define ARC_AUX_INTR_VEC_BASE 0x25/* Data cache related auxiliary registers */
doc/device-tree-bindings/timer/arc_timer.txt new file +24 -0
@@ -0,0 +1,24 @@ +ARC Timer + +Required properties: + +- compatible : should be "snps,arc-timer". +- reg : Specifies timer ID, could be either 0 or 1. +- clocks : Specifies clocks that drives the counter. + +Examples: + +timer at 0 { + compatible = "snps,arc-timer"; + clocks = <&core_clk>; + reg = <0>; +}; + +timer at 1 { + compatible = "snps,arc-timer"; + clocks = <&core_clk>; + reg = <1>; +}; + +NOTE: if you specify both timers, clocks always should be the same +as each timer is driven by the same core clock.
drivers/timer/Kconfig +9 -0
@@ -65,4 +65,13 @@ config STI_TIMER help Select this to enable a timer for STi devices. +config ARC_TIMER + bool "ARC timer support" + depends on TIMER && ARC && CLK + help + Select this to enable built-in ARC timers. + ARC cores may have up to 2 built-in timers: timer0 and timer1, + usually at least one of them exists. Either of them is supported + in U-Boot. + endmenu
drivers/timer/Makefile +1 -0
@@ -11,3 +11,4 @@ obj-$(CONFIG_X86_TSC_TIMER) += tsc_timer.o obj-$(CONFIG_OMAP_TIMER) += omap-timer.o obj-$(CONFIG_AST_TIMER) += ast_timer.o obj-$(CONFIG_STI_TIMER) += sti-timer.o +obj-$(CONFIG_ARC_TIMER) += arc_timer.o
drivers/timer/arc_timer.c new file +113 -0
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Signature · 1 line
2.7.4
PATCH v3 2/3 arc: dts: separate single axs10x.dts file
In reply to Vlad ZakharovWe want to use the same device tree blobs in both Linux and U-Boot for ARC boards.
Earlier device tree sources in U-Boot were very simplified and hadn't been updated for quite a long period of time.
So this commit is the first step on the road to unified device tree blobs.
First of all we re-organize device tree sources for AXS10X boards. As AXS101 and AXS103 boards consist of AXS10X motherboard and AXC001 and AXC003 cpu tiles respectively we add corresponding device tree source
files: axs10x_mb.dtsi for motherboard, axc001.dtsi and axc003.dtsi for cpu tiles and axs101.dts and axs103.dts to represent actual boards.
Also we delete axs10x.dts as it is no longer used.
One more important change - we add timer device to ARC skeleton device tree sources as both ARC700 and ARCHS cores contain such timer. We add core_clk nodes to abilis_tb100, nsim, axc001 and axc003 device tree sources as it is referenced via phandle from timer node in common skeleton.dtsi file.
---
Changes v2..v3:
- Rebase on top of upstream master
arch/arc/Kconfig | 9 ++++-- arch/arc/dts/Makefile | 3 +- arch/arc/dts/abilis_tb100.dts | 12 ++++++-- arch/arc/dts/axc001.dtsi | 19 +++++++++++++ arch/arc/dts/axc003.dtsi | 19 +++++++++++++ arch/arc/dts/axs101.dts | 19 +++++++++++++ arch/arc/dts/axs103.dts | 19 +++++++++++++ arch/arc/dts/axs10x.dts | 57 ------------------------------------- arch/arc/dts/axs10x_mb.dtsi | 66 +++++++++++++++++++++++++++++++++++++++++++ arch/arc/dts/nsim.dts | 12 ++++++-- arch/arc/dts/skeleton.dtsi | 19 ++++++++++++- board/synopsys/axs10x/Kconfig | 2 +- configs/axs101_defconfig | 3 +- configs/axs103_defconfig | 2 +- 14 files changed, 190 insertions(+), 71 deletions(-) create mode 100644 arch/arc/dts/axc001.dtsi create mode 100644 arch/arc/dts/axc003.dtsi create mode 100644 arch/arc/dts/axs101.dts create mode 100644 arch/arc/dts/axs103.dts delete mode 100644 arch/arc/dts/axs10x.dts create mode 100644 arch/arc/dts/axs10x_mb.dtsi
arch/arc/Kconfig +6 -3
@@ -118,7 +118,7 @@ config SYS_DCACHE_OFF choice prompt "Target select" - default TARGET_AXS10X + default TARGET_AXS103 config TARGET_TB100 bool "Support tb100"
@@ -126,8 +126,11 @@ config TARGET_TB100 config TARGET_NSIM bool "Support standalone nSIM & Free nSIM" -config TARGET_AXS10X - bool "Support Synopsys Designware SDP board (AXS101 & AXS103)" +config TARGET_AXS101 + bool "Support Synopsys Designware SDP board AXS101" + +config TARGET_AXS103 + bool "Support Synopsys Designware SDP board AXS103" endchoice
arch/arc/dts/Makefile +2 -1
@@ -2,7 +2,8 @@ # SPDX-License-Identifier: GPL-2.0+ # -dtb-$(CONFIG_TARGET_AXS10X) += axs10x.dtb +dtb-$(CONFIG_TARGET_AXS101) += axs101.dtb +dtb-$(CONFIG_TARGET_AXS103) += axs103.dtb dtb-$(CONFIG_TARGET_NSIM) += nsim.dtb dtb-$(CONFIG_TARGET_TB100) += abilis_tb100.dtb
arch/arc/dts/abilis_tb100.dts +9 -3
@@ -8,13 +8,19 @@ #include "skeleton.dtsi" / { - #address-cells = <1>; - #size-cells = <1>; - aliases { console = &uart0; }; + cpu_card { + core_clk: core_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <500000000>; + u-boot,dm-pre-reloc; + }; + }; + uart0: serial at ff100000 { compatible = "snps,dw-apb-uart"; reg = <0xff100000 0x1000>;
arch/arc/dts/axc001.dtsi new file +19 -0
@@ -0,0 +1,19 @@ +/* + * Copyright (C) 2017 Synopsys, Inc. All rights reserved. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/include/ "skeleton.dtsi" + +/ { + cpu_card { + core_clk: core_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <750000000>; + u-boot,dm-pre-reloc; + }; + }; +}; +
arch/arc/dts/axc003.dtsi new file +19 -0
@@ -0,0 +1,19 @@ +/* + * Copyright (C) 2017 Synopsys, Inc. All rights reserved. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/include/ "skeleton.dtsi" + +/ { + cpu_card { + core_clk: core_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <100000000>; + u-boot,dm-pre-reloc; + }; + }; +}; +
arch/arc/dts/axs101.dts new file +19 -0
@@ -0,0 +1,19 @@ +/* + * Copyright (C) 2017 Synopsys, Inc. All rights reserved. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +/dts-v1/; + +/include/ "axc001.dtsi" +/include/ "axs10x_mb.dtsi" + + +/ { + model = "snps,axs101"; + + chosen { + stdout-path = &uart0; + }; +}; +
arch/arc/dts/axs103.dts new file +19 -0
@@ -0,0 +1,19 @@ +/* + * Copyright (C) 2017 Synopsys, Inc. All rights reserved. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +/dts-v1/; + +/include/ "axc003.dtsi" +/include/ "axs10x_mb.dtsi" + + +/ { + model = "snps,axs103"; + + chosen { + stdout-path = &uart0; + }; +}; +
arch/arc/dts/axs10x.dts deleted +0 -57
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arch/arc/dts/axs10x_mb.dtsi new file +66 -0
66 lines not on this page · raw message
arch/arc/dts/nsim.dts +9 -3
@@ -8,13 +8,19 @@ #include "skeleton.dtsi" / { - #address-cells = <1>; - #size-cells = <1>; - aliases { console = &arcuart0; }; + cpu_card { + core_clk: core_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <70000000>; + u-boot,dm-pre-reloc; + }; + }; + arcuart0: serial at 0xc0fc1000 { compatible = "snps,arc-uart"; reg = <0xc0fc1000 0x100>;
arch/arc/dts/skeleton.dtsi +18 -1
@@ -9,5 +9,22 @@ #size-cells = <1>; chosen { }; aliases { }; - memory { device_type = "memory"; reg = <0 0>; }; + + cpu_card { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + u-boot,dm-pre-reloc; + + timer at 0 { + compatible = "snps,arc-timer"; + clocks = <&core_clk>; + reg = <0 1>; + }; + }; + + memory at 80000000 { + device_type = "memory"; + reg = <0x80000000 0x10000000>; /* 256M */ + }; };
board/synopsys/axs10x/Kconfig +1 -1
@@ -1,4 +1,4 @@ -if TARGET_AXS10X +if TARGET_AXS101 || TARGET_AXS103 config SYS_BOARD default "axs10x"
configs/axs101_defconfig +2 -1
@@ -1,8 +1,9 @@ CONFIG_ARC=y CONFIG_SYS_DCACHE_OFF=y +CONFIG_TARGET_AXS101=y CONFIG_SYS_TEXT_BASE=0x81000000 CONFIG_SYS_CLK_FREQ=750000000 -CONFIG_DEFAULT_DEVICE_TREE="axs10x" +CONFIG_DEFAULT_DEVICE_TREE="axs101" CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="AXS# "
configs/axs103_defconfig +1 -1
@@ -2,7 +2,7 @@ CONFIG_ARC=y CONFIG_ISA_ARCV2=y CONFIG_SYS_TEXT_BASE=0x81000000 CONFIG_SYS_CLK_FREQ=100000000 -CONFIG_DEFAULT_DEVICE_TREE="axs10x" +CONFIG_DEFAULT_DEVICE_TREE="axs103" CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="AXS# "
Signature · 1 line
2.7.4
PATCH v3 3/3 arc: use timer driver for ARC boards
In reply to Vlad ZakharovThis commit replaces legacy timer code with usage of arc timer driver.
It removes arch/arc/lib/time.c file and selects CONFIG_CLK, CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default. Therefore we remove CONFIG_CLK option from less common axs101 and axs103 defconfigs.
Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from axs10x.h, tb100.h and nsim.h configs files as it is no longer required.
---
Changes v2..v3:
- Rebase on top of upstream master
No changes compared to v1
arch/Kconfig | 3 +++ arch/arc/lib/Makefile | 1 - arch/arc/lib/timer.c | 24 ------------------------ configs/axs101_defconfig | 1 - configs/axs103_defconfig | 1 - include/configs/axs10x.h | 2 -- include/configs/nsim.h | 5 ----- include/configs/tb100.h | 5 ----- 8 files changed, 3 insertions(+), 39 deletions(-) delete mode 100644 arch/arc/lib/timer.c
arch/Kconfig +3 -0
@@ -13,6 +13,9 @@ config ARC select HAVE_PRIVATE_LIBGCC select SUPPORT_OF_CONTROL select ARCH_EARLY_INIT_R + select CLK + select TIMER + select ARC_TIMER config ARM bool "ARM architecture"
arch/arc/lib/Makefile +0 -1
@@ -18,7 +18,6 @@ obj-y += memcmp.o obj-y += memcpy-700.o obj-y += memset.o obj-y += reset.o -obj-y += timer.o obj-y += ints_low.o obj-y += init_helpers.o
arch/arc/lib/timer.c deleted +0 -24
@@ -1,24 +0,0 @@ -/* -* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved. -* -* SPDX-License-Identifier: GPL-2.0+ -*/ - -#include <asm/arcregs.h> - -#define NH_MODE (1 << 1)/* Disable timer if CPU is halted */ - -int timer_init (void ) -{ -write_aux_reg (ARC_AUX_TIMER0_CTRL ,NH_MODE ); -/* Set max value for counter/timer */ -write_aux_reg (ARC_AUX_TIMER0_LIMIT ,0xffffffff ); -/* Set initial count value and restart counter/timer */ -write_aux_reg (ARC_AUX_TIMER0_CNT ,0 ); -return 0 ; -} - -unsigned long timer_read_counter (void ) -{ -return read_aux_reg (ARC_AUX_TIMER0_CNT ); -}
configs/axs101_defconfig +0 -1
@@ -19,7 +19,6 @@ CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y -CONFIG_CLK=y CONFIG_SYS_I2C_DW=y CONFIG_MMC=y CONFIG_MMC_DW=y
configs/axs103_defconfig +0 -1
@@ -18,7 +18,6 @@ CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y -CONFIG_CLK=y CONFIG_SYS_I2C_DW=y CONFIG_MMC=y CONFIG_MMC_DW=y
include/configs/axs10x.h +0 -2
@@ -11,8 +11,6 @@/* * CPU configuration */ -#define CONFIG_SYS_TIMER_RATE CONFIG_SYS_CLK_FREQ -#define ARC_FPGA_PERIPHERAL_BASE 0xE0000000#define ARC_APB_PERIPHERAL_BASE 0xF0000000#define ARC_DWMMC_BASE (ARC_FPGA_PERIPHERAL_BASE + 0x15000)
include/configs/nsim.h +0 -5
@@ -10,11 +10,6 @@#include <linux/sizes.h> /* -* CPU configuration -*/ -#define CONFIG_SYS_TIMER_RATE CONFIG_SYS_CLK_FREQ - -/* * Memory configuration */ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
include/configs/tb100.h +0 -5
@@ -10,11 +10,6 @@#include <linux/sizes.h> /* -* CPU configuration -*/ -#define CONFIG_SYS_TIMER_RATE CONFIG_SYS_CLK_FREQ - -/* * Memory configuration */ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Signature · 1 line
2.7.4
Alexey Brodkin
Appliedv3 cover arc: introduce timer driver and update device tree
In reply to Vlad ZakharovHi Vlad,
Quoted 20 lines · Vlad Zakharov
ARC cores may have up to 2 built-in timers: timer0 and timer1, usually at least one of them exists. They both are driven by the same core clock.
They are controlled through auxiliary registers and so we don't have to remap their control registers as we used to do with MMIO registers of external peripheral devices.
This patch series replaces legacy approach to access ARC timer via specific code in "
arch/arc/lib/time.c" and uses timer driver instead.We want to have common device tree blobs for both Linux and U-Boot. To achieve this the patch updates arc device trees with the following:
1. Separateaxs10x.dtsdevice tree in order to reflect the real structure of AXS101 and AXS103 development boards.
2. Add timer device to skeleton ARC device tree.
3. Addcore_clkdevices to all ARC boards as it is referenced from timer device.
Quoted 8 lines
---
Changes v2..v3:
- Rebase on top of upstream masterVlad Zakharov (3):
drivers: timer: Introduce ARC timer driver
arc: dts: separate singleaxs10x.dtsfile
arc: use timer driver for ARC boards
Applied to my tree, thanks!
-Alexey