Patch "clk: sunxi-ng: sun6i: Fix enable bit offset for hdmi-ddc module clock" has been added to the 4.10-stable tree

This is a note to let you know that I've just added the patch titled

clk: sunxi-ng: sun6i: Fix enable bit offset for hdmi-ddc module clock

to the 4.10-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
clk-sunxi-ng-sun6i-fix-enable-bit-offset-for-hdmi-ddc-module-clock.patch
and it can be found in the queue-4.10 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.

From: Chen-Yu Tsai <[email protected]>
Date: Tue, 14 Feb 2017 10:23:32 +0800
Subject: clk: sunxi-ng: sun6i: Fix enable bit offset for hdmi-ddc module clock

From: Chen-Yu Tsai <[email protected]>

commit 9ad0bb39fce319d7b92c17d306ed0a9f70a02e7d upstream.

The enable bit offset for the hdmi-ddc module clock is wrong. It is pointing to the main hdmi module clock enable bit.

---
 drivers/clk/sunxi-ng/ccu-sun6i-a31.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

@@ -608,7 +608,7 @@ static SUNXI_CCU_M_WITH_MUX_GATE(hdmi_cl
 				 0x150, 0, 4, 24, 2, BIT(31),
 				 CLK_SET_RATE_PARENT);
 
-static SUNXI_CCU_GATE(hdmi_ddc_clk, "hdmi-ddc", "osc24M", 0x150, BIT(31), 0);
+static SUNXI_CCU_GATE(hdmi_ddc_clk, "hdmi-ddc", "osc24M", 0x150, BIT(30), 0);
 
 static SUNXI_CCU_GATE(ps_clk, "ps", "lcd1-ch1", 0x140, BIT(31), 0);
 

Patches currently in stable-queue which might be from [email protected] are

queue-4.10/clk-sunxi-ng-mp-adjust-parent-rate-for-pre-dividers.patch queue-4.10/clk-sunxi-ng-sun6i-fix-enable-bit-offset-for-hdmi-ddc-module-clock.patch