Patch "ARCv2: SLC: Make sure busy bit is set properly on SLC flushing" has been added to the 4.10-stable tree

This is a note to let you know that I've just added the patch titled

ARCv2: SLC: Make sure busy bit is set properly on SLC flushing

to the 4.10-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
arcv2-slc-make-sure-busy-bit-is-set-properly-on-slc-flushing.patch
and it can be found in the queue-4.10 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.

From: Alexey Brodkin <[email protected]>
Date: Wed, 29 Mar 2017 17:15:11 +0300
Subject: ARCv2: SLC: Make sure busy bit is set properly on SLC flushing

From: Alexey Brodkin <[email protected]>

commit c70c473396cbdec1168a6eff60e13029c0916854 upstream.

As reported in STAR 9001165532, an SLC control reg read (for checking busy state) right after SLC invalidate command may incorrectly return NOT busy causing software to NOT spin-wait while operation is underway. (and for some reason this only happens if L1 cache is also disabled - as required by IOC programming model)

Suggested workaround is to do an additional Control Reg read, which ensures the 2nd read gets the right status.

---
 arch/arc/mm/cache.c |    3 +++
 1 file changed, 3 insertions(+)

@@ -633,6 +633,9 @@ noinline static void slc_entire_op(const
 
 	write_aux_reg(ARC_REG_SLC_INVALIDATE, 1);
 
+	/* Make sure "busy" bit reports correct stataus, see STAR 9001165532 */
+	read_aux_reg(r);
+
 	/* Important to wait for flush to complete */
 	while (read_aux_reg(r) & SLC_CTRL_BUSY);
 }

Patches currently in stable-queue which might be from [email protected] are

queue-4.10/arcv2-slc-make-sure-busy-bit-is-set-properly-on-slc-flushing.patch