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Add support for Broadcom MIPS SoCs

PATCH New Álvaro Fernández Rojas 4 participants 104 messages Apr 13, 2017 – Apr 30, 2017

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#0 lore raw

cover Add support for Broadcom MIPS SoCs

This adds support for some of the xDSL Broadcom MIPS SoCs:
- BCM6358
- BCM6328
- BCM63268
However, support for other SoCs could be added in the future:
- Other BCM63xx
- BCM33xx
- BCM71xx

Álvaro Fernández Rojas (8):
cmd: cpu: fix NULL cpu feature prints
sysreset: add syscon-reboot driver
mips: allow using generic sysreset drivers
serial: add serial driver for BCM6345
mips: add support for Broadcom MIPS
mips: bmips: fix first CPU check
mips: bmips: fix ioremap for BCM6358
mips: bmips: add support for raw .elf images

 Makefile                                     |  22 ++
 arch/mips/Kconfig                            |  10 +
 arch/mips/Makefile                           |   1 +
 arch/mips/cpu/cpu.c                          |   2 +
 arch/mips/cpu/start.S                        |   5 +
 arch/mips/cpu/u-boot-elf.lds                 |  10 +
 arch/mips/dts/Makefile                       |   3 +
 arch/mips/dts/brcm,bcm63268.dtsi             |  87 +++++++
 arch/mips/dts/brcm,bcm6328.dtsi              |  87 +++++++
 arch/mips/dts/brcm,bcm6358.dtsi              |  97 ++++++++
 arch/mips/dts/comtrend,ar-5387un.dts         |  27 +++
 arch/mips/dts/comtrend,vr-3032u.dts          |  27 +++
 arch/mips/dts/huawei,hg556a.dts              |  31 +++
 arch/mips/include/asm/mach-generic/ioremap.h |  15 +-
 arch/mips/mach-bmips/Kconfig                 |  86 +++++++
 arch/mips/mach-bmips/Makefile                |   5 +
 arch/mips/mach-bmips/dram.c                  |  37 +++
 board/comtrend/ar5387un/Kconfig              |  24 ++
 board/comtrend/ar5387un/MAINTAINERS          |   6 +
 board/comtrend/ar5387un/Makefile             |   5 +
 board/comtrend/ar5387un/ar-5387un.c          |  22 ++
 board/comtrend/vr3032u/Kconfig               |  24 ++
 board/comtrend/vr3032u/MAINTAINERS           |   6 +
 board/comtrend/vr3032u/Makefile              |   5 +
 board/comtrend/vr3032u/vr-3032u.c            |  22 ++
 board/huawei/hg556a/Kconfig                  |  24 ++
 board/huawei/hg556a/MAINTAINERS              |   6 +
 board/huawei/hg556a/Makefile                 |   5 +
 board/huawei/hg556a/hg556a.c                 |  22 ++
 cmd/cpu.c                                    |   3 +-
 configs/comtrend_ar5387un_ram_defconfig      |  47 ++++
 configs/comtrend_vr3032u_ram_defconfig       |  47 ++++
 configs/huawei_hg556a_ram_defconfig          |  47 ++++
 drivers/cpu/Makefile                         |   2 +
 drivers/cpu/bmips_cpu.c                      | 268 +++++++++++++++++++++
 drivers/ram/Makefile                         |   2 +
 drivers/ram/bmips_ram.c                      | 126 ++++++++++
 drivers/serial/Kconfig                       |  14 ++
 drivers/serial/Makefile                      |   1 +
 drivers/serial/serial_bcm6345.c              | 341 +++++++++++++++++++++++++++
 drivers/sysreset/Kconfig                     |   8 +
 drivers/sysreset/Makefile                    |   1 +
 drivers/sysreset/sysreset_syscon.c           |  60 +++++
 include/configs/bmips_bcm63268.h             |  25 ++
 include/configs/bmips_bcm6328.h              |  25 ++
 include/configs/bmips_bcm6358.h              |  27 +++
 include/configs/bmips_common.h               |  26 ++
 include/configs/comtrend_ar5387un.h          |  15 ++
 include/configs/comtrend_vr3032u.h           |  15 ++
 include/configs/huawei_hg556a.h              |  15 ++
 50 files changed, 1836 insertions(+), 2 deletions(-)
 create mode 100644 arch/mips/cpu/u-boot-elf.lds
 create mode 100644 arch/mips/dts/brcm,bcm63268.dtsi
 create mode 100644 arch/mips/dts/brcm,bcm6328.dtsi
 create mode 100644 arch/mips/dts/brcm,bcm6358.dtsi
 create mode 100644 arch/mips/dts/comtrend,ar-5387un.dts
 create mode 100644 arch/mips/dts/comtrend,vr-3032u.dts
 create mode 100644 arch/mips/dts/huawei,hg556a.dts
 create mode 100644 arch/mips/mach-bmips/Kconfig
 create mode 100644 arch/mips/mach-bmips/Makefile
 create mode 100644 arch/mips/mach-bmips/dram.c
 create mode 100644 board/comtrend/ar5387un/Kconfig
 create mode 100644 board/comtrend/ar5387un/MAINTAINERS
 create mode 100644 board/comtrend/ar5387un/Makefile
 create mode 100644 board/comtrend/ar5387un/ar-5387un.c
 create mode 100644 board/comtrend/vr3032u/Kconfig
 create mode 100644 board/comtrend/vr3032u/MAINTAINERS
 create mode 100644 board/comtrend/vr3032u/Makefile
 create mode 100644 board/comtrend/vr3032u/vr-3032u.c
 create mode 100644 board/huawei/hg556a/Kconfig
 create mode 100644 board/huawei/hg556a/MAINTAINERS
 create mode 100644 board/huawei/hg556a/Makefile
 create mode 100644 board/huawei/hg556a/hg556a.c
 create mode 100644 configs/comtrend_ar5387un_ram_defconfig
 create mode 100644 configs/comtrend_vr3032u_ram_defconfig
 create mode 100644 configs/huawei_hg556a_ram_defconfig
 create mode 100644 drivers/cpu/bmips_cpu.c
 create mode 100644 drivers/ram/bmips_ram.c
 create mode 100644 drivers/serial/serial_bcm6345.c
 create mode 100644 drivers/sysreset/sysreset_syscon.c
 create mode 100644 include/configs/bmips_bcm63268.h
 create mode 100644 include/configs/bmips_bcm6328.h
 create mode 100644 include/configs/bmips_bcm6358.h
 create mode 100644 include/configs/bmips_common.h
 create mode 100644 include/configs/comtrend_ar5387un.h
 create mode 100644 include/configs/comtrend_vr3032u.h
 create mode 100644 include/configs/huawei_hg556a.h
Signature · 1 line
2.1.4
#1 lore raw

PATCH 1/8 cmd: cpu: fix NULL cpu feature prints

Commit 740d5d3 added two new features but only one feature name, which results in NULL prints when device_id feature is selected. Fix this by not printing features without a corresponding name.

Before:

	HG556a # cpu detail
	 -1: cpu at 0	BCM6358A1
		ID = 0, freq = 300 MHz: L1 cache, MMU, NULL
		Device ID 0x2a010
	 -1: cpu at 1	BCM6358A1
		ID = 1, freq = 300 MHz: L1 cache, MMU, NULL
		Device ID 0x2a010
After:
	HG556a # cpu detail
	 -1: cpu at 0	BCM6358A1
		ID = 0, freq = 300 MHz: L1 cache, MMU
		Device ID 0x2a010
	 -1: cpu at 1	BCM6358A1
		ID = 1, freq = 300 MHz: L1 cache, MMU
		Device ID 0x2a010
---
 cmd/cpu.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
cmd/cpu.c +2 -1
index bc4dc5c..14053d2 100644
@@ -52,7 +52,8 @@ static int print_cpu_list(bool detail)
 		print_freq(info.cpu_freq, "");
 		first = true;
 		for (i = 0; i < CPU_FEAT_COUNT; i++) {
-			if (info.features & (1 << i)) {
+			if (info.features & (1 << i) &&
+			    cpu_feature_name[i] != NULL) {
 				printf("%s%s", first ? ": " : ", ",
 				       cpu_feature_name[i]);
 				first = false;
Signature · 1 line
2.1.4
#2 lore raw

PATCH 2/8 sysreset: add syscon-reboot driver

In reply to Álvaro Fernández Rojas

Add a new sysreset driver based on linux/drivers/power/reset/syscon-reboot.c, which provides a generic driver for platforms that only require writing a mask to a regmap offset.

---
 drivers/sysreset/Kconfig           |  8 +++++
 drivers/sysreset/Makefile          |  1 +
 drivers/sysreset/sysreset_syscon.c | 60 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 69 insertions(+)
 create mode 100644 drivers/sysreset/sysreset_syscon.c
drivers/sysreset/Kconfig +8 -0
index 05a37b9..0946c9d 100644
@@ -13,4 +13,12 @@ config SYSRESET
 	  to effect a reset. The uclass will try all available drivers when
 	  reset_walk() is called.
 
+config SYSRESET_SYSCON
+	bool "Enable support for mfd syscon reboot driver"
+	depends on SYSRESET
+	select REGMAP
+	select SYSCON
+	help
+	  Description here.
+
 endmenu
drivers/sysreset/Makefile +1 -0
index 49b8bb6..1205f47 100644
@@ -18,3 +18,4 @@ obj-$(CONFIG_ARCH_SNAPDRAGON) += sysreset_snapdragon.o
 obj-$(CONFIG_ARCH_STI) += sysreset_sti.o
 obj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o
 obj-$(CONFIG_ARCH_ASPEED) += sysreset_ast.o
+obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o
drivers/sysreset/sysreset_syscon.c new file +60 -0

60 lines not on this page · raw message

Signature · 1 line
2.1.4
#3 lore raw

PATCH 3/8 mips: allow using generic sysreset drivers

In reply to Álvaro Fernández Rojas

Avoid duplicating do_reset definition if SYSRESET is enabled for MIPS

---
 arch/mips/cpu/cpu.c | 2 ++
 1 file changed, 2 insertions(+)
arch/mips/cpu/cpu.c +2 -0
index 1b919ed..55e6498 100644
@@ -12,6 +12,7 @@
 #include <asm/mipsregs.h>
 #include <asm/reboot.h>
 
+#ifndef CONFIG_SYSRESET
 void __weak _machine_restart(void)
 {
 	fprintf(stderr, "*** reset failed ***\n");
@@ -26,6 +27,7 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
 	return 0;
 }
+#endif
 
 void write_one_tlb(int index, u32 pagemask, u32 hi, u32 low0, u32 low1)
 {
Signature · 1 line
2.1.4
#4 lore raw

PATCH 4/8 serial: add serial driver for BCM6345

In reply to Álvaro Fernández Rojas

It is based on linux/drivers/tty/serial/bcm63xx_uart.c

---
 drivers/serial/Kconfig          |  14 ++
 drivers/serial/Makefile         |   1 +
 drivers/serial/serial_bcm6345.c | 341 ++++++++++++++++++++++++++++++++++++++++
 3 files changed, 356 insertions(+)
 create mode 100644 drivers/serial/serial_bcm6345.c
drivers/serial/Kconfig +14 -0
index c0ec2ec..ca776d8 100644
@@ -134,6 +134,14 @@ config DEBUG_UART_ATMEL
 	  will need to provide parameters to make this work. The driver will
 	  be available until the real driver-model serial is running.
 
+config DEBUG_UART_BCM6345
+	bool "BCM6345 UART"
+	depends on BCM6345_SERIAL
+	help
+	  Select this to enable a debug UART on BCM6345 SoCs. You
+	  will need to provide parameters to make this work. The driver will
+	  be available until the real driver model serial is running.
+
 config DEBUG_UART_NS16550
 	bool "ns16550"
 	help
@@ -339,6 +347,12 @@ config ATMEL_USART
 	  configured in the device tree, and input clock frequency can
 	  be got from the clk node.
 
+config BCM6345_SERIAL
+	bool "Support for BCM6345 UART"
+	depends on DM_SERIAL
+	help
+	  Select this to enable UART on BCM6345 SoCs.
+
 config FSL_LPUART
 	bool "Freescale LPUART support"
 	help
drivers/serial/Makefile +1 -0
index 4382cf9..dca31b2 100644
@@ -20,6 +20,7 @@ obj-$(CONFIG_ALTERA_JTAG_UART) += altera_jtag_uart.o
 obj-$(CONFIG_AR933X_UART) += serial_ar933x.o
 obj-$(CONFIG_ARM_DCC) += arm_dcc.o
 obj-$(CONFIG_ATMEL_USART) += atmel_usart.o
+obj-$(CONFIG_BCM6345_SERIAL) += serial_bcm6345.o
 obj-$(CONFIG_EFI_APP) += serial_efi.o
 obj-$(CONFIG_LPC32XX_HSUART) += lpc32xx_hsuart.o
 obj-$(CONFIG_MCFUART) += mcfuart.o
drivers/serial/serial_bcm6345.c new file +341 -0

341 lines not on this page · raw message

Signature · 1 line
2.1.4
#5 lore raw

PATCH 5/8 mips: add support for Broadcom MIPS

In reply to Álvaro Fernández Rojas

This target supports some of the xDSL Broadcom MIPS SoCs for now. However, support for other SoCs could be added in the future.

---
 arch/mips/Kconfig                       |  10 ++
 arch/mips/Makefile                      |   1 +
 arch/mips/dts/Makefile                  |   3 +
 arch/mips/dts/brcm,bcm63268.dtsi        |  87 +++++++++++
 arch/mips/dts/brcm,bcm6328.dtsi         |  87 +++++++++++
 arch/mips/dts/brcm,bcm6358.dtsi         |  97 ++++++++++++
 arch/mips/dts/comtrend,ar-5387un.dts    |  27 ++++
 arch/mips/dts/comtrend,vr-3032u.dts     |  27 ++++
 arch/mips/dts/huawei,hg556a.dts         |  31 ++++
 arch/mips/mach-bmips/Kconfig            |  86 ++++++++++
 arch/mips/mach-bmips/Makefile           |   5 +
 arch/mips/mach-bmips/dram.c             |  37 +++++
 board/comtrend/ar5387un/Kconfig         |  24 +++
 board/comtrend/ar5387un/MAINTAINERS     |   6 +
 board/comtrend/ar5387un/Makefile        |   5 +
 board/comtrend/ar5387un/ar-5387un.c     |  22 +++
 board/comtrend/vr3032u/Kconfig          |  24 +++
 board/comtrend/vr3032u/MAINTAINERS      |   6 +
 board/comtrend/vr3032u/Makefile         |   5 +
 board/comtrend/vr3032u/vr-3032u.c       |  22 +++
 board/huawei/hg556a/Kconfig             |  24 +++
 board/huawei/hg556a/MAINTAINERS         |   6 +
 board/huawei/hg556a/Makefile            |   5 +
 board/huawei/hg556a/hg556a.c            |  22 +++
 configs/comtrend_ar5387un_ram_defconfig |  47 ++++++
 configs/comtrend_vr3032u_ram_defconfig  |  47 ++++++
 configs/huawei_hg556a_ram_defconfig     |  47 ++++++
 drivers/cpu/Makefile                    |   2 +
 drivers/cpu/bmips_cpu.c                 | 268 ++++++++++++++++++++++++++++++++
 drivers/ram/Makefile                    |   2 +
 drivers/ram/bmips_ram.c                 | 126 +++++++++++++++
 include/configs/bmips_bcm63268.h        |  25 +++
 include/configs/bmips_bcm6328.h         |  25 +++
 include/configs/bmips_bcm6358.h         |  27 ++++
 include/configs/bmips_common.h          |  26 ++++
 include/configs/comtrend_ar5387un.h     |  15 ++
 include/configs/comtrend_vr3032u.h      |  15 ++
 include/configs/huawei_hg556a.h         |  15 ++
 38 files changed, 1356 insertions(+)
 create mode 100644 arch/mips/dts/brcm,bcm63268.dtsi
 create mode 100644 arch/mips/dts/brcm,bcm6328.dtsi
 create mode 100644 arch/mips/dts/brcm,bcm6358.dtsi
 create mode 100644 arch/mips/dts/comtrend,ar-5387un.dts
 create mode 100644 arch/mips/dts/comtrend,vr-3032u.dts
 create mode 100644 arch/mips/dts/huawei,hg556a.dts
 create mode 100644 arch/mips/mach-bmips/Kconfig
 create mode 100644 arch/mips/mach-bmips/Makefile
 create mode 100644 arch/mips/mach-bmips/dram.c
 create mode 100644 board/comtrend/ar5387un/Kconfig
 create mode 100644 board/comtrend/ar5387un/MAINTAINERS
 create mode 100644 board/comtrend/ar5387un/Makefile
 create mode 100644 board/comtrend/ar5387un/ar-5387un.c
 create mode 100644 board/comtrend/vr3032u/Kconfig
 create mode 100644 board/comtrend/vr3032u/MAINTAINERS
 create mode 100644 board/comtrend/vr3032u/Makefile
 create mode 100644 board/comtrend/vr3032u/vr-3032u.c
 create mode 100644 board/huawei/hg556a/Kconfig
 create mode 100644 board/huawei/hg556a/MAINTAINERS
 create mode 100644 board/huawei/hg556a/Makefile
 create mode 100644 board/huawei/hg556a/hg556a.c
 create mode 100644 configs/comtrend_ar5387un_ram_defconfig
 create mode 100644 configs/comtrend_vr3032u_ram_defconfig
 create mode 100644 configs/huawei_hg556a_ram_defconfig
 create mode 100644 drivers/cpu/bmips_cpu.c
 create mode 100644 drivers/ram/bmips_ram.c
 create mode 100644 include/configs/bmips_bcm63268.h
 create mode 100644 include/configs/bmips_bcm6328.h
 create mode 100644 include/configs/bmips_bcm6358.h
 create mode 100644 include/configs/bmips_common.h
 create mode 100644 include/configs/comtrend_ar5387un.h
 create mode 100644 include/configs/comtrend_vr3032u.h
 create mode 100644 include/configs/huawei_hg556a.h
arch/mips/Kconfig +10 -0
index d97930e..c97ea41 100644
@@ -75,6 +75,15 @@ config ARCH_ATH79
 	select OF_CONTROL
 	select DM
 
+config ARCH_BMIPS
+	bool "Support BMIPS SoCs"
+	select OF_CONTROL
+	select DM
+	select CLK
+	select CPU
+	select RAM
+	select SYSRESET
+
 config MACH_PIC32
 	bool "Support Microchip PIC32"
 	select OF_CONTROL
@@ -123,6 +132,7 @@ source "board/micronas/vct/Kconfig"
 source "board/pb1x00/Kconfig"
 source "board/qemu-mips/Kconfig"
 source "arch/mips/mach-ath79/Kconfig"
+source "arch/mips/mach-bmips/Kconfig"
 source "arch/mips/mach-pic32/Kconfig"
 
 if MIPS
arch/mips/Makefile +1 -0
index efe7e44..c30d4ef 100644
@@ -15,6 +15,7 @@ libs-y += arch/mips/lib/
 
 machine-$(CONFIG_SOC_AU1X00) += au1x00
 machine-$(CONFIG_ARCH_ATH79) += ath79
+machine-$(CONFIG_ARCH_BMIPS) += bmips
 machine-$(CONFIG_MACH_PIC32) += pic32
 
 machdirs := $(patsubst %,arch/mips/mach-%/,$(machine-y))
arch/mips/dts/Makefile +3 -0
index 30fcc2b..4c02c48 100644
@@ -8,6 +8,9 @@ dtb-$(CONFIG_TARGET_BOSTON) += img,boston.dtb
 dtb-$(CONFIG_TARGET_MALTA) += mti,malta.dtb
 dtb-$(CONFIG_TARGET_PIC32MZDASK) += pic32mzda_sk.dtb
 dtb-$(CONFIG_TARGET_XILFPGA) += nexys4ddr.dtb
+dtb-$(CONFIG_BOARD_COMTREND_AR5387UN) += comtrend,ar-5387un.dtb
+dtb-$(CONFIG_BOARD_COMTREND_VR3032U) += comtrend,vr-3032u.dtb
+dtb-$(CONFIG_BOARD_HUAWEI_HG556A) += huawei,hg556a.dtb
 dtb-$(CONFIG_BOARD_TPLINK_WDR4300) += tplink_wdr4300.dtb
 
 targets += $(dtb-y)
arch/mips/dts/brcm,bcm63268.dtsi new file +87 -0

87 lines not on this page · raw message

arch/mips/dts/brcm,bcm6328.dtsi new file +87 -0

87 lines not on this page · raw message

arch/mips/dts/brcm,bcm6358.dtsi new file +97 -0

97 lines not on this page · raw message

arch/mips/dts/comtrend,ar-5387un.dts new file +27 -0
new file mode 100644
index 0000000..f9c4a1c
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "brcm,bcm6328.dtsi"
+
+/ {
+	model = "Comtrend AR-5387un Board";
+	compatible = "comtrend,ar5387-un", "brcm,bcm6328";
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+};
+
+&uart0 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
arch/mips/dts/comtrend,vr-3032u.dts new file +27 -0
new file mode 100644
index 0000000..c0fdb28
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "brcm,bcm63268.dtsi"
+
+/ {
+	model = "Comtrend VR-3032u Board";
+	compatible = "comtrend,vr-3032u", "brcm,bcm63268";
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+};
+
+&uart0 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
arch/mips/dts/huawei,hg556a.dts new file +31 -0
new file mode 100644
index 0000000..08ef2c1
@@ -0,0 +1,31 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "brcm,bcm6358.dtsi"
+
+/ {
+	model = "Huawei HG556a Board";
+	compatible = "huawei,hg556a", "brcm,bcm6358";
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+};
+
+&pflash {
+	status = "okay";
+};
+
+&uart0 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
arch/mips/mach-bmips/Kconfig new file +86 -0

86 lines not on this page · raw message

arch/mips/mach-bmips/Makefile new file +5 -0
new file mode 100644
index 0000000..f432acc
@@ -0,0 +1,5 @@
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y += dram.o
arch/mips/mach-bmips/dram.c new file +37 -0
new file mode 100644
index 0000000..931aa5d
@@ -0,0 +1,37 @@
+/*
+ * Copyright (C) 2016 Daniel Schwierzeck <[email protected]>
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <ram.h>
+#include <dm.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int initdram(void)
+{
+	struct ram_info ram;
+	struct udevice *dev;
+	int err;
+
+	err = uclass_get_device(UCLASS_RAM, 0, &dev);
+	if (err) {
+		debug("DRAM init failed: %d\n", err);
+		return 0;
+	}
+
+	err = ram_get_info(dev, &ram);
+	if (err) {
+		debug("Cannot get DRAM size: %d\n", err);
+		return 0;
+	}
+
+	debug("SDRAM base=%zx, size=%x\n", ram.base, ram.size);
+
+	gd->ram_size = ram.size;
+
+	return 0;
+}
board/comtrend/ar5387un/Kconfig new file +24 -0
new file mode 100644
index 0000000..32a69da
@@ -0,0 +1,24 @@
+if BOARD_COMTREND_AR5387UN
+
+config SYS_BOARD
+	default "ar5387un"
+
+config SYS_VENDOR
+	default "comtrend"
+
+config SYS_CONFIG_NAME
+	default "comtrend_ar5387un"
+
+config SYS_DCACHE_SIZE
+	default 32768
+
+config SYS_DCACHE_LINE_SIZE
+	default 16
+
+config SYS_ICACHE_SIZE
+	default 32768
+
+config SYS_ICACHE_LINE_SIZE
+	default 16
+
+endif
board/comtrend/ar5387un/MAINTAINERS new file +6 -0
new file mode 100644
index 0000000..bcaac64
@@ -0,0 +1,6 @@
+COMTREND AR-5387UN BOARD
+M:	Álvaro Fernández Rojas <[email protected]>
+S:	Maintained
+F:	board/comtrend/ar-5387un/
+F:	include/configs/comtrend_ar5387un.h
+F:	configs/comtrend_ar5387un_ram_defconfig
board/comtrend/ar5387un/Makefile new file +5 -0
new file mode 100644
index 0000000..9de1cd2
@@ -0,0 +1,5 @@
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y += ar-5387un.o
board/comtrend/ar5387un/ar-5387un.c new file +22 -0
new file mode 100644
index 0000000..429117a
@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <debug_uart.h>
+#include <asm/io.h>
+#include <asm/addrspace.h>
+#include <asm/types.h>
+
+#ifdef CONFIG_BOARD_EARLY_INIT_F
+int board_early_init_f(void)
+{
+# ifdef CONFIG_DEBUG_UART
+	debug_uart_init();
+# endif
+
+	return 0;
+}
+#endif
board/comtrend/vr3032u/Kconfig new file +24 -0
new file mode 100644
index 0000000..1cba219
@@ -0,0 +1,24 @@
+if BOARD_COMTREND_VR3032U
+
+config SYS_BOARD
+	default "vr3032u"
+
+config SYS_VENDOR
+	default "comtrend"
+
+config SYS_CONFIG_NAME
+	default "comtrend_vr3032u"
+
+config SYS_DCACHE_SIZE
+	default 32768
+
+config SYS_DCACHE_LINE_SIZE
+	default 16
+
+config SYS_ICACHE_SIZE
+	default 65536
+
+config SYS_ICACHE_LINE_SIZE
+	default 16
+
+endif
board/comtrend/vr3032u/MAINTAINERS new file +6 -0
new file mode 100644
index 0000000..833d7da
@@ -0,0 +1,6 @@
+COMTREND VR-3032U BOARD
+M:	Álvaro Fernández Rojas <[email protected]>
+S:	Maintained
+F:	board/comtrend/vr-3032u/
+F:	include/configs/comtrend_vr-3032u.h
+F:	configs/comtrend_vr3032u_ram_defconfig
board/comtrend/vr3032u/Makefile new file +5 -0
new file mode 100644
index 0000000..9e62031
@@ -0,0 +1,5 @@
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y += vr-3032u.o
board/comtrend/vr3032u/vr-3032u.c new file +22 -0
new file mode 100644
index 0000000..429117a
@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <debug_uart.h>
+#include <asm/io.h>
+#include <asm/addrspace.h>
+#include <asm/types.h>
+
+#ifdef CONFIG_BOARD_EARLY_INIT_F
+int board_early_init_f(void)
+{
+# ifdef CONFIG_DEBUG_UART
+	debug_uart_init();
+# endif
+
+	return 0;
+}
+#endif
board/huawei/hg556a/Kconfig new file +24 -0
new file mode 100644
index 0000000..59f65b1
@@ -0,0 +1,24 @@
+if BOARD_HUAWEI_HG556A
+
+config SYS_BOARD
+	default "hg556a"
+
+config SYS_VENDOR
+	default "huawei"
+
+config SYS_CONFIG_NAME
+	default "huawei_hg556a"
+
+config SYS_DCACHE_SIZE
+	default 16384
+
+config SYS_DCACHE_LINE_SIZE
+	default 16
+
+config SYS_ICACHE_SIZE
+	default 16384
+
+config SYS_ICACHE_LINE_SIZE
+	default 16
+
+endif
board/huawei/hg556a/MAINTAINERS new file +6 -0
new file mode 100644
index 0000000..3ead7e4
@@ -0,0 +1,6 @@
+HUAWEI HG556A BOARD
+M:	Álvaro Fernández Rojas <[email protected]>
+S:	Maintained
+F:	board/huawei/hg556a/
+F:	include/configs/huawei_hg556a.h
+F:	configs/huawei_hg556a_ram_defconfig
board/huawei/hg556a/Makefile new file +5 -0
new file mode 100644
index 0000000..ace0ed3
@@ -0,0 +1,5 @@
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y += hg556a.o
board/huawei/hg556a/hg556a.c new file +22 -0
new file mode 100644
index 0000000..429117a
@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <debug_uart.h>
+#include <asm/io.h>
+#include <asm/addrspace.h>
+#include <asm/types.h>
+
+#ifdef CONFIG_BOARD_EARLY_INIT_F
+int board_early_init_f(void)
+{
+# ifdef CONFIG_DEBUG_UART
+	debug_uart_init();
+# endif
+
+	return 0;
+}
+#endif
configs/comtrend_ar5387un_ram_defconfig new file +47 -0

47 lines not on this page · raw message

configs/comtrend_vr3032u_ram_defconfig new file +47 -0

47 lines not on this page · raw message

configs/huawei_hg556a_ram_defconfig new file +47 -0

47 lines not on this page · raw message

drivers/cpu/Makefile +2 -0
index 8710160..db515f6 100644
@@ -5,3 +5,5 @@
 # SPDX-License-Identifier:      GPL-2.0+
 #
 obj-$(CONFIG_CPU) += cpu-uclass.o
+
+obj-$(CONFIG_ARCH_BMIPS) += bmips_cpu.o
drivers/cpu/bmips_cpu.c new file +268 -0

268 lines not on this page · raw message

drivers/ram/Makefile +2 -0
index 0e10249..818dd9f 100644
@@ -6,3 +6,5 @@
 #
 obj-$(CONFIG_RAM) += ram-uclass.o
 obj-$(CONFIG_SANDBOX) += sandbox_ram.o
+
+obj-$(CONFIG_ARCH_BMIPS) += bmips_ram.o
drivers/ram/bmips_ram.c new file +126 -0

126 lines not on this page · raw message

include/configs/bmips_bcm63268.h new file +25 -0
new file mode 100644
index 0000000..91f42e9
@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_BMIPS_BCM63268_H
+#define __CONFIG_BMIPS_BCM63268_H
+
+/* CPU */
+#define CONFIG_SYS_MIPS_TIMER_FREQ	200000000
+
+/* RAM */
+#define CONFIG_NR_DRAM_BANKS		1
+#define CONFIG_SYS_SDRAM_BASE		0x80000000
+
+/* U-Boot */
+#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + 0x100000
+
+#if defined(CONFIG_BMIPS_BOOT_RAM)
+#define CONFIG_SYS_INIT_SP_OFFSET	0x2000
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#endif
+
+#endif /* __CONFIG_BMIPS_BCM63268_H */
include/configs/bmips_bcm6328.h new file +25 -0
new file mode 100644
index 0000000..a5c9a2e
@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_BMIPS_BCM6328_H
+#define __CONFIG_BMIPS_BCM6328_H
+
+/* CPU */
+#define CONFIG_SYS_MIPS_TIMER_FREQ	160000000
+
+/* RAM */
+#define CONFIG_NR_DRAM_BANKS		1
+#define CONFIG_SYS_SDRAM_BASE		0x80000000
+
+/* U-Boot */
+#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + 0x100000
+
+#if defined(CONFIG_BMIPS_BOOT_RAM)
+#define CONFIG_SYS_INIT_SP_OFFSET	0x2000
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#endif
+
+#endif /* __CONFIG_BMIPS_BCM6328_H */
include/configs/bmips_bcm6358.h new file +27 -0
new file mode 100644
index 0000000..efac11d
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_BMIPS_BCM6358_H
+#define __CONFIG_BMIPS_BCM6358_H
+
+/* CPU */
+#define CONFIG_SYS_MIPS_TIMER_FREQ	150000000
+
+/* RAM */
+#define CONFIG_NR_DRAM_BANKS		1
+#define CONFIG_SYS_SDRAM_BASE		0x80000000
+
+/* U-Boot */
+#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + 0x100000
+
+#if defined(CONFIG_BMIPS_BOOT_RAM)
+#define CONFIG_SYS_INIT_SP_OFFSET	0x2000
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#endif
+
+#define CONFIG_SYS_MAX_FLASH_BANKS      2
+
+#endif /* __CONFIG_BMIPS_BCM6358_H */
include/configs/bmips_common.h new file +26 -0
new file mode 100644
index 0000000..0640d21
@@ -0,0 +1,26 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_BMIPS_COMMON_H
+#define __CONFIG_BMIPS_COMMON_H
+
+/* RAM */
+#define CONFIG_SYS_MEMTEST_START	0xa0000000
+#define CONFIG_SYS_MEMTEST_END		0xa2000000
+
+/* Serial */
+#define CONFIG_BAUDRATE			115200
+
+/* Memory usage */
+#define CONFIG_SYS_MAXARGS		24
+#define CONFIG_SYS_MALLOC_LEN		(1024 * 1024)
+#define CONFIG_SYS_BOOTPARAMS_LEN	(128 * 1024)
+#define CONFIG_SYS_CBSIZE		512
+
+/* U-Boot */
+#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE
+
+#endif /* __CONFIG_BMIPS_COMMON_H */
include/configs/comtrend_ar5387un.h new file +15 -0
new file mode 100644
index 0000000..8803506
@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <configs/bmips_common.h>
+#include <configs/bmips_bcm6328.h>
+
+#define CONFIG_ENV_IS_NOWHERE
+#define CONFIG_ENV_SIZE			(8 * 1024)
+
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_CMDLINE_EDITING
include/configs/comtrend_vr3032u.h new file +15 -0
new file mode 100644
index 0000000..066b4c7
@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <configs/bmips_common.h>
+#include <configs/bmips_bcm63268.h>
+
+#define CONFIG_ENV_IS_NOWHERE
+#define CONFIG_ENV_SIZE			(8 * 1024)
+
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_CMDLINE_EDITING
include/configs/huawei_hg556a.h new file +15 -0
new file mode 100644
index 0000000..4856ee7
@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <configs/bmips_common.h>
+#include <configs/bmips_bcm6358.h>
+
+#define CONFIG_ENV_IS_NOWHERE
+#define CONFIG_ENV_SIZE			(8 * 1024)
+
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_CMDLINE_EDITING
Signature · 1 line
2.1.4
#6 lore raw

PATCH 6/8 mips: bmips: fix first CPU check

In reply to Álvaro Fernández Rojas

CFE checks CPU Thread in a different way (using register $22):
mfc0 t1, C0_BCM_CONFIG, 3 # $22
li t2, CP0_CMT_TPID # (1 << 31)
and t1, t2
bnez t1, 2f # if we are running on thread 1, skip init
nop

---
 arch/mips/cpu/start.S | 5 +++++
 1 file changed, 5 insertions(+)
arch/mips/cpu/start.S +5 -0
index 6740fdf..d91913b 100644
@@ -151,8 +151,13 @@ reset:
 	 mfc0	t0, CP0_GLOBALNUMBER
 #endif
 
+#ifdef CONFIG_ARCH_BMIPS
+1:	mfc0	t0, CP0_DIAGNOSTIC, 3
+	and	t0, t0, (1 << 31)
+#else
 1:	mfc0	t0, CP0_EBASE
 	and	t0, t0, EBASE_CPUNUM
+#endif
 
 	/* Hang if this isn't the first CPU in the system */
 2:	beqz	t0, 4f
Signature · 1 line
2.1.4
#7 lore raw

PATCH 7/8 mips: bmips: fix ioremap for BCM6358

In reply to Álvaro Fernández Rojas

BCM6358 has its internal registers mapped to 0xfffe0000, which is changed to 0x1ffe0000 when ioremap is called.

---
 arch/mips/include/asm/mach-generic/ioremap.h | 15 ++++++++++++++-
 1 file changed, 14 insertions(+), 1 deletion(-)
arch/mips/include/asm/mach-generic/ioremap.h +14 -1
index 6b191d5..b6a920d 100644
@@ -16,15 +16,28 @@ static inline phys_addr_t fixup_bigphys_addr(phys_addr_t phys_addr,
 	return phys_addr;
 }
 
+static inline int is_mips_internal_registers(phys_addr_t offset)
+{
+#ifdef CONFIG_SOC_BMIPS_BCM6358
+	if (offset >= 0xfffe0000)
+		return 1;
+#endif
+
+	return 0;
+}
+
 static inline void __iomem *plat_ioremap(phys_addr_t offset, unsigned long size,
 						unsigned long flags)
 {
+	if (is_mips_internal_registers(offset))
+		return (void __iomem *)offset;
+
 	return NULL;
 }
 
 static inline int plat_iounmap(const volatile void __iomem *addr)
 {
-	return 0;
+	return is_mips_internal_registers((unsigned long)addr);
 }
 
 #define _page_cachable_default	_CACHE_CACHABLE_NONCOHERENT
Signature · 1 line
2.1.4
#8 lore raw

PATCH 8/8 mips: bmips: add support for raw .elf images

In reply to Álvaro Fernández Rojas

CFE supports loading .elf images instead of raw binaries.

---
 Makefile                     | 22 ++++++++++++++++++++++
 arch/mips/cpu/u-boot-elf.lds | 10 ++++++++++
 2 files changed, 32 insertions(+)
 create mode 100644 arch/mips/cpu/u-boot-elf.lds
Makefile +22 -0
index 09b597d..667b5f2 100644
@@ -568,6 +568,15 @@ ifndef LDSCRIPT
 	endif
 endif
 
+ifndef LDSCRIPT_ELF
+	ifeq ($(wildcard $(LDSCRIPT_ELF)),)
+		LDSCRIPT_ELF := $(srctree)/$(CPUDIR)/u-boot-elf.lds
+	endif
+	ifeq ($(wildcard $(LDSCRIPT_ELF)),)
+		LDSCRIPT_ELF := $(srctree)/arch/$(ARCH)/cpu/u-boot-elf.lds
+	endif
+endif
+
 else
 # Dummy target needed, because used as prerequisite
 include/config/auto.conf: ;
@@ -786,6 +795,7 @@ ifneq ($(CONFIG_SPL_TARGET),)
 ALL-$(CONFIG_SPL) += $(CONFIG_SPL_TARGET:"%"=%)
 endif
 ALL-$(CONFIG_REMAKE_ELF) += u-boot.elf
+ALL-$(CONFIG_ARCH_BMIPS) += u-boot-bmips.elf
 ALL-$(CONFIG_EFI_APP) += u-boot-app.efi
 ALL-$(CONFIG_EFI_STUB) += u-boot-payload.efi
 
@@ -1192,6 +1202,15 @@ u-boot.elf: u-boot.bin
 		--defsym=_start=$(CONFIG_SYS_TEXT_BASE) \
 		-Ttext=$(CONFIG_SYS_TEXT_BASE)
 
+# Rules to link u-boot-bmips
+quiet_cmd_u-boot-bmips ?= LD      $@
+	cmd_u-boot-bmips ?= $(LD) -e startup -T u-boot-elf.lds \
+	-Ttext $(CONFIG_SYS_TEXT_BASE) -o $@ u-boot-bmips.o
+
+u-boot-bmips.elf: u-boot.bin u-boot-elf.lds
+	$(Q)$(LD) -r -b binary --oformat elf32-tradbigmips -o u-boot-bmips.o $<
+	$(call if_changed,u-boot-bmips)
+
 # Rule to link u-boot
 # May be overridden by arch/$(ARCH)/config.mk
 quiet_cmd_u-boot__ ?= LD      $@
@@ -1340,6 +1359,9 @@ cmd_cpp_lds = $(CPP) -Wp,-MD,$(depfile) $(cpp_flags) $(LDPPFLAGS) \
 u-boot.lds: $(LDSCRIPT) prepare FORCE
 	$(call if_changed_dep,cpp_lds)
 
+u-boot-elf.lds: $(LDSCRIPT_ELF) prepare
+	$(call if_changed_dep,cpp_lds)
+
 spl/u-boot-spl.bin: spl/u-boot-spl
 	@:
 spl/u-boot-spl: tools prepare \
arch/mips/cpu/u-boot-elf.lds new file +10 -0
new file mode 100644
index 0000000..db0bb46
@@ -0,0 +1,10 @@
+OUTPUT_ARCH(mips)
+SECTIONS {
+	.text : {
+		startup = .;
+		*(.text)
+		*(.text.*)
+		*(.data)
+		*(.data.*)
+	}
+}
Signature · 1 line
2.1.4
#9 lore raw

v2 cover Add support for Broadcom MIPS SoCs

In reply to Álvaro Fernández Rojas

This adds support for some of the xDSL Broadcom MIPS SoCs:
- BCM6358
- BCM6328
- BCM63268
However, support for other SoCs could be added in the future:
- Other BCM63xx
- BCM33xx
- BCM71xx

v2: Introduce changes suggested by Daniel Schwierzeck

Álvaro Fernández Rojas (14):
cmd: cpu: fix NULL cpu feature prints
sysreset: add syscon-reboot driver
MIPS: allow using generic sysreset drivers
serial: add serial driver for BCM6345
cpu: add CPU driver for Broadcom MIPS SoCs
ram: add RAM driver for Broadcom MIPS SoCs
MIPS: add initial infrastructure for Broadcom MIPS SoCs
MIPS: add support for Broadcom MIPS BCM6358 SoC family
MIPS: add BMIPS Huawei HG556a board
MIPS: add support for Broadcom MIPS BCM6328 SoC family
MIPS: add BMIPS Comtrend AR-5387un board
MIPS: add support for Broadcom MIPS BCM63268 SoC family
MIPS: add BMIPS Comtrend VR-3032u board u-boot.elf: build it for every arch

 Makefile                                |  21 ++-
 arch/mips/Kconfig                       |  10 ++
 arch/mips/Makefile                      |   1 +
 arch/mips/cpu/cpu.c                     |   2 +
 arch/mips/cpu/start.S                   |   5 +
 arch/mips/dts/Makefile                  |   3 +
 arch/mips/dts/brcm,bcm63268.dtsi        |  88 +++++++++++
 arch/mips/dts/brcm,bcm6328.dtsi         |  88 +++++++++++
 arch/mips/dts/brcm,bcm6358.dtsi         |  98 ++++++++++++
 arch/mips/dts/comtrend,ar-5387un.dts    |  27 ++++
 arch/mips/dts/comtrend,vr-3032u.dts     |  27 ++++
 arch/mips/dts/huawei,hg556a.dts         |  31 ++++
 arch/mips/mach-bmips/Kconfig            |  86 ++++++++++
 arch/mips/mach-bmips/Makefile           |   5 +
 arch/mips/mach-bmips/dram.c             |  37 +++++
 arch/mips/mach-bmips/include/ioremap.h  |  45 ++++++
 board/comtrend/ar5387un/Kconfig         |  12 ++
 board/comtrend/ar5387un/MAINTAINERS     |   6 +
 board/comtrend/ar5387un/Makefile        |   5 +
 board/comtrend/ar5387un/ar-5387un.c     |   7 +
 board/comtrend/vr3032u/Kconfig          |  12 ++
 board/comtrend/vr3032u/MAINTAINERS      |   6 +
 board/comtrend/vr3032u/Makefile         |   5 +
 board/comtrend/vr3032u/vr-3032u.c       |   7 +
 board/huawei/hg556a/Kconfig             |  12 ++
 board/huawei/hg556a/MAINTAINERS         |   6 +
 board/huawei/hg556a/Makefile            |   5 +
 board/huawei/hg556a/hg556a.c            |   7 +
 cmd/cpu.c                               |   1 +
 configs/comtrend_ar5387un_ram_defconfig |  42 +++++
 configs/comtrend_vr3032u_ram_defconfig  |  42 +++++
 configs/huawei_hg556a_ram_defconfig     |  42 +++++
 drivers/cpu/Makefile                    |   2 +
 drivers/cpu/bmips_cpu.c                 | 271 ++++++++++++++++++++++++++++++++
 drivers/ram/Makefile                    |   2 +
 drivers/ram/bmips_ram.c                 | 126 +++++++++++++++
 drivers/serial/Kconfig                  |  14 ++
 drivers/serial/Makefile                 |   1 +
 drivers/serial/serial_bcm6345.c         | 267 +++++++++++++++++++++++++++++++
 drivers/sysreset/Kconfig                |   8 +
 drivers/sysreset/Makefile               |   1 +
 drivers/sysreset/sysreset_syscon.c      |  60 +++++++
 include/configs/bmips_bcm63268.h        |  25 +++
 include/configs/bmips_bcm6328.h         |  25 +++
 include/configs/bmips_bcm6358.h         |  27 ++++
 include/configs/bmips_common.h          |  26 +++
 include/configs/comtrend_ar5387un.h     |  15 ++
 include/configs/comtrend_vr3032u.h      |  15 ++
 include/configs/huawei_hg556a.h         |  15 ++
 49 files changed, 1683 insertions(+), 8 deletions(-)
 create mode 100644 arch/mips/dts/brcm,bcm63268.dtsi
 create mode 100644 arch/mips/dts/brcm,bcm6328.dtsi
 create mode 100644 arch/mips/dts/brcm,bcm6358.dtsi
 create mode 100644 arch/mips/dts/comtrend,ar-5387un.dts
 create mode 100644 arch/mips/dts/comtrend,vr-3032u.dts
 create mode 100644 arch/mips/dts/huawei,hg556a.dts
 create mode 100644 arch/mips/mach-bmips/Kconfig
 create mode 100644 arch/mips/mach-bmips/Makefile
 create mode 100644 arch/mips/mach-bmips/dram.c
 create mode 100644 arch/mips/mach-bmips/include/ioremap.h
 create mode 100644 board/comtrend/ar5387un/Kconfig
 create mode 100644 board/comtrend/ar5387un/MAINTAINERS
 create mode 100644 board/comtrend/ar5387un/Makefile
 create mode 100644 board/comtrend/ar5387un/ar-5387un.c
 create mode 100644 board/comtrend/vr3032u/Kconfig
 create mode 100644 board/comtrend/vr3032u/MAINTAINERS
 create mode 100644 board/comtrend/vr3032u/Makefile
 create mode 100644 board/comtrend/vr3032u/vr-3032u.c
 create mode 100644 board/huawei/hg556a/Kconfig
 create mode 100644 board/huawei/hg556a/MAINTAINERS
 create mode 100644 board/huawei/hg556a/Makefile
 create mode 100644 board/huawei/hg556a/hg556a.c
 create mode 100644 configs/comtrend_ar5387un_ram_defconfig
 create mode 100644 configs/comtrend_vr3032u_ram_defconfig
 create mode 100644 configs/huawei_hg556a_ram_defconfig
 create mode 100644 drivers/cpu/bmips_cpu.c
 create mode 100644 drivers/ram/bmips_ram.c
 create mode 100644 drivers/serial/serial_bcm6345.c
 create mode 100644 drivers/sysreset/sysreset_syscon.c
 create mode 100644 include/configs/bmips_bcm63268.h
 create mode 100644 include/configs/bmips_bcm6328.h
 create mode 100644 include/configs/bmips_bcm6358.h
 create mode 100644 include/configs/bmips_common.h
 create mode 100644 include/configs/comtrend_ar5387un.h
 create mode 100644 include/configs/comtrend_vr3032u.h
 create mode 100644 include/configs/huawei_hg556a.h
Signature · 1 line
2.1.4
#10 lore raw

PATCH v2 1/14 cmd: cpu: fix NULL cpu feature prints

Commit 740d5d3 added two new features but only one feature name, which results in NULL prints when device_id feature is selected.

Before:

	HG556a # cpu detail
	 -1: cpu at 0	BCM6358A1
		ID = 0, freq = 300 MHz: L1 cache, MMU, NULL
		Device ID 0x2a010
	 -1: cpu at 1	BCM6358A1
		ID = 1, freq = 300 MHz: L1 cache, MMU, NULL
		Device ID 0x2a010
After:
	HG556a # cpu detail
	 -1: cpu at 0	BCM6358A1
		ID = 0, freq = 300 MHz: L1 cache, MMU, Device ID
		Device ID 0x2a010
	 -1: cpu at 1	BCM6358A1
		ID = 1, freq = 300 MHz: L1 cache, MMU, Device ID
		Device ID 0x2a010

---
v2: Introduce changes suggested by Daniel Schwierzeck:
- Add the missing name instead of checking for null names.

 cmd/cpu.c | 1 +
 1 file changed, 1 insertion(+)
cmd/cpu.c +1 -0
index bc4dc5c..adfd54a 100644
@@ -15,6 +15,7 @@ static const char *cpu_feature_name[CPU_FEAT_COUNT] = {
 	"L1 cache",
 	"MMU",
 	"Microcode",
+	"Device ID",
 };
 
 static int print_cpu_list(bool detail)
Signature · 1 line
2.1.4
#11 lore raw

PATCH v2 1/14 cmd: cpu: fix NULL cpu feature prints

Quoted 20 lines · Álvaro Fernández Rojas

Commit 740d5d3 added two new features but only one feature name, which results in NULL prints when device_id feature is selected.

Before:

        HG556a # cpu detail
         -1: cpu at 0      BCM6358A1
                ID = 0, freq = 300 MHz: L1 cache, MMU, NULL
                Device ID 0x2a010
         -1: cpu at 1      BCM6358A1
                ID = 1, freq = 300 MHz: L1 cache, MMU, NULL
                Device ID 0x2a010
After:
        HG556a # cpu detail
         -1: cpu at 0      BCM6358A1
                ID = 0, freq = 300 MHz: L1 cache, MMU, Device ID
                Device ID 0x2a010
         -1: cpu at 1      BCM6358A1
                ID = 1, freq = 300 MHz: L1 cache, MMU, Device ID
                Device ID 0x2a010
Quoted 7 lines

---
v2: Introduce changes suggested by Daniel Schwierzeck:
- Add the missing name instead of checking for null names.

 cmd/cpu.c | 1 +
 1 file changed, 1 insertion(+)
#12 lore raw

PATCH v2 2/14 sysreset: add syscon-reboot driver

In reply to Álvaro Fernández Rojas

Add a new sysreset driver based on linux/drivers/power/reset/syscon-reboot.c, which provides a generic driver for platforms that only require writing a mask to a regmap offset.

---
v2: no changes

 drivers/sysreset/Kconfig           |  8 +++++
 drivers/sysreset/Makefile          |  1 +
 drivers/sysreset/sysreset_syscon.c | 60 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 69 insertions(+)
 create mode 100644 drivers/sysreset/sysreset_syscon.c
drivers/sysreset/Kconfig +8 -0
index 05a37b9..0946c9d 100644
@@ -13,4 +13,12 @@ config SYSRESET
 	  to effect a reset. The uclass will try all available drivers when
 	  reset_walk() is called.
 
+config SYSRESET_SYSCON
+	bool "Enable support for mfd syscon reboot driver"
+	depends on SYSRESET
+	select REGMAP
+	select SYSCON
+	help
+	  Description here.
+
 endmenu
drivers/sysreset/Makefile +1 -0
index 49b8bb6..1205f47 100644
@@ -18,3 +18,4 @@ obj-$(CONFIG_ARCH_SNAPDRAGON) += sysreset_snapdragon.o
 obj-$(CONFIG_ARCH_STI) += sysreset_sti.o
 obj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o
 obj-$(CONFIG_ARCH_ASPEED) += sysreset_ast.o
+obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o
drivers/sysreset/sysreset_syscon.c new file +60 -0

60 lines not on this page · raw message

Signature · 1 line
2.1.4
#13 lore raw

PATCH v2 2/14 sysreset: add syscon-reboot driver

Hi Alvaro,

Quoted 19 lines · Álvaro Fernández Rojas

Add a new sysreset driver based on linux/drivers/power/reset/syscon-reboot.c, which provides a generic driver for platforms that only require writing a mask to a regmap offset.

---
v2: no changes

 drivers/sysreset/Kconfig           |  8 +++++
 drivers/sysreset/Makefile          |  1 +
 drivers/sysreset/sysreset_syscon.c | 60 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 69 insertions(+)
 create mode 100644 drivers/sysreset/sysreset_syscon.c
drivers/sysreset/Kconfig +0 -0
index 05a37b9..0946c9d 100644

drivers/sysreset/Kconfig config SYSRESET · line 22

Quoted 10 lines
drivers/sysreset/Kconfig +7 -0
@@ -13,4 +13,12 @@ config SYSRESET
          to effect a reset. The uclass will try all available drivers when
          reset_walk() is called.
 
+config SYSRESET_SYSCON
+       bool "Enable support for mfd syscon reboot driver"
+       depends on SYSRESET
+       select REGMAP
+       select SYSCON
+       help
+         Description here.

Yes please!

Quoted 21 lines
drivers/sysreset/Kconfig +1 -0
+
 endmenu
drivers/sysreset/Makefile +1 -0
index 49b8bb6..1205f47 100644
@@ -18,3 +18,4 @@ obj-$(CONFIG_ARCH_SNAPDRAGON) += sysreset_snapdragon.o
 obj-$(CONFIG_ARCH_STI) += sysreset_sti.o
 obj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o
 obj-$(CONFIG_ARCH_ASPEED) += sysreset_ast.o
+obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o
drivers/sysreset/sysreset_syscon.c new file +4 -0
new file mode 100644
index 0000000..61aeb1d
@@ -0,0 +1,60 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/drivers/power/reset/syscon-reboot.c:

drivers/sysreset/sysreset_syscon.c line 14

Quoted 10 lines
drivers/sysreset/sysreset_syscon.c new file +10 -0
+ *     Copyright (C) 2013, Applied Micro Circuits Corporation
+ *     Author: Feng Kan <[email protected]>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <sysreset.h>

this should go at the end

Quoted 17 lines
drivers/sysreset/sysreset_syscon.c new file +17 -0
+#include <regmap.h>
+#include <syscon.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static int syscon_reboot_request(struct udevice *dev, enum sysreset_t type)
+{
+       struct udevice *syscon;
+       struct regmap *regmap;
+       unsigned int offset, mask;
+       int err;
+
+       err = uclass_get_device_by_phandle(UCLASS_SYSCON, dev,
+                                          "regmap", &syscon);
+       if (err) {
+               error("unable to find syscon device\n");
+               return err;

drivers/sysreset/sysreset_syscon.c line 41

Quoted 10 lines
drivers/sysreset/sysreset_syscon.c new file +10 -0
+       }
+
+       regmap = syscon_get_regmap(syscon);
+       if (!regmap) {
+               error("unable to find regmap\n");
+               return -ENODEV;
+       }
+
+       offset = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), "offset", 0);
+       mask = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), "mask", 0);

You should do this in ofdata_to_platdata() or probe() and store it in a local struct

drivers/sysreset/sysreset_syscon.c line 43

Quoted 2 lines
drivers/sysreset/sysreset_syscon.c new file +2 -0
+
+       return regmap_write(regmap, offset, mask);

Check error here, and either return -EINPROGRESS or some other error

Quoted 18 lines
drivers/sysreset/sysreset_syscon.c new file +17 -1
+}
+
+static struct sysreset_ops syscon_reboot_ops = {
+       .request        = syscon_reboot_request,
+};
+
+static const struct udevice_id syscon_reboot_ids[] = {
+       { .compatible = "syscon-reboot" },
+       { /* sentinel */ }
+};
+
+U_BOOT_DRIVER(syscon_reboot) = {
+       .name           = "syscon_reboot",
+       .id             = UCLASS_SYSRESET,
+       .of_match       = syscon_reboot_ids,
+       .ops            = &syscon_reboot_ops,
+};
--
Quoted 2 lines

2.1.4

Regards,
Simon

#14 lore raw

PATCH v2 2/14 sysreset: add syscon-reboot driver

Hi Simon,

Quoted 25 lines · Simon Glass

Hi Alvaro,

Quoted 22 lines · Álvaro Fernández Rojas

Add a new sysreset driver based on linux/drivers/power/reset/syscon-reboot.c, which provides a generic driver for platforms that only require writing a mask to a regmap offset.

---
v2: no changes

 drivers/sysreset/Kconfig           |  8 +++++
 drivers/sysreset/Makefile          |  1 +
 drivers/sysreset/sysreset_syscon.c | 60 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 69 insertions(+)
 create mode 100644 drivers/sysreset/sysreset_syscon.c
drivers/sysreset/Kconfig +0 -0
index 05a37b9..0946c9d 100644
@@ -13,4 +13,12 @@ config SYSRESET
          to effect a reset. The uclass will try all available drivers when
          reset_walk() is called.
 
Quoted 9 lines

drivers/sysreset/Kconfig config SYSRESET · line 22

Quoted 7 lines
drivers/sysreset/Kconfig +7 -0
+config SYSRESET_SYSCON
+       bool "Enable support for mfd syscon reboot driver"
+       depends on SYSRESET
+       select REGMAP
+       select SYSCON
+       help
+         Description here.

Yes please!

Sure, my fault :P

Quoted 26 lines
Quoted 26 lines
drivers/sysreset/Kconfig +1 -0
+
 endmenu
drivers/sysreset/Makefile +1 -0
index 49b8bb6..1205f47 100644
@@ -18,3 +18,4 @@ obj-$(CONFIG_ARCH_SNAPDRAGON) += sysreset_snapdragon.o
 obj-$(CONFIG_ARCH_STI) += sysreset_sti.o
 obj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o
 obj-$(CONFIG_ARCH_ASPEED) += sysreset_ast.o
+obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o
drivers/sysreset/sysreset_syscon.c new file +8 -0
new file mode 100644
index 0000000..61aeb1d
@@ -0,0 +1,60 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/drivers/power/reset/syscon-reboot.c:
+ *     Copyright (C) 2013, Applied Micro Circuits Corporation
+ *     Author: Feng Kan <[email protected]>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
Quoted 8 lines

drivers/sysreset/sysreset_syscon.c line 14

Quoted 6 lines
drivers/sysreset/sysreset_syscon.c new file +6 -0
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <sysreset.h>

this should go at the end

I will fix it.

Quoted 23 lines
Quoted 23 lines
drivers/sysreset/sysreset_syscon.c new file +22 -0
+#include <regmap.h>
+#include <syscon.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static int syscon_reboot_request(struct udevice *dev, enum sysreset_t type)
+{
+       struct udevice *syscon;
+       struct regmap *regmap;
+       unsigned int offset, mask;
+       int err;
+
+       err = uclass_get_device_by_phandle(UCLASS_SYSCON, dev,
+                                          "regmap", &syscon);
+       if (err) {
+               error("unable to find syscon device\n");
+               return err;
+       }
+
+       regmap = syscon_get_regmap(syscon);
+       if (!regmap) {
+               error("unable to find regmap\n");
Quoted 8 lines

drivers/sysreset/sysreset_syscon.c line 41

Quoted 5 lines
drivers/sysreset/sysreset_syscon.c new file +5 -0
+               return -ENODEV;
+       }
+
+       offset = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), "offset", 0);
+       mask = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), "mask", 0);

You should do this in ofdata_to_platdata() or probe() and store it in a local struct

I tried doing it in probe:
https://github.com/Noltari/u-boot/commit/37f45960f240c3e57fa70afe69d9b5782c9e6f9f

However it looks like probe is never called with my current U_BOOT_DRIVER settings...
Then I tried doing it in bind instead of probe and it looks like the syscon device isn't ready when syscon-reboot is binded... Any ideas? :$

Quoted 6 lines

drivers/sysreset/sysreset_syscon.c line 43

Quoted 4 lines
drivers/sysreset/sysreset_syscon.c new file +2 -0
+
+       return regmap_write(regmap, offset, mask);

Check error here, and either return -EINPROGRESS or some other error

I will, but regmap_write returns always 0, so there's no error at all to check...

Quoted 25 lines
Quoted 19 lines
drivers/sysreset/sysreset_syscon.c new file +17 -1
+}
+
+static struct sysreset_ops syscon_reboot_ops = {
+       .request        = syscon_reboot_request,
+};
+
+static const struct udevice_id syscon_reboot_ids[] = {
+       { .compatible = "syscon-reboot" },
+       { /* sentinel */ }
+};
+
+U_BOOT_DRIVER(syscon_reboot) = {
+       .name           = "syscon_reboot",
+       .id             = UCLASS_SYSRESET,
+       .of_match       = syscon_reboot_ids,
+       .ops            = &syscon_reboot_ops,
+};
--
Quoted 2 lines

2.1.4

Regards,
Simon

#15 lore raw

PATCH v2 2/14 sysreset: add syscon-reboot driver

Hi Alvaro,

Quoted 107 lines · Álvaro Fernández Rojas

Hi Simon,

Quoted 25 lines · Simon Glass

Hi Alvaro,

Quoted 22 lines · Álvaro Fernández Rojas

Add a new sysreset driver based on linux/drivers/power/reset/syscon-reboot.c, which provides a generic driver for platforms that only require writing a mask to a regmap offset.

---
v2: no changes

 drivers/sysreset/Kconfig           |  8 +++++
 drivers/sysreset/Makefile          |  1 +
 drivers/sysreset/sysreset_syscon.c | 60 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 69 insertions(+)
 create mode 100644 drivers/sysreset/sysreset_syscon.c
drivers/sysreset/Kconfig +0 -0
index 05a37b9..0946c9d 100644
@@ -13,4 +13,12 @@ config SYSRESET
          to effect a reset. The uclass will try all available drivers when
          reset_walk() is called.
 
Quoted 9 lines

drivers/sysreset/Kconfig config SYSRESET · line 22

Quoted 7 lines
drivers/sysreset/Kconfig +7 -0
+config SYSRESET_SYSCON
+       bool "Enable support for mfd syscon reboot driver"
+       depends on SYSRESET
+       select REGMAP
+       select SYSCON
+       help
+         Description here.

Yes please!

Sure, my fault :P

Quoted 26 lines
Quoted 26 lines
drivers/sysreset/Kconfig +1 -0
+
 endmenu
drivers/sysreset/Makefile +1 -0
index 49b8bb6..1205f47 100644
@@ -18,3 +18,4 @@ obj-$(CONFIG_ARCH_SNAPDRAGON) += sysreset_snapdragon.o
 obj-$(CONFIG_ARCH_STI) += sysreset_sti.o
 obj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o
 obj-$(CONFIG_ARCH_ASPEED) += sysreset_ast.o
+obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o
drivers/sysreset/sysreset_syscon.c new file +8 -0
new file mode 100644
index 0000000..61aeb1d
@@ -0,0 +1,60 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/drivers/power/reset/syscon-reboot.c:
+ *     Copyright (C) 2013, Applied Micro Circuits Corporation
+ *     Author: Feng Kan <[email protected]>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
Quoted 8 lines

drivers/sysreset/sysreset_syscon.c line 14

Quoted 6 lines
drivers/sysreset/sysreset_syscon.c new file +6 -0
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <sysreset.h>

this should go at the end

I will fix it.

Quoted 23 lines
Quoted 23 lines
drivers/sysreset/sysreset_syscon.c new file +22 -0
+#include <regmap.h>
+#include <syscon.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static int syscon_reboot_request(struct udevice *dev, enum sysreset_t type)
+{
+       struct udevice *syscon;
+       struct regmap *regmap;
+       unsigned int offset, mask;
+       int err;
+
+       err = uclass_get_device_by_phandle(UCLASS_SYSCON, dev,
+                                          "regmap", &syscon);
+       if (err) {
+               error("unable to find syscon device\n");
+               return err;
+       }
+
+       regmap = syscon_get_regmap(syscon);
+       if (!regmap) {
+               error("unable to find regmap\n");
Quoted 8 lines

drivers/sysreset/sysreset_syscon.c line 41

Quoted 5 lines
drivers/sysreset/sysreset_syscon.c new file +5 -0
+               return -ENODEV;
+       }
+
+       offset = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), "offset", 0);
+       mask = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), "mask", 0);

You should do this in ofdata_to_platdata() or probe() and store it in a local struct

Quoted 4 lines

I tried doing it in probe:
https://github.com/Noltari/u-boot/commit/37f45960f240c3e57fa70afe69d9b5782c9e6f9f

However it looks like probe is never called with my current U_BOOT_DRIVER settings...

That is bad - you should figure out why. The uclass_get_device_by_phandle() should call probe().

Quoted 2 lines

Then I tried doing it in bind instead of probe and it looks like the syscon device isn't ready when syscon-reboot is binded... Any ideas? :$

Figure out why probe() doesn't happen.

Quoted 8 lines
Quoted 7 lines

drivers/sysreset/sysreset_syscon.c line 43

Quoted 5 lines
drivers/sysreset/sysreset_syscon.c new file +2 -0
+
+       return regmap_write(regmap, offset, mask);

Check error here, and either return -EINPROGRESS or some other error

I will, but regmap_write returns always 0, so there's no error at all to check...

That's fine - you can return -EINPROGRESS if it returns 0, and the error otherwise. Also please add function docs for regmap_read/write() while you are there.

Quoted 18 lines
Quoted 18 lines
Quoted 18 lines
drivers/sysreset/sysreset_syscon.c new file +16 -0
+}
+
+static struct sysreset_ops syscon_reboot_ops = {
+       .request        = syscon_reboot_request,
+};
+
+static const struct udevice_id syscon_reboot_ids[] = {
+       { .compatible = "syscon-reboot" },
+       { /* sentinel */ }
+};
+
+U_BOOT_DRIVER(syscon_reboot) = {
+       .name           = "syscon_reboot",
+       .id             = UCLASS_SYSRESET,
+       .of_match       = syscon_reboot_ids,
+       .ops            = &syscon_reboot_ops,
Quoted 8 lines
Quoted 8 lines
Quoted 4 lines
drivers/sysreset/sysreset_syscon.c new file +1 -1
+};
--

2.1.4

Regards,
Simon

Regards,
Simon

#16 lore raw

PATCH v2 2/14 sysreset: add syscon-reboot driver

I'm not sure, but I can't see any reference to uclass_get_device_by_phandle in https://github.com/u-boot/u-boot/blob/master/drivers/sysreset/sysreset-uclass.cSo I guess that the driver is never probed unless it's flagged as u-boot,dm-pre-reloc. Am I correct?
Appart from that, this also happens in bmips cpu driver, in which I had to do it in bind because probe was never called unless it was flagged as pre-reloc...
Is dm probing every driver or only specific ones such as serial?
Regards,Álvaro.

On Mon, Apr 17, 2017 at 7:46 PM +0200, "Simon Glass" <[email protected]> wrote:

Hi Alvaro,

Quoted 77 lines · Álvaro Fernández Rojas

Hi Simon,

Quoted 25 lines · Simon Glass

Hi Alvaro,

Quoted 22 lines · Álvaro Fernández Rojas

Add a new sysreset driver based on linux/drivers/power/reset/syscon-reboot.c, which provides a generic driver for platforms that only require writing a mask to a regmap offset.

Signed-off-by Álvaro Fernández Rojas

---
v2: no changes

 drivers/sysreset/Kconfig           |  8 +++++
 drivers/sysreset/Makefile          |  1 +
 drivers/sysreset/sysreset_syscon.c | 60 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 69 insertions(+)
 create mode 100644 drivers/sysreset/sysreset_syscon.c
drivers/sysreset/Kconfig +0 -0
index 05a37b9..0946c9d 100644
@@ -13,4 +13,12 @@ config SYSRESET
          to effect a reset. The uclass will try all available drivers when
          reset_walk() is called.
 
Quoted 9 lines

drivers/sysreset/Kconfig config SYSRESET · line 22

Quoted 7 lines
drivers/sysreset/Kconfig +7 -0
+config SYSRESET_SYSCON
+       bool "Enable support for mfd syscon reboot driver"
+       depends on SYSRESET
+       select REGMAP
+       select SYSCON
+       help
+         Description here.

Yes please!

Sure, my fault :P

Quoted 26 lines
Quoted 26 lines
drivers/sysreset/Kconfig +1 -0
+
 endmenu
drivers/sysreset/Makefile +1 -0
index 49b8bb6..1205f47 100644
@@ -18,3 +18,4 @@ obj-$(CONFIG_ARCH_SNAPDRAGON) += sysreset_snapdragon.o
 obj-$(CONFIG_ARCH_STI) += sysreset_sti.o
 obj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o
 obj-$(CONFIG_ARCH_ASPEED) += sysreset_ast.o
+obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o
drivers/sysreset/sysreset_syscon.c new file +8 -0
new file mode 100644
index 0000000..61aeb1d
@@ -0,0 +1,60 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas 
+ *
+ * Derived from linux/drivers/power/reset/syscon-reboot.c:
+ *     Copyright (C) 2013, Applied Micro Circuits Corporation
+ *     Author: Feng Kan 
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
Quoted 8 lines

drivers/sysreset/sysreset_syscon.c line 14

Quoted 6 lines
drivers/sysreset/sysreset_syscon.c new file +6 -0
+ */
+
+#include 
+#include 
+#include 
+#include 

this should go at the end

I will fix it.

Quoted 1 line
Quoted 16 lines
Quoted 8 lines
Quoted 8 lines
drivers/sysreset/sysreset_syscon.c new file +8 -0
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static int syscon_reboot_request(struct udevice *dev, enum sysreset_t type)
+{
+       struct udevice *syscon;
Quoted 8 lines

drivers/sysreset/sysreset_syscon.c

Quoted 8 lines
drivers/sysreset/sysreset_syscon.c new file +8 -0
+       struct regmap *regmap;
+       unsigned int offset, mask;
+       int err;
+
+       err = uclass_get_device_by_phandle(UCLASS_SYSCON, dev,
+                                          "regmap", &syscon);
+       if (err) {
+               error("unable to find syscon device

");

Quoted 6 lines
Quoted 6 lines

drivers/sysreset/sysreset_syscon.c

Quoted 6 lines
drivers/sysreset/sysreset_syscon.c new file +6 -0
+               return err;
+       }
+
+       regmap = syscon_get_regmap(syscon);
+       if (!regmap) {
+               error("unable to find regmap

");

Quoted 6 lines
Quoted 6 lines
Quoted 5 lines
drivers/sysreset/sysreset_syscon.c new file +5 -0
+               return -ENODEV;
+       }
+
+       offset = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), "offset", 0);
+       mask = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), "mask", 0);
Quoted 6 lines
Quoted 2 lines

You should do this in ofdata_to_platdata() or probe() and store it in a local struct

I tried doing it in probe:
https://github.com/Noltari/u-boot/commit/37f45960f240c3e57fa70afe69d9b5782c9e6f9f

However it looks like probe is never called with my current U_BOOT_DRIVER settings...

That is bad - you should figure out why. The uclass_get_device_by_phandle() should call probe().

Quoted 2 lines

Then I tried doing it in bind instead of probe and it looks like the syscon device isn't ready when syscon-reboot is binded... Any ideas? :$

Figure out why probe() doesn't happen.

Quoted 8 lines
Quoted 7 lines

drivers/sysreset/sysreset_syscon.c line 43

Quoted 5 lines
drivers/sysreset/sysreset_syscon.c new file +2 -0
+
+       return regmap_write(regmap, offset, mask);

Check error here, and either return -EINPROGRESS or some other error

I will, but regmap_write returns always 0, so there's no error at all to check...

That's fine - you can return -EINPROGRESS if it returns 0, and the error otherwise. Also please add function docs for regmap_read/write() while you are there.

Quoted 18 lines
Quoted 18 lines
Quoted 18 lines
drivers/sysreset/sysreset_syscon.c new file +16 -0
+}
+
+static struct sysreset_ops syscon_reboot_ops = {
+       .request        = syscon_reboot_request,
+};
+
+static const struct udevice_id syscon_reboot_ids[] = {
+       { .compatible = "syscon-reboot" },
+       { /* sentinel */ }
+};
+
+U_BOOT_DRIVER(syscon_reboot) = {
+       .name           = "syscon_reboot",
+       .id             = UCLASS_SYSRESET,
+       .of_match       = syscon_reboot_ids,
+       .ops            = &syscon_reboot_ops,
Quoted 8 lines
Quoted 8 lines
Quoted 4 lines
drivers/sysreset/sysreset_syscon.c new file +1 -1
+};
--

2.1.4

Regards,
Simon

Regards,
Simon

#17 lore raw

PATCH v2 3/14 MIPS: allow using generic sysreset drivers

In reply to Álvaro Fernández Rojas

Avoid duplicating do_reset definition if SYSRESET is enabled for MIPS

---
v2: no changes

 arch/mips/cpu/cpu.c | 2 ++
 1 file changed, 2 insertions(+)
arch/mips/cpu/cpu.c +2 -0
index 1b919ed..55e6498 100644
@@ -12,6 +12,7 @@
 #include <asm/mipsregs.h>
 #include <asm/reboot.h>
 
+#ifndef CONFIG_SYSRESET
 void __weak _machine_restart(void)
 {
 	fprintf(stderr, "*** reset failed ***\n");
@@ -26,6 +27,7 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
 	return 0;
 }
+#endif
 
 void write_one_tlb(int index, u32 pagemask, u32 hi, u32 low0, u32 low1)
 {
Signature · 1 line
2.1.4
#19 lore raw

PATCH v2 4/14 serial: add serial driver for BCM6345

In reply to Álvaro Fernández Rojas

It is based on linux/drivers/tty/serial/bcm63xx_uart.c

---
v2: Introduce changes suggested by Daniel Schwierzeck:
- Remove unneeded defines.
- Fix incorrect multi-line comment.

 drivers/serial/Kconfig          |  14 +++
 drivers/serial/Makefile         |   1 +
 drivers/serial/serial_bcm6345.c | 267 ++++++++++++++++++++++++++++++++++++++++
 3 files changed, 282 insertions(+)
 create mode 100644 drivers/serial/serial_bcm6345.c
drivers/serial/Kconfig +14 -0
index c0ec2ec..ca776d8 100644
@@ -134,6 +134,14 @@ config DEBUG_UART_ATMEL
 	  will need to provide parameters to make this work. The driver will
 	  be available until the real driver-model serial is running.
 
+config DEBUG_UART_BCM6345
+	bool "BCM6345 UART"
+	depends on BCM6345_SERIAL
+	help
+	  Select this to enable a debug UART on BCM6345 SoCs. You
+	  will need to provide parameters to make this work. The driver will
+	  be available until the real driver model serial is running.
+
 config DEBUG_UART_NS16550
 	bool "ns16550"
 	help
@@ -339,6 +347,12 @@ config ATMEL_USART
 	  configured in the device tree, and input clock frequency can
 	  be got from the clk node.
 
+config BCM6345_SERIAL
+	bool "Support for BCM6345 UART"
+	depends on DM_SERIAL
+	help
+	  Select this to enable UART on BCM6345 SoCs.
+
 config FSL_LPUART
 	bool "Freescale LPUART support"
 	help
drivers/serial/Makefile +1 -0
index 4382cf9..dca31b2 100644
@@ -20,6 +20,7 @@ obj-$(CONFIG_ALTERA_JTAG_UART) += altera_jtag_uart.o
 obj-$(CONFIG_AR933X_UART) += serial_ar933x.o
 obj-$(CONFIG_ARM_DCC) += arm_dcc.o
 obj-$(CONFIG_ATMEL_USART) += atmel_usart.o
+obj-$(CONFIG_BCM6345_SERIAL) += serial_bcm6345.o
 obj-$(CONFIG_EFI_APP) += serial_efi.o
 obj-$(CONFIG_LPC32XX_HSUART) += lpc32xx_hsuart.o
 obj-$(CONFIG_MCFUART) += mcfuart.o
drivers/serial/serial_bcm6345.c new file +267 -0

267 lines not on this page · raw message

Signature · 1 line
2.1.4
#20 lore raw

PATCH v2 4/14 serial: add serial driver for BCM6345

Quoted 8 lines · Álvaro Fernández Rojas

It is based on linux/drivers/tty/serial/bcm63xx_uart.c

---
v2: Introduce changes suggested by Daniel Schwierzeck:
- Remove unneeded defines.
- Fix incorrect multi-line comment.

Quoted 5 lines
 drivers/serial/Kconfig          |  14 +++
 drivers/serial/Makefile         |   1 +
 drivers/serial/serial_bcm6345.c | 267 ++++++++++++++++++++++++++++++++++++++++
 3 files changed, 282 insertions(+)
 create mode 100644 drivers/serial/serial_bcm6345.c

IMO the raw read/write are ugly. It is better to use clrsetbits etc. than lots of read/write calls. Also we tend to use C structs to access registers although that is not required now.

I cannot see a lot of point in trying to make it look like the Linux driver. Is that driver changing rapidly and hard to track?

#21 lore raw

PATCH v2 5/14 cpu: add CPU driver for Broadcom MIPS SoCs

In reply to Álvaro Fernández Rojas

---
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Get register base from DT.

 drivers/cpu/Makefile    |   2 +
 drivers/cpu/bmips_cpu.c | 271 ++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 273 insertions(+)
 create mode 100644 drivers/cpu/bmips_cpu.c
drivers/cpu/Makefile +2 -0
index 8710160..db515f6 100644
@@ -5,3 +5,5 @@
 # SPDX-License-Identifier:      GPL-2.0+
 #
 obj-$(CONFIG_CPU) += cpu-uclass.o
+
+obj-$(CONFIG_ARCH_BMIPS) += bmips_cpu.o
drivers/cpu/bmips_cpu.c new file +271 -0

271 lines not on this page · raw message

Signature · 1 line
2.1.4
#22 lore raw

PATCH v2 5/14 cpu: add CPU driver for Broadcom MIPS SoCs

Quoted 11 lines · Álvaro Fernández Rojas

---
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Get register base from DT.

 drivers/cpu/Makefile    |   2 +
 drivers/cpu/bmips_cpu.c | 271 ++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 273 insertions(+)
 create mode 100644 drivers/cpu/bmips_cpu.c
#23 lore raw

PATCH v2 5/14 cpu: add CPU driver for Broadcom MIPS SoCs

Hi Simon,
When trying to fix sysreset driver as you suggested I realized that I'm not allocating any size for priv on bmips cpu driver.Should I use priv_auto_alloc for this?(Still learning about u-boot dm...)

On Sun, Apr 16, 2017 at 9:34 PM +0200, "Simon Glass" <[email protected]> wrote:

Quoted 11 lines · Álvaro Fernández Rojas
Signed-off-by Álvaro Fernández Rojas

---
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Get register base from DT.

 drivers/cpu/Makefile    |   2 +
 drivers/cpu/bmips_cpu.c | 271 ++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 273 insertions(+)
 create mode 100644 drivers/cpu/bmips_cpu.c
Reviewed-by Simon Glass
#24 lore raw

PATCH v2 6/14 ram: add RAM driver for Broadcom MIPS SoCs

In reply to Álvaro Fernández Rojas

---
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.

 drivers/ram/Makefile    |   2 +
 drivers/ram/bmips_ram.c | 126 ++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 128 insertions(+)
 create mode 100644 drivers/ram/bmips_ram.c
drivers/ram/Makefile +2 -0
index 0e10249..818dd9f 100644
@@ -6,3 +6,5 @@
 #
 obj-$(CONFIG_RAM) += ram-uclass.o
 obj-$(CONFIG_SANDBOX) += sandbox_ram.o
+
+obj-$(CONFIG_ARCH_BMIPS) += bmips_ram.o
drivers/ram/bmips_ram.c new file +126 -0

126 lines not on this page · raw message

Signature · 1 line
2.1.4
#25 lore raw

PATCH v2 6/14 ram: add RAM driver for Broadcom MIPS SoCs

Quoted 9 lines · Álvaro Fernández Rojas

---
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.

 drivers/ram/Makefile    |   2 +
 drivers/ram/bmips_ram.c | 126 ++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 128 insertions(+)
 create mode 100644 drivers/ram/bmips_ram.c
#26 lore raw

PATCH v2 7/14 MIPS: add initial infrastructure for Broadcom MIPS SoCs

In reply to Álvaro Fernández Rojas

CFE checks CPU Thread in a different way (using register $22):
mfc0 t1, C0_BCM_CONFIG, 3 # $22
li t2, CP0_CMT_TPID # (1 << 31)
and t1, t2
bnez t1, 2f # if we are running on thread 1, skip init
nop

---
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Replace initdram with dram_init.
- Merge with "fix first CPU check" patch.

 arch/mips/Kconfig              | 10 ++++++++++
 arch/mips/Makefile             |  1 +
 arch/mips/cpu/start.S          |  5 +++++
 arch/mips/mach-bmips/Kconfig   | 22 ++++++++++++++++++++++
 arch/mips/mach-bmips/Makefile  |  5 +++++
 arch/mips/mach-bmips/dram.c    | 37 +++++++++++++++++++++++++++++++++++++
 include/configs/bmips_common.h | 26 ++++++++++++++++++++++++++
 7 files changed, 106 insertions(+)
 create mode 100644 arch/mips/mach-bmips/Kconfig
 create mode 100644 arch/mips/mach-bmips/Makefile
 create mode 100644 arch/mips/mach-bmips/dram.c
 create mode 100644 include/configs/bmips_common.h
arch/mips/Kconfig +10 -0
index d97930e..c97ea41 100644
@@ -75,6 +75,15 @@ config ARCH_ATH79
 	select OF_CONTROL
 	select DM
 
+config ARCH_BMIPS
+	bool "Support BMIPS SoCs"
+	select OF_CONTROL
+	select DM
+	select CLK
+	select CPU
+	select RAM
+	select SYSRESET
+
 config MACH_PIC32
 	bool "Support Microchip PIC32"
 	select OF_CONTROL
@@ -123,6 +132,7 @@ source "board/micronas/vct/Kconfig"
 source "board/pb1x00/Kconfig"
 source "board/qemu-mips/Kconfig"
 source "arch/mips/mach-ath79/Kconfig"
+source "arch/mips/mach-bmips/Kconfig"
 source "arch/mips/mach-pic32/Kconfig"
 
 if MIPS
arch/mips/Makefile +1 -0
index efe7e44..c30d4ef 100644
@@ -15,6 +15,7 @@ libs-y += arch/mips/lib/
 
 machine-$(CONFIG_SOC_AU1X00) += au1x00
 machine-$(CONFIG_ARCH_ATH79) += ath79
+machine-$(CONFIG_ARCH_BMIPS) += bmips
 machine-$(CONFIG_MACH_PIC32) += pic32
 
 machdirs := $(patsubst %,arch/mips/mach-%/,$(machine-y))
arch/mips/cpu/start.S +5 -0
index f7dee81..5c1ad00 100644
@@ -151,8 +151,13 @@ reset:
 	 mfc0	t0, CP0_GLOBALNUMBER
 #endif
 
+#ifdef CONFIG_ARCH_BMIPS
+1:	mfc0	t0, CP0_DIAGNOSTIC, 3
+	and	t0, t0, (1 << 31)
+#else
 1:	mfc0	t0, CP0_EBASE
 	and	t0, t0, EBASE_CPUNUM
+#endif
 
 	/* Hang if this isn't the first CPU in the system */
 2:	beqz	t0, 4f
arch/mips/mach-bmips/Kconfig new file +22 -0
new file mode 100644
index 0000000..42a7e41
@@ -0,0 +1,22 @@
+menu "Broadcom MIPS platforms"
+	depends on ARCH_BMIPS
+
+config SYS_SOC
+	default "none"
+
+choice
+	prompt "Boot mode"
+
+config BMIPS_BOOT_RAM
+	bool "RAM boot"
+	depends on BMIPS_SUPPORTS_BOOT_RAM
+	help
+	  This builds an image that is linked to a RAM address. Caches are
+	  disabled and environment is built in.
+
+endchoice
+
+config BMIPS_SUPPORTS_BOOT_RAM
+	bool
+
+endmenu
arch/mips/mach-bmips/Makefile new file +5 -0
new file mode 100644
index 0000000..f432acc
@@ -0,0 +1,5 @@
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y += dram.o
arch/mips/mach-bmips/dram.c new file +37 -0
new file mode 100644
index 0000000..b19b28a
@@ -0,0 +1,37 @@
+/*
+ * Copyright (C) 2016 Daniel Schwierzeck <[email protected]>
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <ram.h>
+#include <dm.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int dram_init(void)
+{
+	struct ram_info ram;
+	struct udevice *dev;
+	int err;
+
+	err = uclass_get_device(UCLASS_RAM, 0, &dev);
+	if (err) {
+		debug("DRAM init failed: %d\n", err);
+		return 0;
+	}
+
+	err = ram_get_info(dev, &ram);
+	if (err) {
+		debug("Cannot get DRAM size: %d\n", err);
+		return 0;
+	}
+
+	debug("SDRAM base=%zx, size=%x\n", ram.base, ram.size);
+
+	gd->ram_size = ram.size;
+
+	return 0;
+}
include/configs/bmips_common.h new file +26 -0
new file mode 100644
index 0000000..0640d21
@@ -0,0 +1,26 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_BMIPS_COMMON_H
+#define __CONFIG_BMIPS_COMMON_H
+
+/* RAM */
+#define CONFIG_SYS_MEMTEST_START	0xa0000000
+#define CONFIG_SYS_MEMTEST_END		0xa2000000
+
+/* Serial */
+#define CONFIG_BAUDRATE			115200
+
+/* Memory usage */
+#define CONFIG_SYS_MAXARGS		24
+#define CONFIG_SYS_MALLOC_LEN		(1024 * 1024)
+#define CONFIG_SYS_BOOTPARAMS_LEN	(128 * 1024)
+#define CONFIG_SYS_CBSIZE		512
+
+/* U-Boot */
+#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE
+
+#endif /* __CONFIG_BMIPS_COMMON_H */
Signature · 1 line
2.1.4
#27 lore raw

PATCH v2 8/14 MIPS: add support for Broadcom MIPS BCM6358 SoC family

In reply to Álvaro Fernández Rojas

---
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Add PERF_BASE to cpus.
- Merge with "fix ioremap for BCM6358" patch.
- Add a custom ioremap.h instead of modifying the generic one.

 arch/mips/dts/brcm,bcm6358.dtsi        | 98 ++++++++++++++++++++++++++++++++++
 arch/mips/mach-bmips/Kconfig           | 18 ++++++-
 arch/mips/mach-bmips/include/ioremap.h | 45 ++++++++++++++++
 include/configs/bmips_bcm6358.h        | 27 ++++++++++
 4 files changed, 187 insertions(+), 1 deletion(-)
 create mode 100644 arch/mips/dts/brcm,bcm6358.dtsi
 create mode 100644 arch/mips/mach-bmips/include/ioremap.h
 create mode 100644 include/configs/bmips_bcm6358.h
arch/mips/dts/brcm,bcm6358.dtsi new file +98 -0
new file mode 100644
index 0000000..c7ba7e0
@@ -0,0 +1,98 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include "skeleton.dtsi"
+
+/ {
+	compatible = "brcm,bcm6358";
+
+	cpus {
+		reg = <0xfffe0000 0x4>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		u-boot,dm-pre-reloc;
+
+		cpu at 0 {
+			compatible = "brcm,bcm6358-cpu", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <0>;
+			u-boot,dm-pre-reloc;
+		};
+
+		cpu at 1 {
+			compatible = "brcm,bcm6358-cpu", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <1>;
+			u-boot,dm-pre-reloc;
+		};
+	};
+
+	clocks {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		u-boot,dm-pre-reloc;
+
+		periph_osc: periph-osc {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <50000000>;
+			u-boot,dm-pre-reloc;
+		};
+	};
+
+	pflash: nor at 1e000000 {
+		compatible = "cfi-flash";
+		reg = <0x1e000000 0x2000000>;
+		bank-width = <2>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		status = "disabled";
+	};
+
+	ubus {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		u-boot,dm-pre-reloc;
+
+		periph_cntl: syscon at fffe0000 {
+			compatible = "syscon";
+			reg = <0xfffe0000 0xc>;
+		};
+
+		reboot: syscon-reboot {
+			compatible = "syscon-reboot";
+			regmap = <&periph_cntl>;
+			offset = <0x8>;
+			mask = <0x1>;
+		};
+
+		uart0: serial at fffe0100 {
+			compatible = "brcm,bcm6345-uart";
+			reg = <0xfffe0100 0x18>;
+			clocks = <&periph_osc>;
+
+			status = "disabled";
+		};
+
+		uart1: serial at fffe0120 {
+			compatible = "brcm,bcm6345-uart";
+			reg = <0xfffe0120 0x18>;
+			clocks = <&periph_osc>;
+
+			status = "disabled";
+		};
+
+		memory-controller at fffe1200 {
+			compatible = "brcm,bcm6358-mc";
+			reg = <0xfffe1200 0x1000>;
+			u-boot,dm-pre-reloc;
+		};
+	};
+};
arch/mips/mach-bmips/Kconfig +17 -1
index 42a7e41..efdb827 100644
@@ -2,7 +2,23 @@ menu "Broadcom MIPS platforms"
 	depends on ARCH_BMIPS
 
 config SYS_SOC
-	default "none"
+	default "bcm6358" if SOC_BMIPS_BCM6358
+
+choice
+	prompt "Broadcom MIPS SoC select"
+
+config SOC_BMIPS_BCM6358
+	bool "BMIPS BCM6358 family"
+	select SUPPORTS_BIG_ENDIAN
+	select SUPPORTS_CPU_MIPS32_R1
+	select MIPS_TUNE_4KC
+	select MIPS_L1_CACHE_SHIFT_4
+	select SWAP_IO_SPACE
+	select SYSRESET_SYSCON
+	help
+	  This supports BMIPS BCM6358 family including BCM6358 and BCM6359.
+
+endchoice
 
 choice
 	prompt "Boot mode"
arch/mips/mach-bmips/include/ioremap.h new file +45 -0

45 lines not on this page · raw message

include/configs/bmips_bcm6358.h new file +27 -0
new file mode 100644
index 0000000..efac11d
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_BMIPS_BCM6358_H
+#define __CONFIG_BMIPS_BCM6358_H
+
+/* CPU */
+#define CONFIG_SYS_MIPS_TIMER_FREQ	150000000
+
+/* RAM */
+#define CONFIG_NR_DRAM_BANKS		1
+#define CONFIG_SYS_SDRAM_BASE		0x80000000
+
+/* U-Boot */
+#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + 0x100000
+
+#if defined(CONFIG_BMIPS_BOOT_RAM)
+#define CONFIG_SYS_INIT_SP_OFFSET	0x2000
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#endif
+
+#define CONFIG_SYS_MAX_FLASH_BANKS      2
+
+#endif /* __CONFIG_BMIPS_BCM6358_H */
Signature · 1 line
2.1.4
#28 lore raw

PATCH v2 9/14 MIPS: add BMIPS Huawei HG556a board

In reply to Álvaro Fernández Rojas

---
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Remove DEBUG_UART from defconfig.

 arch/mips/dts/Makefile              |  1 +
 arch/mips/dts/huawei,hg556a.dts     | 31 +++++++++++++++++++++++++++
 arch/mips/mach-bmips/Kconfig        | 12 +++++++++++
 board/huawei/hg556a/Kconfig         | 12 +++++++++++
 board/huawei/hg556a/MAINTAINERS     |  6 ++++++
 board/huawei/hg556a/Makefile        |  5 +++++
 board/huawei/hg556a/hg556a.c        |  7 +++++++
 configs/huawei_hg556a_ram_defconfig | 42 +++++++++++++++++++++++++++++++++++++
 include/configs/huawei_hg556a.h     | 15 +++++++++++++
 9 files changed, 131 insertions(+)
 create mode 100644 arch/mips/dts/huawei,hg556a.dts
 create mode 100644 board/huawei/hg556a/Kconfig
 create mode 100644 board/huawei/hg556a/MAINTAINERS
 create mode 100644 board/huawei/hg556a/Makefile
 create mode 100644 board/huawei/hg556a/hg556a.c
 create mode 100644 configs/huawei_hg556a_ram_defconfig
 create mode 100644 include/configs/huawei_hg556a.h
arch/mips/dts/Makefile +1 -0
index 30fcc2b..1843b77 100644
@@ -8,6 +8,7 @@ dtb-$(CONFIG_TARGET_BOSTON) += img,boston.dtb
 dtb-$(CONFIG_TARGET_MALTA) += mti,malta.dtb
 dtb-$(CONFIG_TARGET_PIC32MZDASK) += pic32mzda_sk.dtb
 dtb-$(CONFIG_TARGET_XILFPGA) += nexys4ddr.dtb
+dtb-$(CONFIG_BOARD_HUAWEI_HG556A) += huawei,hg556a.dtb
 dtb-$(CONFIG_BOARD_TPLINK_WDR4300) += tplink_wdr4300.dtb
 
 targets += $(dtb-y)
arch/mips/dts/huawei,hg556a.dts new file +31 -0
new file mode 100644
index 0000000..08ef2c1
@@ -0,0 +1,31 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "brcm,bcm6358.dtsi"
+
+/ {
+	model = "Huawei HG556a Board";
+	compatible = "huawei,hg556a", "brcm,bcm6358";
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+};
+
+&pflash {
+	status = "okay";
+};
+
+&uart0 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
arch/mips/mach-bmips/Kconfig +12 -0
index efdb827..2867ad8 100644
@@ -21,6 +21,16 @@ config SOC_BMIPS_BCM6358
 endchoice
 
 choice
+	prompt "Board select"
+
+config BOARD_HUAWEI_HG556A
+	bool "Huawei HG556a board"
+	depends on SOC_BMIPS_BCM6358
+	select BMIPS_SUPPORTS_BOOT_RAM
+
+endchoice
+
+choice
 	prompt "Boot mode"
 
 config BMIPS_BOOT_RAM
@@ -35,4 +45,6 @@ endchoice
 config BMIPS_SUPPORTS_BOOT_RAM
 	bool
 
+source "board/huawei/hg556a/Kconfig"
+
 endmenu
board/huawei/hg556a/Kconfig new file +12 -0
new file mode 100644
index 0000000..88622d0
@@ -0,0 +1,12 @@
+if BOARD_HUAWEI_HG556A
+
+config SYS_BOARD
+	default "hg556a"
+
+config SYS_VENDOR
+	default "huawei"
+
+config SYS_CONFIG_NAME
+	default "huawei_hg556a"
+
+endif
board/huawei/hg556a/MAINTAINERS new file +6 -0
new file mode 100644
index 0000000..3ead7e4
@@ -0,0 +1,6 @@
+HUAWEI HG556A BOARD
+M:	Álvaro Fernández Rojas <[email protected]>
+S:	Maintained
+F:	board/huawei/hg556a/
+F:	include/configs/huawei_hg556a.h
+F:	configs/huawei_hg556a_ram_defconfig
board/huawei/hg556a/Makefile new file +5 -0
new file mode 100644
index 0000000..ace0ed3
@@ -0,0 +1,5 @@
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y += hg556a.o
board/huawei/hg556a/hg556a.c new file +7 -0
new file mode 100644
index 0000000..d181ca6
@@ -0,0 +1,7 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
configs/huawei_hg556a_ram_defconfig new file +42 -0

42 lines not on this page · raw message

include/configs/huawei_hg556a.h new file +15 -0
new file mode 100644
index 0000000..4856ee7
@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <configs/bmips_common.h>
+#include <configs/bmips_bcm6358.h>
+
+#define CONFIG_ENV_IS_NOWHERE
+#define CONFIG_ENV_SIZE			(8 * 1024)
+
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_CMDLINE_EDITING
Signature · 1 line
2.1.4
#29 lore raw

PATCH v2 10/14 MIPS: add support for Broadcom MIPS BCM6328 SoC family

In reply to Álvaro Fernández Rojas

---
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Add PERF_BASE to cpus.

 arch/mips/dts/brcm,bcm6328.dtsi | 88 +++++++++++++++++++++++++++++++++++++++++
 arch/mips/mach-bmips/Kconfig    | 12 ++++++
 include/configs/bmips_bcm6328.h | 25 ++++++++++++
 3 files changed, 125 insertions(+)
 create mode 100644 arch/mips/dts/brcm,bcm6328.dtsi
 create mode 100644 include/configs/bmips_bcm6328.h
arch/mips/dts/brcm,bcm6328.dtsi new file +88 -0
new file mode 100644
index 0000000..707e755
@@ -0,0 +1,88 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include "skeleton.dtsi"
+
+/ {
+	compatible = "brcm,bcm6328";
+
+	cpus {
+		reg = <0x10000000 0x4>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		u-boot,dm-pre-reloc;
+
+		cpu at 0 {
+			compatible = "brcm,bcm6328-cpu", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <0>;
+			u-boot,dm-pre-reloc;
+		};
+
+		cpu at 1 {
+			compatible = "brcm,bcm6328-cpu", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <1>;
+			u-boot,dm-pre-reloc;
+		};
+	};
+
+	clocks {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		u-boot,dm-pre-reloc;
+
+		periph_osc: periph-osc {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <50000000>;
+			u-boot,dm-pre-reloc;
+		};
+	};
+
+	ubus {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		u-boot,dm-pre-reloc;
+
+		reset_cntl: syscon at 10000068 {
+			compatible = "syscon";
+			reg = <0x10000068 0x4>;
+		};
+
+		reboot: syscon-reboot {
+			compatible = "syscon-reboot";
+			regmap = <&reset_cntl>;
+			offset = <0>;
+			mask = <0x1>;
+		};
+
+		uart0: serial at 10000100 {
+			compatible = "brcm,bcm6345-uart";
+			reg = <0x10000100 0x18>;
+			clocks = <&periph_osc>;
+
+			status = "disabled";
+		};
+
+		uart1: serial at 10000120 {
+			compatible = "brcm,bcm6345-uart";
+			reg = <0x10000120 0x18>;
+			clocks = <&periph_osc>;
+
+			status = "disabled";
+		};
+
+		memory-controller at 10003000 {
+			compatible = "brcm,bcm6328-mc";
+			reg = <0x10003000 0x1000>;
+			u-boot,dm-pre-reloc;
+		};
+	};
+};
arch/mips/mach-bmips/Kconfig +12 -0
index 2867ad8..4c74cee 100644
@@ -2,11 +2,23 @@ menu "Broadcom MIPS platforms"
 	depends on ARCH_BMIPS
 
 config SYS_SOC
+	default "bcm6328" if SOC_BMIPS_BCM6328
 	default "bcm6358" if SOC_BMIPS_BCM6358
 
 choice
 	prompt "Broadcom MIPS SoC select"
 
+config SOC_BMIPS_BCM6328
+	bool "BMIPS BCM6328 family"
+	select SUPPORTS_BIG_ENDIAN
+	select SUPPORTS_CPU_MIPS32_R1
+	select MIPS_TUNE_4KC
+	select MIPS_L1_CACHE_SHIFT_4
+	select SWAP_IO_SPACE
+	select SYSRESET_SYSCON
+	help
+	  This supports BMIPS BCM6328 family including BCM63281 and BCM63283.
+
 config SOC_BMIPS_BCM6358
 	bool "BMIPS BCM6358 family"
 	select SUPPORTS_BIG_ENDIAN
include/configs/bmips_bcm6328.h new file +25 -0
new file mode 100644
index 0000000..a5c9a2e
@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_BMIPS_BCM6328_H
+#define __CONFIG_BMIPS_BCM6328_H
+
+/* CPU */
+#define CONFIG_SYS_MIPS_TIMER_FREQ	160000000
+
+/* RAM */
+#define CONFIG_NR_DRAM_BANKS		1
+#define CONFIG_SYS_SDRAM_BASE		0x80000000
+
+/* U-Boot */
+#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + 0x100000
+
+#if defined(CONFIG_BMIPS_BOOT_RAM)
+#define CONFIG_SYS_INIT_SP_OFFSET	0x2000
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#endif
+
+#endif /* __CONFIG_BMIPS_BCM6328_H */
Signature · 1 line
2.1.4
#30 lore raw

PATCH v2 11/14 MIPS: add BMIPS Comtrend AR-5387un board

In reply to Álvaro Fernández Rojas

---
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Remove DEBUG_UART from defconfig.

 arch/mips/dts/Makefile                  |  1 +
 arch/mips/dts/comtrend,ar-5387un.dts    | 27 +++++++++++++++++++++
 arch/mips/mach-bmips/Kconfig            |  6 +++++
 board/comtrend/ar5387un/Kconfig         | 12 ++++++++++
 board/comtrend/ar5387un/MAINTAINERS     |  6 +++++
 board/comtrend/ar5387un/Makefile        |  5 ++++
 board/comtrend/ar5387un/ar-5387un.c     |  7 ++++++
 configs/comtrend_ar5387un_ram_defconfig | 42 +++++++++++++++++++++++++++++++++
 include/configs/comtrend_ar5387un.h     | 15 ++++++++++++
 9 files changed, 121 insertions(+)
 create mode 100644 arch/mips/dts/comtrend,ar-5387un.dts
 create mode 100644 board/comtrend/ar5387un/Kconfig
 create mode 100644 board/comtrend/ar5387un/MAINTAINERS
 create mode 100644 board/comtrend/ar5387un/Makefile
 create mode 100644 board/comtrend/ar5387un/ar-5387un.c
 create mode 100644 configs/comtrend_ar5387un_ram_defconfig
 create mode 100644 include/configs/comtrend_ar5387un.h
arch/mips/dts/Makefile +1 -0
index 1843b77..0805819 100644
@@ -8,6 +8,7 @@ dtb-$(CONFIG_TARGET_BOSTON) += img,boston.dtb
 dtb-$(CONFIG_TARGET_MALTA) += mti,malta.dtb
 dtb-$(CONFIG_TARGET_PIC32MZDASK) += pic32mzda_sk.dtb
 dtb-$(CONFIG_TARGET_XILFPGA) += nexys4ddr.dtb
+dtb-$(CONFIG_BOARD_COMTREND_AR5387UN) += comtrend,ar-5387un.dtb
 dtb-$(CONFIG_BOARD_HUAWEI_HG556A) += huawei,hg556a.dtb
 dtb-$(CONFIG_BOARD_TPLINK_WDR4300) += tplink_wdr4300.dtb
 
arch/mips/dts/comtrend,ar-5387un.dts new file +27 -0
new file mode 100644
index 0000000..f9c4a1c
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "brcm,bcm6328.dtsi"
+
+/ {
+	model = "Comtrend AR-5387un Board";
+	compatible = "comtrend,ar5387-un", "brcm,bcm6328";
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+};
+
+&uart0 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
arch/mips/mach-bmips/Kconfig +6 -0
index 4c74cee..ffb6ddd 100644
@@ -35,6 +35,11 @@ endchoice
 choice
 	prompt "Board select"
 
+config BOARD_COMTREND_AR5387UN
+	bool "Comtrend AR-5387un board"
+	depends on SOC_BMIPS_BCM6328
+	select BMIPS_SUPPORTS_BOOT_RAM
+
 config BOARD_HUAWEI_HG556A
 	bool "Huawei HG556a board"
 	depends on SOC_BMIPS_BCM6358
@@ -57,6 +62,7 @@ endchoice
 config BMIPS_SUPPORTS_BOOT_RAM
 	bool
 
+source "board/comtrend/ar5387un/Kconfig"
 source "board/huawei/hg556a/Kconfig"
 
 endmenu
board/comtrend/ar5387un/Kconfig new file +12 -0
new file mode 100644
index 0000000..45ab7e2
@@ -0,0 +1,12 @@
+if BOARD_COMTREND_AR5387UN
+
+config SYS_BOARD
+	default "ar5387un"
+
+config SYS_VENDOR
+	default "comtrend"
+
+config SYS_CONFIG_NAME
+	default "comtrend_ar5387un"
+
+endif
board/comtrend/ar5387un/MAINTAINERS new file +6 -0
new file mode 100644
index 0000000..bcaac64
@@ -0,0 +1,6 @@
+COMTREND AR-5387UN BOARD
+M:	Álvaro Fernández Rojas <[email protected]>
+S:	Maintained
+F:	board/comtrend/ar-5387un/
+F:	include/configs/comtrend_ar5387un.h
+F:	configs/comtrend_ar5387un_ram_defconfig
board/comtrend/ar5387un/Makefile new file +5 -0
new file mode 100644
index 0000000..9de1cd2
@@ -0,0 +1,5 @@
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y += ar-5387un.o
board/comtrend/ar5387un/ar-5387un.c new file +7 -0
new file mode 100644
index 0000000..d181ca6
@@ -0,0 +1,7 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
configs/comtrend_ar5387un_ram_defconfig new file +42 -0

42 lines not on this page · raw message

include/configs/comtrend_ar5387un.h new file +15 -0
new file mode 100644
index 0000000..8803506
@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <configs/bmips_common.h>
+#include <configs/bmips_bcm6328.h>
+
+#define CONFIG_ENV_IS_NOWHERE
+#define CONFIG_ENV_SIZE			(8 * 1024)
+
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_CMDLINE_EDITING
Signature · 1 line
2.1.4
#31 lore raw

PATCH v2 12/14 MIPS: add support for Broadcom MIPS BCM63268 SoC family

In reply to Álvaro Fernández Rojas

---
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Add PERF_BASE to cpus.

 arch/mips/dts/brcm,bcm63268.dtsi | 88 ++++++++++++++++++++++++++++++++++++++++
 arch/mips/mach-bmips/Kconfig     | 12 ++++++
 include/configs/bmips_bcm63268.h | 25 ++++++++++++
 3 files changed, 125 insertions(+)
 create mode 100644 arch/mips/dts/brcm,bcm63268.dtsi
 create mode 100644 include/configs/bmips_bcm63268.h
arch/mips/dts/brcm,bcm63268.dtsi new file +88 -0
new file mode 100644
index 0000000..44ff888
@@ -0,0 +1,88 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include "skeleton.dtsi"
+
+/ {
+	compatible = "brcm,bcm63268";
+
+	cpus {
+		reg = <0x10000000 0x4>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		u-boot,dm-pre-reloc;
+
+		cpu at 0 {
+			compatible = "brcm,bcm63268-cpu", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <0>;
+			u-boot,dm-pre-reloc;
+		};
+
+		cpu at 1 {
+			compatible = "brcm,bcm63268-cpu", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <1>;
+			u-boot,dm-pre-reloc;
+		};
+	};
+
+	clocks {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		u-boot,dm-pre-reloc;
+
+		periph_osc: periph-osc {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <50000000>;
+			u-boot,dm-pre-reloc;
+		};
+	};
+
+	ubus {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		u-boot,dm-pre-reloc;
+
+		periph_cntl: syscon at 10000000 {
+			compatible = "syscon";
+			reg = <0x10000000 0x14>;
+		};
+
+		reboot: syscon-reboot {
+			compatible = "syscon-reboot";
+			regmap = <&periph_cntl>;
+			offset = <0x8>;
+			mask = <0x1>;
+		};
+
+		uart0: serial at 10000180 {
+			compatible = "brcm,bcm6345-uart";
+			reg = <0x10000180 0x18>;
+			clocks = <&periph_osc>;
+
+			status = "disabled";
+		};
+
+		uart1: serial at 100001a0 {
+			compatible = "brcm,bcm6345-uart";
+			reg = <0x100001a0 0x18>;
+			clocks = <&periph_osc>;
+
+			status = "disabled";
+		};
+
+		memory-controller at 10003000 {
+			compatible = "brcm,bcm6328-mc";
+			reg = <0x10003000 0x1000>;
+			u-boot,dm-pre-reloc;
+		};
+	};
+};
arch/mips/mach-bmips/Kconfig +12 -0
index ffb6ddd..6acad23 100644
@@ -4,6 +4,7 @@ menu "Broadcom MIPS platforms"
 config SYS_SOC
 	default "bcm6328" if SOC_BMIPS_BCM6328
 	default "bcm6358" if SOC_BMIPS_BCM6358
+	default "bcm63268" if SOC_BMIPS_BCM63268
 
 choice
 	prompt "Broadcom MIPS SoC select"
@@ -30,6 +31,17 @@ config SOC_BMIPS_BCM6358
 	help
 	  This supports BMIPS BCM6358 family including BCM6358 and BCM6359.
 
+config SOC_BMIPS_BCM63268
+	bool "BMIPS BCM63268 family"
+	select SUPPORTS_BIG_ENDIAN
+	select SUPPORTS_CPU_MIPS32_R1
+	select MIPS_TUNE_4KC
+	select MIPS_L1_CACHE_SHIFT_4
+	select SWAP_IO_SPACE
+	select SYSRESET_SYSCON
+	help
+	  This supports BMIPS BCM63268 family including BCM63168, BCM63169, BCM63268 and BCM63269.
+
 endchoice
 
 choice
include/configs/bmips_bcm63268.h new file +25 -0
new file mode 100644
index 0000000..91f42e9
@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_BMIPS_BCM63268_H
+#define __CONFIG_BMIPS_BCM63268_H
+
+/* CPU */
+#define CONFIG_SYS_MIPS_TIMER_FREQ	200000000
+
+/* RAM */
+#define CONFIG_NR_DRAM_BANKS		1
+#define CONFIG_SYS_SDRAM_BASE		0x80000000
+
+/* U-Boot */
+#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + 0x100000
+
+#if defined(CONFIG_BMIPS_BOOT_RAM)
+#define CONFIG_SYS_INIT_SP_OFFSET	0x2000
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#endif
+
+#endif /* __CONFIG_BMIPS_BCM63268_H */
Signature · 1 line
2.1.4
#32 lore raw

PATCH v2 13/14 MIPS: add BMIPS Comtrend VR-3032u board

In reply to Álvaro Fernández Rojas

---
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Remove DEBUG_UART from defconfig.

 arch/mips/dts/Makefile                 |  1 +
 arch/mips/dts/comtrend,vr-3032u.dts    | 27 ++++++++++++++++++++++
 arch/mips/mach-bmips/Kconfig           |  6 +++++
 board/comtrend/vr3032u/Kconfig         | 12 ++++++++++
 board/comtrend/vr3032u/MAINTAINERS     |  6 +++++
 board/comtrend/vr3032u/Makefile        |  5 ++++
 board/comtrend/vr3032u/vr-3032u.c      |  7 ++++++
 configs/comtrend_vr3032u_ram_defconfig | 42 ++++++++++++++++++++++++++++++++++
 include/configs/comtrend_vr3032u.h     | 15 ++++++++++++
 9 files changed, 121 insertions(+)
 create mode 100644 arch/mips/dts/comtrend,vr-3032u.dts
 create mode 100644 board/comtrend/vr3032u/Kconfig
 create mode 100644 board/comtrend/vr3032u/MAINTAINERS
 create mode 100644 board/comtrend/vr3032u/Makefile
 create mode 100644 board/comtrend/vr3032u/vr-3032u.c
 create mode 100644 configs/comtrend_vr3032u_ram_defconfig
 create mode 100644 include/configs/comtrend_vr3032u.h
arch/mips/dts/Makefile +1 -0
index 0805819..4c02c48 100644
@@ -9,6 +9,7 @@ dtb-$(CONFIG_TARGET_MALTA) += mti,malta.dtb
 dtb-$(CONFIG_TARGET_PIC32MZDASK) += pic32mzda_sk.dtb
 dtb-$(CONFIG_TARGET_XILFPGA) += nexys4ddr.dtb
 dtb-$(CONFIG_BOARD_COMTREND_AR5387UN) += comtrend,ar-5387un.dtb
+dtb-$(CONFIG_BOARD_COMTREND_VR3032U) += comtrend,vr-3032u.dtb
 dtb-$(CONFIG_BOARD_HUAWEI_HG556A) += huawei,hg556a.dtb
 dtb-$(CONFIG_BOARD_TPLINK_WDR4300) += tplink_wdr4300.dtb
 
arch/mips/dts/comtrend,vr-3032u.dts new file +27 -0
new file mode 100644
index 0000000..c0fdb28
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "brcm,bcm63268.dtsi"
+
+/ {
+	model = "Comtrend VR-3032u Board";
+	compatible = "comtrend,vr-3032u", "brcm,bcm63268";
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+};
+
+&uart0 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
arch/mips/mach-bmips/Kconfig +6 -0
index 6acad23..5b30f3b 100644
@@ -57,6 +57,11 @@ config BOARD_HUAWEI_HG556A
 	depends on SOC_BMIPS_BCM6358
 	select BMIPS_SUPPORTS_BOOT_RAM
 
+config BOARD_COMTREND_VR3032U
+	bool "Comtrend VR-3032u board"
+	depends on SOC_BMIPS_BCM63268
+	select BMIPS_SUPPORTS_BOOT_RAM
+
 endchoice
 
 choice
@@ -75,6 +80,7 @@ config BMIPS_SUPPORTS_BOOT_RAM
 	bool
 
 source "board/comtrend/ar5387un/Kconfig"
+source "board/comtrend/vr3032u/Kconfig"
 source "board/huawei/hg556a/Kconfig"
 
 endmenu
board/comtrend/vr3032u/Kconfig new file +12 -0
new file mode 100644
index 0000000..6f552cf
@@ -0,0 +1,12 @@
+if BOARD_COMTREND_VR3032U
+
+config SYS_BOARD
+	default "vr3032u"
+
+config SYS_VENDOR
+	default "comtrend"
+
+config SYS_CONFIG_NAME
+	default "comtrend_vr3032u"
+
+endif
board/comtrend/vr3032u/MAINTAINERS new file +6 -0
new file mode 100644
index 0000000..833d7da
@@ -0,0 +1,6 @@
+COMTREND VR-3032U BOARD
+M:	Álvaro Fernández Rojas <[email protected]>
+S:	Maintained
+F:	board/comtrend/vr-3032u/
+F:	include/configs/comtrend_vr-3032u.h
+F:	configs/comtrend_vr3032u_ram_defconfig
board/comtrend/vr3032u/Makefile new file +5 -0
new file mode 100644
index 0000000..9e62031
@@ -0,0 +1,5 @@
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y += vr-3032u.o
board/comtrend/vr3032u/vr-3032u.c new file +7 -0
new file mode 100644
index 0000000..d181ca6
@@ -0,0 +1,7 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
configs/comtrend_vr3032u_ram_defconfig new file +42 -0

42 lines not on this page · raw message

include/configs/comtrend_vr3032u.h new file +15 -0
new file mode 100644
index 0000000..066b4c7
@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <configs/bmips_common.h>
+#include <configs/bmips_bcm63268.h>
+
+#define CONFIG_ENV_IS_NOWHERE
+#define CONFIG_ENV_SIZE			(8 * 1024)
+
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_CMDLINE_EDITING
Signature · 1 line
2.1.4
#33 lore raw

PATCH v2 14/14 u-boot.elf: build it for every arch

In reply to Álvaro Fernández Rojas

ARM64 isn't the only arch that needs it, since BMIPS CFE supports loading .elf images instead of raw binaries.

---
v2: Introduce changes suggested by Daniel Schwierzeck:
- Avoid using a linker script.
- Reuse aarch64 u-boot.elf generation for other archs.
- Fix _start vs __start symbol.

 Makefile | 21 +++++++++++++--------
 1 file changed, 13 insertions(+), 8 deletions(-)
Makefile +13 -8
index 8d4e605..8093a6b 100644
@@ -747,6 +747,9 @@ BOARD_SIZE_CHECK =
 endif
 
 # Statically apply RELA-style relocations (currently arm64 only)
+# This is useful for arm64 where static relocation needs to be performed on
+# the raw binary, but certain simulators only accept an ELF file (but don't
+# do the relocation).
 ifneq ($(CONFIG_STATIC_RELA),)
 # $(1) is u-boot ELF, $(2) is u-boot bin, $(3) is text base
 DO_STATIC_RELA = \
@@ -758,7 +761,8 @@ DO_STATIC_RELA =
 endif
 
 # Always append ALL so that arch config.mk's can add custom ones
-ALL-y += u-boot.srec u-boot.bin u-boot.sym System.map binary_size_check
+ALL-y += u-boot.srec u-boot.bin u-boot.elf u-boot.sym
+ALL-y += System.map binary_size_check
 
 ALL-$(CONFIG_ONENAND_U_BOOT) += u-boot-onenand.bin
 ifeq ($(CONFIG_SPL_FSL_PBL),y)
@@ -785,7 +789,6 @@ ALL-$(CONFIG_OF_HOSTFILE) += u-boot.dtb
 ifneq ($(CONFIG_SPL_TARGET),)
 ALL-$(CONFIG_SPL) += $(CONFIG_SPL_TARGET:"%"=%)
 endif
-ALL-$(CONFIG_REMAKE_ELF) += u-boot.elf
 ALL-$(CONFIG_EFI_APP) += u-boot-app.efi
 ALL-$(CONFIG_EFI_STUB) += u-boot-payload.efi
 
@@ -1180,16 +1183,18 @@ OBJCOPYFLAGS_u-boot-img-spl-at-end.bin := -I binary -O binary \
 u-boot-img-spl-at-end.bin: u-boot.img spl/u-boot-spl.bin FORCE
 	$(call if_changed,pad_cat)
 
-# Create a new ELF from a raw binary file.  This is useful for arm64
-# where static relocation needs to be performed on the raw binary,
-# but certain simulators only accept an ELF file (but don't do the
-# relocation).
+# Create a new ELF from a raw binary file.
 # FIXME refactor dts/Makefile to share target/arch detection
+ifdef CONFIG_64BIT
+O_FORMAT := $(shell $(OBJDUMP) -i | head -2 | grep elf64)
+else
+O_FORMAT := $(shell $(OBJDUMP) -i | head -2 | grep elf32)
+endif
 u-boot.elf: u-boot.bin
-	@$(OBJCOPY)  -B aarch64 -I binary -O elf64-littleaarch64 \
+	@$(OBJCOPY) -B $(ARCH) -I binary -O $(O_FORMAT) \
 		$< u-boot-elf.o
 	@$(LD) u-boot-elf.o -o $@ \
-		--defsym=_start=$(CONFIG_SYS_TEXT_BASE) \
+		--defsym=__start=$(CONFIG_SYS_TEXT_BASE) \
 		-Ttext=$(CONFIG_SYS_TEXT_BASE)
 
 # Rule to link u-boot
Signature · 1 line
2.1.4
#34 lore raw

PATCH v2 14/14 u-boot.elf: build it for every arch

+cc more people involved with ARM

note: purpose of this patch is to provide an u-boot.elf binary for Broadcom MIPS platforms by re-using the already existing Makefile target for aarch64. This u-boot.elf binary should be used as a stage 2 loader until U-Boot can be replace the original Broadcom boot loader.

Am 16.04.2017 um 00:04 schrieb Álvaro Fernández Rojas:

Quoted 38 lines

ARM64 isn't the only arch that needs it, since BMIPS CFE supports loading .elf images instead of raw binaries.

---
v2: Introduce changes suggested by Daniel Schwierzeck:
- Avoid using a linker script.
- Reuse aarch64 u-boot.elf generation for other archs.
- Fix _start vs __start symbol.

 Makefile | 21 +++++++++++++--------
 1 file changed, 13 insertions(+), 8 deletions(-)
Makefile +5 -1
index 8d4e605..8093a6b 100644
@@ -747,6 +747,9 @@ BOARD_SIZE_CHECK =
 endif
 
 # Statically apply RELA-style relocations (currently arm64 only)
+# This is useful for arm64 where static relocation needs to be performed on
+# the raw binary, but certain simulators only accept an ELF file (but don't
+# do the relocation).
 ifneq ($(CONFIG_STATIC_RELA),)
 # $(1) is u-boot ELF, $(2) is u-boot bin, $(3) is text base
 DO_STATIC_RELA = \
@@ -758,7 +761,8 @@ DO_STATIC_RELA =
 endif
 
 # Always append ALL so that arch config.mk's can add custom ones
-ALL-y += u-boot.srec u-boot.bin u-boot.sym System.map binary_size_check
+ALL-y += u-boot.srec u-boot.bin u-boot.elf u-boot.sym
+ALL-y += System.map binary_size_check
 
 ALL-$(CONFIG_ONENAND_U_BOOT) += u-boot-onenand.bin
 ifeq ($(CONFIG_SPL_FSL_PBL),y)

Makefile ALL-$(CONFIG_OF_HOSTFILE) += u-boot.dtb · line 788

Quoted 4 lines
Makefile +0 -1
@@ -785,7 +789,6 @@ ALL-$(CONFIG_OF_HOSTFILE) += u-boot.dtb
 ifneq ($(CONFIG_SPL_TARGET),)
 ALL-$(CONFIG_SPL) += $(CONFIG_SPL_TARGET:"%"=%)
 endif
-ALL-$(CONFIG_REMAKE_ELF) += u-boot.elf

the current behaviour shouldn't be changed where u-boot.elf is only built when requested by a board

Quoted 8 lines
Makefile +0 -1
 ALL-$(CONFIG_EFI_APP) += u-boot-app.efi
 ALL-$(CONFIG_EFI_STUB) += u-boot-payload.efi
 
@@ -1180,16 +1183,18 @@ OBJCOPYFLAGS_u-boot-img-spl-at-end.bin := -I binary -O binary \
 u-boot-img-spl-at-end.bin: u-boot.img spl/u-boot-spl.bin FORCE
 	$(call if_changed,pad_cat)
 
-# Create a new ELF from a raw binary file.  This is useful for arm64

Makefile OBJCOPYFLAGS_u-boot-img-spl-at-end.bin := -I binary -O binary \ · line 1192

Quoted 10 lines
Makefile +6 -3
-# where static relocation needs to be performed on the raw binary,
-# but certain simulators only accept an ELF file (but don't do the
-# relocation).
+# Create a new ELF from a raw binary file.
 # FIXME refactor dts/Makefile to share target/arch detection
+ifdef CONFIG_64BIT
+O_FORMAT := $(shell $(OBJDUMP) -i | head -2 | grep elf64)
+else
+O_FORMAT := $(shell $(OBJDUMP) -i | head -2 | grep elf32)
+endif

this should be set in arch/ARCH/config.mk. Also this is already contained in OBJCOPYFLAGS. Either we can filter out the value for -O from OBJCOPYFLAGS or we define an extra variable like PLATFORM_ELFFLAGS or OBJCOPYFLAGS_ELF where we assign the values for -B and -O.

For example:

arch/mips/config.mk +7 -1
@@ -36,6 +36,7 @@ OBJCOPYFLAGS          += -O $(64bit-bfd)
 endif
 
 PLATFORM_CPPFLAGS += -D__MIPS__
+PLATFORM_ELFFLAGS += -B mips $(OBJCOPYFLAGS)
 
 
--- a/arch/arm/config.mk
+++ b/arch/arm/config.mk
@@ -30,6 +30,12 @@ PLATFORM_RELFLAGS    += $(LLVM_RELFLAGS)
 
 PLATFORM_CPPFLAGS += -D__ARM__
 
+ifdef CONFIG_ARM64
+PLATFORM_ELFFLAGS += -B aarch64 -O elf64-littleaarch64
+else
+PLATFORM_ELFFLAGS += -B arm -O elf32-littlearm
+endif
 
 
 

Makefile OBJCOPYFLAGS_u-boot-img-spl-at-end.bin := -I binary -O binary \ · line 1197

Quoted 7 lines
Makefile +2 -2
 u-boot.elf: u-boot.bin
-	@$(OBJCOPY)  -B aarch64 -I binary -O elf64-littleaarch64 \
+	@$(OBJCOPY) -B $(ARCH) -I binary -O $(O_FORMAT) \
 		$< u-boot-elf.o
 	@$(LD) u-boot-elf.o -o $@ \
-		--defsym=_start=$(CONFIG_SYS_TEXT_BASE) \
+		--defsym=__start=$(CONFIG_SYS_TEXT_BASE) \

I'm not sure but changing to __start for all could break aarch64 boards.

Quoted 4 lines
Makefile +0 -0
 		-Ttext=$(CONFIG_SYS_TEXT_BASE)
 
 # Rule to link u-boot
Signature · 9 lines
- Daniel

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#35 lore raw

v3 cover u-boot.elf: support other archs

In reply to Álvaro Fernández Rojas

Provide an u-boot.elf binary for Broadcom MIPS platforms by re-using the already existing Makefile target for aarch64.
This u-boot.elf binary should be used as a stage 2 loader until U-Boot can be replace the original Broadcom boot loader.

Split patches from main BMIPS support.

Álvaro Fernández Rojas (3):
u-boot.elf: remove hard-coded arm64 flags
u-boot.elf: fix entry symbol not found warning
MIPS: add support for generating u-boot.elf

 Makefile            | 14 ++++++--------
 arch/arm/config.mk  |  6 ++++++
 arch/mips/config.mk |  1 +
 3 files changed, 13 insertions(+), 8 deletions(-)
Signature · 1 line
2.1.4
#36 lore raw

PATCH v3 1/3 u-boot.elf: remove hard-coded arm64 flags

This is needed in order to allow building it for other archs. Move relocation comment to a better place.
Remove no longer needed dts FIXME.

---
v3: Introduce changes suggested by Daniel Schwierzeck:
- Split patches.
- Avoid building it unconditionally.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Avoid using a linker script.
- Reuse aarch64 u-boot.elf generation for other archs.

 Makefile           | 12 +++++-------
 arch/arm/config.mk |  6 ++++++
 2 files changed, 11 insertions(+), 7 deletions(-)
Makefile +5 -7
index 131d62e..8730550 100644
@@ -747,6 +747,9 @@ BOARD_SIZE_CHECK =
 endif
 
 # Statically apply RELA-style relocations (currently arm64 only)
+# This is useful for arm64 where static relocation needs to be performed on
+# the raw binary, but certain simulators only accept an ELF file (but don't
+# do the relocation).
 ifneq ($(CONFIG_STATIC_RELA),)
 # $(1) is u-boot ELF, $(2) is u-boot bin, $(3) is text base
 DO_STATIC_RELA = \
@@ -1180,14 +1183,9 @@ OBJCOPYFLAGS_u-boot-img-spl-at-end.bin := -I binary -O binary \
 u-boot-img-spl-at-end.bin: u-boot.img spl/u-boot-spl.bin FORCE
 	$(call if_changed,pad_cat)
 
-# Create a new ELF from a raw binary file.  This is useful for arm64
-# where static relocation needs to be performed on the raw binary,
-# but certain simulators only accept an ELF file (but don't do the
-# relocation).
-# FIXME refactor dts/Makefile to share target/arch detection
+# Create a new ELF from a raw binary file.
 u-boot.elf: u-boot.bin
-	@$(OBJCOPY)  -B aarch64 -I binary -O elf64-littleaarch64 \
-		$< u-boot-elf.o
+	@$(OBJCOPY) -I binary $(PLATFORM_ELFFLAGS) $< u-boot-elf.o
 	@$(LD) u-boot-elf.o -o $@ \
 		--defsym=_start=$(CONFIG_SYS_TEXT_BASE) \
 		-Ttext=$(CONFIG_SYS_TEXT_BASE)
arch/arm/config.mk +6 -0
index 907c693..257ad09 100644
@@ -30,6 +30,12 @@ PLATFORM_RELFLAGS	+= $(LLVM_RELFLAGS)
 
 PLATFORM_CPPFLAGS += -D__ARM__
 
+ifdef CONFIG_ARM64
+PLATFORM_ELFFLAGS += -B aarch64 -O elf64-littleaarch64
+else
+PLATFORM_ELFFLAGS += -B arm -O elf32-littlearm
+endif
+
 # Choose between ARM/Thumb instruction sets
 ifeq ($(CONFIG_$(SPL_)SYS_THUMB_BUILD),y)
 AFLAGS_IMPLICIT_IT	:= $(call as-option,-Wa$(comma)-mimplicit-it=always)
Signature · 1 line
2.1.4
#37 lore raw

PATCH v3 1/3 u-boot.elf: remove hard-coded arm64 flags

Quoted 5 lines · Álvaro Fernández Rojas

This is needed in order to allow building it for other archs. Move relocation comment to a better place.
Remove no longer needed dts FIXME.

Signature · 8 lines
Tom
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#38 lore raw

PATCH v3 2/3 u-boot.elf: fix entry symbol not found warning

In reply to Álvaro Fernández Rojas

LD gives the following warning when trying to process u-boot-elf.o
warning: cannot find entry symbol __start; defaulting to 0000000080010000 Fix this by renaming _start to __start

---
v3: Introduce changes suggested by Daniel Schwierzeck:
- Split patches.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Fix _start vs __start symbol.

 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
Makefile +1 -1
index 8730550..66c9be2 100644
@@ -1187,7 +1187,7 @@ u-boot-img-spl-at-end.bin: u-boot.img spl/u-boot-spl.bin FORCE
 u-boot.elf: u-boot.bin
 	@$(OBJCOPY) -I binary $(PLATFORM_ELFFLAGS) $< u-boot-elf.o
 	@$(LD) u-boot-elf.o -o $@ \
-		--defsym=_start=$(CONFIG_SYS_TEXT_BASE) \
+		--defsym=__start=$(CONFIG_SYS_TEXT_BASE) \
 		-Ttext=$(CONFIG_SYS_TEXT_BASE)
 
 # Rule to link u-boot
Signature · 1 line
2.1.4
#39 lore raw

PATCH v3 2/3 u-boot.elf: fix entry symbol not found warning

Quoted 19 lines · Álvaro Fernández Rojas

LD gives the following warning when trying to process u-boot-elf.o
warning: cannot find entry symbol __start; defaulting to 0000000080010000 Fix this by renaming _start to __start

---
v3: Introduce changes suggested by Daniel Schwierzeck:
- Split patches.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Fix _start vs __start symbol.

 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
Makefile +0 -0
index 8730550..66c9be2 100644

Makefile u-boot-img-spl-at-end.bin: u-boot.img spl/u-boot-spl.bin FORCE · line 1193

Quoted 8 lines
Makefile +1 -1
@@ -1187,7 +1187,7 @@ u-boot-img-spl-at-end.bin: u-boot.img spl/u-boot-spl.bin FORCE
 u-boot.elf: u-boot.bin
 	@$(OBJCOPY) -I binary $(PLATFORM_ELFFLAGS) $< u-boot-elf.o
 	@$(LD) u-boot-elf.o -o $@ \
-		--defsym=_start=$(CONFIG_SYS_TEXT_BASE) \
+		--defsym=__start=$(CONFIG_SYS_TEXT_BASE) \
 		-Ttext=$(CONFIG_SYS_TEXT_BASE)
 
 # Rule to link u-boot

I don't know what's going on here, but I don't think this is right. We don't see this warning on aarch64 today. I would think that since we're talking about ELF _start vs __start would be part of the standard.

Signature · 8 lines
Tom
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#40 lore raw

PATCH v3 3/3 MIPS: add support for generating u-boot.elf

In reply to Álvaro Fernández Rojas

Define PLATFORM_ELFFLAGS for MIPS in order to be able to generate u-boot.elf

---
v3: Introduce changes suggested by Daniel Schwierzeck:
- Add new patch.

 arch/mips/config.mk | 1 +
 1 file changed, 1 insertion(+)
arch/mips/config.mk +1 -0
index dcd3460..1879a53 100644
@@ -36,6 +36,7 @@ OBJCOPYFLAGS		+= -O $(64bit-bfd)
 endif
 
 PLATFORM_CPPFLAGS += -D__MIPS__
+PLATFORM_ELFFLAGS += -B mips $(OBJCOPYFLAGS)
 
 #
 # From Linux arch/mips/Makefile
Signature · 1 line
2.1.4
#41 lore raw

v3 cover u-boot.elf: support other archs

In reply to Álvaro Fernández Rojas
Quoted 12 lines · Álvaro Fernández Rojas

Provide an u-boot.elf binary for Broadcom MIPS platforms by re-using the already existing Makefile target for aarch64.
This u-boot.elf binary should be used as a stage 2 loader until U-Boot can be replace the original Broadcom boot loader.

Split patches from main BMIPS support.

Álvaro Fernández Rojas (3):
u-boot.elf: remove hard-coded arm64 flags
u-boot.elf: fix entry symbol not found warning
MIPS: add support for generating u-boot.elf

Quoted 4 lines
 Makefile            | 14 ++++++--------
 arch/arm/config.mk  |  6 ++++++
 arch/mips/config.mk |  1 +
 3 files changed, 13 insertions(+), 8 deletions(-)

Can you please do a patch #4 that moves from using '@' in the command to quiet_cmd_xxx/cmd_xxx so that we see output normally about building u-boot.elf? Thanks!

Signature · 8 lines
Tom
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#42 lore raw

v3 cover Add support for Broadcom MIPS SoCs

In reply to Álvaro Fernández Rojas

This adds support for some of the xDSL Broadcom MIPS SoCs:
- BCM6358
- BCM6328
- BCM63268
However, support for other SoCs could be added in the future:
- Other BCM63xx
- BCM33xx
- BCM71xx

v3: Introduce changes suggested by Simon Glass.
v2: Introduce changes suggested by Daniel Schwierzeck.

Álvaro Fernández Rojas (15):
cmd: cpu: fix NULL cpu feature prints
sysreset-uclass: ensure udevice is probed before requesting reset
sysreset: add syscon-reboot driver
MIPS: allow using generic sysreset drivers
serial: add serial driver for BCM6345
cmd: cpu: ensure udevice is probed before calling cpu ops
cpu: add CPU driver for Broadcom MIPS SoCs
ram: add RAM driver for Broadcom MIPS SoCs
MIPS: add initial infrastructure for Broadcom MIPS SoCs
MIPS: add support for Broadcom MIPS BCM6358 SoC family
MIPS: add BMIPS Huawei HG556a board
MIPS: add support for Broadcom MIPS BCM6328 SoC family
MIPS: add BMIPS Comtrend AR-5387un board
MIPS: add support for Broadcom MIPS BCM63268 SoC family
MIPS: add BMIPS Comtrend VR-3032u board

 arch/mips/Kconfig                       |  10 ++
 arch/mips/Makefile                      |   1 +
 arch/mips/cpu/cpu.c                     |   2 +
 arch/mips/cpu/start.S                   |   5 +
 arch/mips/dts/Makefile                  |   3 +
 arch/mips/dts/brcm,bcm63268.dtsi        |  88 ++++++++++
 arch/mips/dts/brcm,bcm6328.dtsi         |  88 ++++++++++
 arch/mips/dts/brcm,bcm6358.dtsi         |  98 +++++++++++
 arch/mips/dts/comtrend,ar-5387un.dts    |  27 +++
 arch/mips/dts/comtrend,vr-3032u.dts     |  27 +++
 arch/mips/dts/huawei,hg556a.dts         |  31 ++++
 arch/mips/mach-bmips/Kconfig            |  86 +++++++++
 arch/mips/mach-bmips/Makefile           |   5 +
 arch/mips/mach-bmips/dram.c             |  37 ++++
 arch/mips/mach-bmips/include/ioremap.h  |  45 +++++
 board/comtrend/ar5387un/Kconfig         |  12 ++
 board/comtrend/ar5387un/MAINTAINERS     |   6 +
 board/comtrend/ar5387un/Makefile        |   5 +
 board/comtrend/ar5387un/ar-5387un.c     |   7 +
 board/comtrend/vr3032u/Kconfig          |  12 ++
 board/comtrend/vr3032u/MAINTAINERS      |   6 +
 board/comtrend/vr3032u/Makefile         |   5 +
 board/comtrend/vr3032u/vr-3032u.c       |   7 +
 board/huawei/hg556a/Kconfig             |  12 ++
 board/huawei/hg556a/MAINTAINERS         |   6 +
 board/huawei/hg556a/Makefile            |   5 +
 board/huawei/hg556a/hg556a.c            |   7 +
 cmd/cpu.c                               |   5 +
 configs/comtrend_ar5387un_ram_defconfig |  42 +++++
 configs/comtrend_vr3032u_ram_defconfig  |  42 +++++
 configs/huawei_hg556a_ram_defconfig     |  45 +++++
 drivers/cpu/Makefile                    |   2 +
 drivers/cpu/bmips_cpu.c                 | 280 ++++++++++++++++++++++++++++++
 drivers/ram/Makefile                    |   2 +
 drivers/ram/bmips_ram.c                 | 126 ++++++++++++++
 drivers/serial/Kconfig                  |  14 ++
 drivers/serial/Makefile                 |   1 +
 drivers/serial/serial_bcm6345.c         | 299 ++++++++++++++++++++++++++++++++
 drivers/sysreset/Kconfig                |   8 +
 drivers/sysreset/Makefile               |   1 +
 drivers/sysreset/sysreset-uclass.c      |   3 +
 drivers/sysreset/sysreset_syscon.c      |  76 ++++++++
 include/configs/bmips_bcm63268.h        |  25 +++
 include/configs/bmips_bcm6328.h         |  25 +++
 include/configs/bmips_bcm6358.h         |  30 ++++
 include/configs/bmips_common.h          |  27 +++
 include/configs/comtrend_ar5387un.h     |  15 ++
 include/configs/comtrend_vr3032u.h      |  15 ++
 include/configs/huawei_hg556a.h         |  18 ++
 49 files changed, 1744 insertions(+)
 create mode 100644 arch/mips/dts/brcm,bcm63268.dtsi
 create mode 100644 arch/mips/dts/brcm,bcm6328.dtsi
 create mode 100644 arch/mips/dts/brcm,bcm6358.dtsi
 create mode 100644 arch/mips/dts/comtrend,ar-5387un.dts
 create mode 100644 arch/mips/dts/comtrend,vr-3032u.dts
 create mode 100644 arch/mips/dts/huawei,hg556a.dts
 create mode 100644 arch/mips/mach-bmips/Kconfig
 create mode 100644 arch/mips/mach-bmips/Makefile
 create mode 100644 arch/mips/mach-bmips/dram.c
 create mode 100644 arch/mips/mach-bmips/include/ioremap.h
 create mode 100644 board/comtrend/ar5387un/Kconfig
 create mode 100644 board/comtrend/ar5387un/MAINTAINERS
 create mode 100644 board/comtrend/ar5387un/Makefile
 create mode 100644 board/comtrend/ar5387un/ar-5387un.c
 create mode 100644 board/comtrend/vr3032u/Kconfig
 create mode 100644 board/comtrend/vr3032u/MAINTAINERS
 create mode 100644 board/comtrend/vr3032u/Makefile
 create mode 100644 board/comtrend/vr3032u/vr-3032u.c
 create mode 100644 board/huawei/hg556a/Kconfig
 create mode 100644 board/huawei/hg556a/MAINTAINERS
 create mode 100644 board/huawei/hg556a/Makefile
 create mode 100644 board/huawei/hg556a/hg556a.c
 create mode 100644 configs/comtrend_ar5387un_ram_defconfig
 create mode 100644 configs/comtrend_vr3032u_ram_defconfig
 create mode 100644 configs/huawei_hg556a_ram_defconfig
 create mode 100644 drivers/cpu/bmips_cpu.c
 create mode 100644 drivers/ram/bmips_ram.c
 create mode 100644 drivers/serial/serial_bcm6345.c
 create mode 100644 drivers/sysreset/sysreset_syscon.c
 create mode 100644 include/configs/bmips_bcm63268.h
 create mode 100644 include/configs/bmips_bcm6328.h
 create mode 100644 include/configs/bmips_bcm6358.h
 create mode 100644 include/configs/bmips_common.h
 create mode 100644 include/configs/comtrend_ar5387un.h
 create mode 100644 include/configs/comtrend_vr3032u.h
 create mode 100644 include/configs/huawei_hg556a.h
Signature · 1 line
2.1.4
#43 lore raw

PATCH v3 1/15 cmd: cpu: fix NULL cpu feature prints

Commit 740d5d3 added two new features but only one feature name, which results in NULL prints when device_id feature is selected.

Before:

	HG556a # cpu detail
	 -1: cpu at 0	BCM6358A1
		ID = 0, freq = 300 MHz: L1 cache, MMU, NULL
		Device ID 0x2a010
	 -1: cpu at 1	BCM6358A1
		ID = 1, freq = 300 MHz: L1 cache, MMU, NULL
		Device ID 0x2a010
After:
	HG556a # cpu detail
	 -1: cpu at 0	BCM6358A1
		ID = 0, freq = 300 MHz: L1 cache, MMU, Device ID
		Device ID 0x2a010
	 -1: cpu at 1	BCM6358A1
		ID = 1, freq = 300 MHz: L1 cache, MMU, Device ID
		Device ID 0x2a010

---
v3: No changes.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Add the missing name instead of checking for null names.

 cmd/cpu.c | 1 +
 1 file changed, 1 insertion(+)
cmd/cpu.c +1 -0
index bc4dc5c..adfd54a 100644
@@ -15,6 +15,7 @@ static const char *cpu_feature_name[CPU_FEAT_COUNT] = {
 	"L1 cache",
 	"MMU",
 	"Microcode",
+	"Device ID",
 };
 
 static int print_cpu_list(bool detail)
Signature · 1 line
2.1.4
#44 lore raw

PATCH v3 1/15 cmd: cpu: fix NULL cpu feature prints

Quoted 20 lines · Álvaro Fernández Rojas

Commit 740d5d3 added two new features but only one feature name, which results in NULL prints when device_id feature is selected.

Before:

	HG556a # cpu detail
	 -1: cpu at 0	BCM6358A1
		ID = 0, freq = 300 MHz: L1 cache, MMU, NULL
		Device ID 0x2a010
	 -1: cpu at 1	BCM6358A1
		ID = 1, freq = 300 MHz: L1 cache, MMU, NULL
		Device ID 0x2a010
After:
	HG556a # cpu detail
	 -1: cpu at 0	BCM6358A1
		ID = 0, freq = 300 MHz: L1 cache, MMU, Device ID
		Device ID 0x2a010
	 -1: cpu at 1	BCM6358A1
		ID = 1, freq = 300 MHz: L1 cache, MMU, Device ID
		Device ID 0x2a010
Quoted 2 lines
Signature · 8 lines
Tom
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#45 lore raw

PATCH v3 2/15 sysreset-uclass: ensure udevice is probed before requesting reset

In reply to Álvaro Fernández Rojas

This causes exceptions for drivers that aren't probed when reboot is requested.

---
v3: add new patch to ensure that the device is probed

 drivers/sysreset/sysreset-uclass.c | 3 +++
 1 file changed, 3 insertions(+)
drivers/sysreset/sysreset-uclass.c +3 -0
index 3566d17..329dc2e 100644
@@ -34,6 +34,9 @@ int sysreset_walk(enum sysreset_t type)
 		for (uclass_first_device(UCLASS_SYSRESET, &dev);
 		     dev;
 		     uclass_next_device(&dev)) {
+			if (!device_active(dev) && device_probe(dev))
+				continue;
+
 			ret = sysreset_request(dev, type);
 			if (ret == -EINPROGRESS)
 				break;
Signature · 1 line
2.1.4
#46 lore raw

PATCH v3 2/15 sysreset-uclass: ensure udevice is probed before requesting reset

Hi Alvaro,

Quoted 15 lines · Álvaro Fernández Rojas

This causes exceptions for drivers that aren't probed when reboot is requested.

---
v3: add new patch to ensure that the device is probed

 drivers/sysreset/sysreset-uclass.c | 3 +++
 1 file changed, 3 insertions(+)
drivers/sysreset/sysreset-uclass.c +0 -0
index 3566d17..329dc2e 100644

drivers/sysreset/sysreset-uclass.c int sysreset_walk(enum sysreset_t type) · line 38

Quoted 5 lines
drivers/sysreset/sysreset-uclass.c +2 -0
@@ -34,6 +34,9 @@ int sysreset_walk(enum sysreset_t type)
                for (uclass_first_device(UCLASS_SYSRESET, &dev);
                     dev;
                     uclass_next_device(&dev)) {
+                       if (!device_active(dev) && device_probe(dev))
+                               continue;

uclass_first_device() should activate the device. Can you please dig into what is going on here?

Quoted 7 lines
drivers/sysreset/sysreset-uclass.c +1 -1
+
                        ret = sysreset_request(dev, type);
                        if (ret == -EINPROGRESS)
                                break;
--

2.1.4

Regards,
Simon

#47 lore raw

PATCH v3 2/15 sysreset-uclass: ensure udevice is probed before requesting reset

Hi Simon,

Quoted 13 lines · Simon Glass

Hi Alvaro,

Quoted 10 lines · Álvaro Fernández Rojas

This causes exceptions for drivers that aren't probed when reboot is requested.

---
v3: add new patch to ensure that the device is probed

 drivers/sysreset/sysreset-uclass.c | 3 +++
 1 file changed, 3 insertions(+)
Quoted 13 lines

drivers/sysreset/sysreset-uclass.c int sysreset_walk(enum sysreset_t type) · line 38

Quoted 10 lines
drivers/sysreset/sysreset-uclass.c +2 -0
index 3566d17..329dc2e 100644
@@ -34,6 +34,9 @@ int sysreset_walk(enum sysreset_t type)
                for (uclass_first_device(UCLASS_SYSRESET, &dev);
                     dev;
                     uclass_next_device(&dev)) {
+                       if (!device_active(dev) && device_probe(dev))
+                               continue;

uclass_first_device() should activate the device. Can you please dig into what is going on here?

I'll try to investigate it later today or tomorrow...
Could this be related to core/uclass: uclass_get_device_tail: always set devp?
http://patchwork.ozlabs.org/patch/751929/

Quoted 9 lines
Quoted 8 lines
drivers/sysreset/sysreset-uclass.c +1 -1
+
                        ret = sysreset_request(dev, type);
                        if (ret == -EINPROGRESS)
                                break;
--

2.1.4

Quoted 3 lines

Regards,
Simon

Regards,
Álvaro.

#48 lore raw

PATCH v3 2/15 sysreset-uclass: ensure udevice is probed before requesting reset

This is what I think it's going on:
sysreset_walk():
- calls uclass_first_device():
- Calls uclass_find_first_device():
- device is found.
- ret is set to 0.
- Calls uclass_get_device_tail():
- ret == 0 -> doesn't return.
- dev != null -> assert is true.
- Calls device_probe():
- It fails *somewhere* and goes to fail WITHOUT setting dev to NULL.
- ret != 0 -> returns without setting devp = dev.
- dev is NOT NULL but device is not probed.
- Tries to get ops from a not probed device -> Exception.
So basically it's a bug related to device_probe not nulling dev when failing and sysreset_walk() checking only if the device is not null and not the actual return of uclass_first_device() and uclass_next_device()...

On Wed, Apr 19, 2017 at 7:28 AM +0200, "Álvaro Fernández Rojas" <[email protected]> wrote:

Hi Simon,

Quoted 13 lines · Simon Glass

Hi Alvaro,

Quoted 10 lines · Álvaro Fernández Rojas

This causes exceptions for drivers that aren't probed when reboot is requested.

Signed-off-by Álvaro Fernández Rojas

---
v3: add new patch to ensure that the device is probed

 drivers/sysreset/sysreset-uclass.c | 3 +++
 1 file changed, 3 insertions(+)
Quoted 13 lines

drivers/sysreset/sysreset-uclass.c int sysreset_walk(enum sysreset_t type) · line 38

Quoted 10 lines
drivers/sysreset/sysreset-uclass.c +2 -0
index 3566d17..329dc2e 100644
@@ -34,6 +34,9 @@ int sysreset_walk(enum sysreset_t type)
                for (uclass_first_device(UCLASS_SYSRESET, &dev);
                     dev;
                     uclass_next_device(&dev)) {
+                       if (!device_active(dev) && device_probe(dev))
+                               continue;

uclass_first_device() should activate the device. Can you please dig into what is going on here?

I'll try to investigate it later today or tomorrow...
Could this be related to core/uclass: uclass_get_device_tail: always set devp?
http://patchwork.ozlabs.org/patch/751929/

Quoted 9 lines
Quoted 8 lines
drivers/sysreset/sysreset-uclass.c +1 -1
+
                        ret = sysreset_request(dev, type);
                        if (ret == -EINPROGRESS)
                                break;
--

2.1.4

Quoted 3 lines

Regards,
Simon

Regards,
Álvaro.

#49 lore raw

PATCH v3 2/15 sysreset-uclass: ensure udevice is probed before requesting reset

Hi Alvaro,

Quoted 17 lines · Álvaro Fernández Rojas

This is what I think it's going on:

sysreset_walk():
- calls uclass_first_device():
- Calls uclass_find_first_device():
- device is found.
- ret is set to 0.
- Calls uclass_get_device_tail():
- ret == 0 -> doesn't return.
- dev != null -> assert is true.
- Calls device_probe():
- It fails *somewhere* and goes to fail WITHOUT setting dev to NULL.
- ret != 0 -> returns without setting devp = dev.
- dev is NOT NULL but device is not probed.
- Tries to get ops from a not probed device -> Exception.

Quoted 3 lines

So basically it's a bug related to device_probe not nulling dev when failing and sysreset_walk() checking only if the device is not null and not the actual return of uclass_first_device() and uclass_next_device()...

OK thanks for the explanation. Yes this is a bug and there are no tests to catch it.

In this case uclass_first/next_device() should return dev = NULL.

I'll take a look and see if I can create a few patches.

Regards,
Simon

Quoted 56 lines
Quoted 49 lines · Álvaro Fernández Rojas

Hi Simon,

Quoted 13 lines · Simon Glass

Hi Alvaro,

Quoted 10 lines · Álvaro Fernández Rojas

This causes exceptions for drivers that aren't probed when reboot is requested.

Signed-off-by Álvaro Fernández Rojas

---
v3: add new patch to ensure that the device is probed

 drivers/sysreset/sysreset-uclass.c | 3 +++
 1 file changed, 3 insertions(+)
Quoted 14 lines

drivers/sysreset/sysreset-uclass.c int sysreset_walk(enum sysreset_t type) · line 38

Quoted 11 lines
drivers/sysreset/sysreset-uclass.c +2 -0
index 3566d17..329dc2e 100644
@@ -34,6 +34,9 @@ int sysreset_walk(enum sysreset_t type)
                for (uclass_first_device(UCLASS_SYSRESET, &dev);
                     dev;
                     uclass_next_device(&dev)) {
+                       if (!device_active(dev) && device_probe(dev))
+                               continue;

uclass_first_device() should activate the device. Can you please dig into what is going on here?

I'll try to investigate it later today or tomorrow...
Could this be related to core/uclass: uclass_get_device_tail: always set devp?
http://patchwork.ozlabs.org/patch/751929/

Quoted 9 lines
Quoted 8 lines
drivers/sysreset/sysreset-uclass.c +1 -1
+
                        ret = sysreset_request(dev, type);
                        if (ret == -EINPROGRESS)
                                break;
--

2.1.4

Quoted 3 lines

Regards,
Simon

Regards,
Álvaro.

#50 lore raw

PATCH v3 2/15 sysreset-uclass: ensure udevice is probed before requesting reset

Hi Alvaro,

Quoted 24 lines · Simon Glass

Hi Alvaro,

Quoted 17 lines · Álvaro Fernández Rojas

This is what I think it's going on:

sysreset_walk():
- calls uclass_first_device():
- Calls uclass_find_first_device():
- device is found.
- ret is set to 0.
- Calls uclass_get_device_tail():
- ret == 0 -> doesn't return.
- dev != null -> assert is true.
- Calls device_probe():
- It fails *somewhere* and goes to fail WITHOUT setting dev to NULL.
- ret != 0 -> returns without setting devp = dev.
- dev is NOT NULL but device is not probed.
- Tries to get ops from a not probed device -> Exception.

Quoted 3 lines

So basically it's a bug related to device_probe not nulling dev when failing and sysreset_walk() checking only if the device is not null and not the actual return of uclass_first_device() and uclass_next_device()...

Quoted 6 lines

OK thanks for the explanation. Yes this is a bug and there are no tests to catch it.

In this case uclass_first/next_device() should return dev = NULL.

I'll take a look and see if I can create a few patches.

Nope, I'm still confused.

sysreset_walk() should receive dev = NULL in this case and exit. I still don't understand how this exception happens.

You can see *devp being set to NULL in both uclass_first_device() and uclass_next_device().

Regards,
Simon

#51 lore raw

PATCH v3 3/15 sysreset: add syscon-reboot driver

In reply to Álvaro Fernández Rojas

Add a new sysreset driver based on linux/drivers/power/reset/syscon-reboot.c, which provides a generic driver for platforms that only require writing a mask to a regmap offset.

---
v3: Introduce changes suggested by Simon Glass:
- Add missing driver description.
- Alphabetically order includes.
- Add priv struct to store regmap during probe.
- Cosmetic fixes.
v2: No changes

 drivers/sysreset/Kconfig           |  8 ++++
 drivers/sysreset/Makefile          |  1 +
 drivers/sysreset/sysreset_syscon.c | 76 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 85 insertions(+)
 create mode 100644 drivers/sysreset/sysreset_syscon.c
drivers/sysreset/Kconfig +8 -0
index 05a37b9..ad3e71e 100644
@@ -13,4 +13,12 @@ config SYSRESET
 	  to effect a reset. The uclass will try all available drivers when
 	  reset_walk() is called.
 
+config SYSRESET_SYSCON
+	bool "Enable support for mfd syscon reboot driver"
+	depends on SYSRESET
+	select REGMAP
+	select SYSCON
+	help
+	  Reboot support for generic SYSCON mapped register reset.
+
 endmenu
drivers/sysreset/Makefile +1 -0
index 49b8bb6..1205f47 100644
@@ -18,3 +18,4 @@ obj-$(CONFIG_ARCH_SNAPDRAGON) += sysreset_snapdragon.o
 obj-$(CONFIG_ARCH_STI) += sysreset_sti.o
 obj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o
 obj-$(CONFIG_ARCH_ASPEED) += sysreset_ast.o
+obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o
drivers/sysreset/sysreset_syscon.c new file +76 -0

76 lines not on this page · raw message

Signature · 1 line
2.1.4
#52 lore raw

PATCH v3 3/15 sysreset: add syscon-reboot driver

Quoted 13 lines · Álvaro Fernández Rojas

Add a new sysreset driver based on linux/drivers/power/reset/syscon-reboot.c, which provides a generic driver for platforms that only require writing a mask to a regmap offset.

---
v3: Introduce changes suggested by Simon Glass:
- Add missing driver description.
- Alphabetically order includes.
- Add priv struct to store regmap during probe.
- Cosmetic fixes.
v2: No changes

Quoted 5 lines
 drivers/sysreset/Kconfig           |  8 ++++
 drivers/sysreset/Makefile          |  1 +
 drivers/sysreset/sysreset_syscon.c | 76 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 85 insertions(+)
 create mode 100644 drivers/sysreset/sysreset_syscon.c
#53 lore raw

PATCH v3 4/15 MIPS: allow using generic sysreset drivers

In reply to Álvaro Fernández Rojas

Avoid duplicating do_reset definition if SYSRESET is enabled for MIPS

---
v3: No changes.
v2: No changes.

 arch/mips/cpu/cpu.c | 2 ++
 1 file changed, 2 insertions(+)
arch/mips/cpu/cpu.c +2 -0
index 1b919ed..55e6498 100644
@@ -12,6 +12,7 @@
 #include <asm/mipsregs.h>
 #include <asm/reboot.h>
 
+#ifndef CONFIG_SYSRESET
 void __weak _machine_restart(void)
 {
 	fprintf(stderr, "*** reset failed ***\n");
@@ -26,6 +27,7 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
 	return 0;
 }
+#endif
 
 void write_one_tlb(int index, u32 pagemask, u32 hi, u32 low0, u32 low1)
 {
Signature · 1 line
2.1.4
#54 lore raw

PATCH v3 5/15 serial: add serial driver for BCM6345

In reply to Álvaro Fernández Rojas

It is based on linux/drivers/tty/serial/bcm63xx_uart.c

---
v3: Several improvements:
- Add missing register configurations based on CFE.
- Replace tabs with whitespaces.
- Cosmetic fixes.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Remove unneeded defines.
- Fix incorrect multi-line comment.

 drivers/serial/Kconfig          |  14 ++
 drivers/serial/Makefile         |   1 +
 drivers/serial/serial_bcm6345.c | 299 ++++++++++++++++++++++++++++++++++++++++
 3 files changed, 314 insertions(+)
 create mode 100644 drivers/serial/serial_bcm6345.c
drivers/serial/Kconfig +14 -0
index c0ec2ec..ca776d8 100644
@@ -134,6 +134,14 @@ config DEBUG_UART_ATMEL
 	  will need to provide parameters to make this work. The driver will
 	  be available until the real driver-model serial is running.
 
+config DEBUG_UART_BCM6345
+	bool "BCM6345 UART"
+	depends on BCM6345_SERIAL
+	help
+	  Select this to enable a debug UART on BCM6345 SoCs. You
+	  will need to provide parameters to make this work. The driver will
+	  be available until the real driver model serial is running.
+
 config DEBUG_UART_NS16550
 	bool "ns16550"
 	help
@@ -339,6 +347,12 @@ config ATMEL_USART
 	  configured in the device tree, and input clock frequency can
 	  be got from the clk node.
 
+config BCM6345_SERIAL
+	bool "Support for BCM6345 UART"
+	depends on DM_SERIAL
+	help
+	  Select this to enable UART on BCM6345 SoCs.
+
 config FSL_LPUART
 	bool "Freescale LPUART support"
 	help
drivers/serial/Makefile +1 -0
index 4382cf9..dca31b2 100644
@@ -20,6 +20,7 @@ obj-$(CONFIG_ALTERA_JTAG_UART) += altera_jtag_uart.o
 obj-$(CONFIG_AR933X_UART) += serial_ar933x.o
 obj-$(CONFIG_ARM_DCC) += arm_dcc.o
 obj-$(CONFIG_ATMEL_USART) += atmel_usart.o
+obj-$(CONFIG_BCM6345_SERIAL) += serial_bcm6345.o
 obj-$(CONFIG_EFI_APP) += serial_efi.o
 obj-$(CONFIG_LPC32XX_HSUART) += lpc32xx_hsuart.o
 obj-$(CONFIG_MCFUART) += mcfuart.o
drivers/serial/serial_bcm6345.c new file +299 -0

299 lines not on this page · raw message

Signature · 1 line
2.1.4
#55 lore raw

PATCH v3 6/15 cmd: cpu: ensure udevice is probed before calling cpu ops

In reply to Álvaro Fernández Rojas

This causes exceptions for drivers that aren't probed when cpu ops are requested.

---
v3: add new patch to ensure that device is probed.

 cmd/cpu.c | 4 ++++
 1 file changed, 4 insertions(+)
cmd/cpu.c +4 -0
index adfd54a..91f60c2 100644
@@ -9,6 +9,7 @@
 #include <command.h>
 #include <cpu.h>
 #include <dm.h>
+#include <dm/device-internal.h>
 #include <errno.h>
 
 static const char *cpu_feature_name[CPU_FEAT_COUNT] = {
@@ -36,6 +37,9 @@ static int print_cpu_list(bool detail)
 		bool first;
 		int i;
 
+		if (!device_active(dev) && device_probe(dev))
+			continue;
+
 		ret = cpu_get_desc(dev, buf, sizeof(buf));
 		printf("%3d: %-10s %s\n", dev->seq, dev->name,
 		       ret ? "<no description>" : buf);
Signature · 1 line
2.1.4
#56 lore raw

PATCH v3 6/15 cmd: cpu: ensure udevice is probed before calling cpu ops

Quoted 23 lines · Álvaro Fernández Rojas

This causes exceptions for drivers that aren't probed when cpu ops are requested.

---
v3: add new patch to ensure that device is probed.

 cmd/cpu.c | 4 ++++
 1 file changed, 4 insertions(+)
cmd/cpu.c +1 -0
index adfd54a..91f60c2 100644
@@ -9,6 +9,7 @@
 #include <command.h>
 #include <cpu.h>
 #include <dm.h>
+#include <dm/device-internal.h>
 #include <errno.h>
 
 static const char *cpu_feature_name[CPU_FEAT_COUNT] = {

cmd/cpu.c static int print_cpu_list(bool detail) · line 42

Quoted 6 lines
cmd/cpu.c +3 -0
@@ -36,6 +37,9 @@ static int print_cpu_list(bool detail)
                bool first;
                int i;
 
+               if (!device_active(dev) && device_probe(dev))
+                       continue;
+

In that case can you please restructure this to use uclass_first/next_device()?

Quoted 6 lines
cmd/cpu.c +0 -1
                ret = cpu_get_desc(dev, buf, sizeof(buf));
                printf("%3d: %-10s %s\n", dev->seq, dev->name,
                       ret ? "<no description>" : buf);
--

2.1.4

Regards,
Simon

#57 lore raw

PATCH v3 7/15 cpu: add CPU driver for Broadcom MIPS SoCs

In reply to Álvaro Fernández Rojas

---
v3: Several improvements:
- Probe driver correctly.
- Allocate size for priv struct.
- Cosmetic fixes.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Get register base from DT.

 drivers/cpu/Makefile    |   2 +
 drivers/cpu/bmips_cpu.c | 280 ++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 282 insertions(+)
 create mode 100644 drivers/cpu/bmips_cpu.c
drivers/cpu/Makefile +2 -0
index 8710160..db515f6 100644
@@ -5,3 +5,5 @@
 # SPDX-License-Identifier:      GPL-2.0+
 #
 obj-$(CONFIG_CPU) += cpu-uclass.o
+
+obj-$(CONFIG_ARCH_BMIPS) += bmips_cpu.o
drivers/cpu/bmips_cpu.c new file +280 -0

280 lines not on this page · raw message

Signature · 1 line
2.1.4
#58 lore raw

PATCH v3 7/15 cpu: add CPU driver for Broadcom MIPS SoCs

Quoted 10 lines · Álvaro Fernández Rojas

---
v3: Several improvements:
- Probe driver correctly.
- Allocate size for priv struct.
- Cosmetic fixes.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Get register base from DT.

Quoted 4 lines
 drivers/cpu/Makefile    |   2 +
 drivers/cpu/bmips_cpu.c | 280 ++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 282 insertions(+)
 create mode 100644 drivers/cpu/bmips_cpu.c
#59 lore raw

PATCH v3 8/15 ram: add RAM driver for Broadcom MIPS SoCs

In reply to Álvaro Fernández Rojas

---
v3: Rename of_match to ids.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.

 drivers/ram/Makefile    |   2 +
 drivers/ram/bmips_ram.c | 126 ++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 128 insertions(+)
 create mode 100644 drivers/ram/bmips_ram.c
drivers/ram/Makefile +2 -0
index 0e10249..818dd9f 100644
@@ -6,3 +6,5 @@
 #
 obj-$(CONFIG_RAM) += ram-uclass.o
 obj-$(CONFIG_SANDBOX) += sandbox_ram.o
+
+obj-$(CONFIG_ARCH_BMIPS) += bmips_ram.o
drivers/ram/bmips_ram.c new file +126 -0

126 lines not on this page · raw message

Signature · 1 line
2.1.4
#60 lore raw

PATCH v3 9/15 MIPS: add initial infrastructure for Broadcom MIPS SoCs

In reply to Álvaro Fernández Rojas

CFE checks CPU Thread in a different way (using register $22):
mfc0 t1, C0_BCM_CONFIG, 3 # $22
li t2, CP0_CMT_TPID # (1 << 31)
and t1, t2
bnez t1, 2f # if we are running on thread 1, skip init
nop

---
v3: Select CONFIG_REMAKE_ELF.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Replace initdram with dram_init.
- Merge with "fix first CPU check" patch.

 arch/mips/Kconfig              | 10 ++++++++++
 arch/mips/Makefile             |  1 +
 arch/mips/cpu/start.S          |  5 +++++
 arch/mips/mach-bmips/Kconfig   | 22 ++++++++++++++++++++++
 arch/mips/mach-bmips/Makefile  |  5 +++++
 arch/mips/mach-bmips/dram.c    | 37 +++++++++++++++++++++++++++++++++++++
 include/configs/bmips_common.h | 27 +++++++++++++++++++++++++++
 7 files changed, 107 insertions(+)
 create mode 100644 arch/mips/mach-bmips/Kconfig
 create mode 100644 arch/mips/mach-bmips/Makefile
 create mode 100644 arch/mips/mach-bmips/dram.c
 create mode 100644 include/configs/bmips_common.h
arch/mips/Kconfig +10 -0
index d97930e..c97ea41 100644
@@ -75,6 +75,15 @@ config ARCH_ATH79
 	select OF_CONTROL
 	select DM
 
+config ARCH_BMIPS
+	bool "Support BMIPS SoCs"
+	select OF_CONTROL
+	select DM
+	select CLK
+	select CPU
+	select RAM
+	select SYSRESET
+
 config MACH_PIC32
 	bool "Support Microchip PIC32"
 	select OF_CONTROL
@@ -123,6 +132,7 @@ source "board/micronas/vct/Kconfig"
 source "board/pb1x00/Kconfig"
 source "board/qemu-mips/Kconfig"
 source "arch/mips/mach-ath79/Kconfig"
+source "arch/mips/mach-bmips/Kconfig"
 source "arch/mips/mach-pic32/Kconfig"
 
 if MIPS
arch/mips/Makefile +1 -0
index efe7e44..c30d4ef 100644
@@ -15,6 +15,7 @@ libs-y += arch/mips/lib/
 
 machine-$(CONFIG_SOC_AU1X00) += au1x00
 machine-$(CONFIG_ARCH_ATH79) += ath79
+machine-$(CONFIG_ARCH_BMIPS) += bmips
 machine-$(CONFIG_MACH_PIC32) += pic32
 
 machdirs := $(patsubst %,arch/mips/mach-%/,$(machine-y))
arch/mips/cpu/start.S +5 -0
index f7dee81..5c1ad00 100644
@@ -151,8 +151,13 @@ reset:
 	 mfc0	t0, CP0_GLOBALNUMBER
 #endif
 
+#ifdef CONFIG_ARCH_BMIPS
+1:	mfc0	t0, CP0_DIAGNOSTIC, 3
+	and	t0, t0, (1 << 31)
+#else
 1:	mfc0	t0, CP0_EBASE
 	and	t0, t0, EBASE_CPUNUM
+#endif
 
 	/* Hang if this isn't the first CPU in the system */
 2:	beqz	t0, 4f
arch/mips/mach-bmips/Kconfig new file +22 -0
new file mode 100644
index 0000000..42a7e41
@@ -0,0 +1,22 @@
+menu "Broadcom MIPS platforms"
+	depends on ARCH_BMIPS
+
+config SYS_SOC
+	default "none"
+
+choice
+	prompt "Boot mode"
+
+config BMIPS_BOOT_RAM
+	bool "RAM boot"
+	depends on BMIPS_SUPPORTS_BOOT_RAM
+	help
+	  This builds an image that is linked to a RAM address. Caches are
+	  disabled and environment is built in.
+
+endchoice
+
+config BMIPS_SUPPORTS_BOOT_RAM
+	bool
+
+endmenu
arch/mips/mach-bmips/Makefile new file +5 -0
new file mode 100644
index 0000000..f432acc
@@ -0,0 +1,5 @@
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y += dram.o
arch/mips/mach-bmips/dram.c new file +37 -0
new file mode 100644
index 0000000..b19b28a
@@ -0,0 +1,37 @@
+/*
+ * Copyright (C) 2016 Daniel Schwierzeck <[email protected]>
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <ram.h>
+#include <dm.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int dram_init(void)
+{
+	struct ram_info ram;
+	struct udevice *dev;
+	int err;
+
+	err = uclass_get_device(UCLASS_RAM, 0, &dev);
+	if (err) {
+		debug("DRAM init failed: %d\n", err);
+		return 0;
+	}
+
+	err = ram_get_info(dev, &ram);
+	if (err) {
+		debug("Cannot get DRAM size: %d\n", err);
+		return 0;
+	}
+
+	debug("SDRAM base=%zx, size=%x\n", ram.base, ram.size);
+
+	gd->ram_size = ram.size;
+
+	return 0;
+}
include/configs/bmips_common.h new file +27 -0
new file mode 100644
index 0000000..3d67729
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_BMIPS_COMMON_H
+#define __CONFIG_BMIPS_COMMON_H
+
+/* RAM */
+#define CONFIG_SYS_MEMTEST_START	0xa0000000
+#define CONFIG_SYS_MEMTEST_END		0xa2000000
+
+/* Serial */
+#define CONFIG_BAUDRATE			115200
+
+/* Memory usage */
+#define CONFIG_SYS_MAXARGS		24
+#define CONFIG_SYS_MALLOC_LEN		(1024 * 1024)
+#define CONFIG_SYS_BOOTPARAMS_LEN	(128 * 1024)
+#define CONFIG_SYS_CBSIZE		512
+
+/* U-Boot */
+#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE
+#define CONFIG_REMAKE_ELF
+
+#endif /* __CONFIG_BMIPS_COMMON_H */
Signature · 1 line
2.1.4
#61 lore raw

PATCH v3 10/15 MIPS: add support for Broadcom MIPS BCM6358 SoC family

In reply to Álvaro Fernández Rojas

---
v3: Add cfi-flash defines.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Add PERF_BASE to cpus.
- Merge with "fix ioremap for BCM6358" patch.
- Add a custom ioremap.h instead of modifying the generic one.

 arch/mips/dts/brcm,bcm6358.dtsi        | 98 ++++++++++++++++++++++++++++++++++
 arch/mips/mach-bmips/Kconfig           | 18 ++++++-
 arch/mips/mach-bmips/include/ioremap.h | 45 ++++++++++++++++
 include/configs/bmips_bcm6358.h        | 30 +++++++++++
 4 files changed, 190 insertions(+), 1 deletion(-)
 create mode 100644 arch/mips/dts/brcm,bcm6358.dtsi
 create mode 100644 arch/mips/mach-bmips/include/ioremap.h
 create mode 100644 include/configs/bmips_bcm6358.h
arch/mips/dts/brcm,bcm6358.dtsi new file +98 -0
new file mode 100644
index 0000000..c7ba7e0
@@ -0,0 +1,98 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include "skeleton.dtsi"
+
+/ {
+	compatible = "brcm,bcm6358";
+
+	cpus {
+		reg = <0xfffe0000 0x4>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		u-boot,dm-pre-reloc;
+
+		cpu at 0 {
+			compatible = "brcm,bcm6358-cpu", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <0>;
+			u-boot,dm-pre-reloc;
+		};
+
+		cpu at 1 {
+			compatible = "brcm,bcm6358-cpu", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <1>;
+			u-boot,dm-pre-reloc;
+		};
+	};
+
+	clocks {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		u-boot,dm-pre-reloc;
+
+		periph_osc: periph-osc {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <50000000>;
+			u-boot,dm-pre-reloc;
+		};
+	};
+
+	pflash: nor at 1e000000 {
+		compatible = "cfi-flash";
+		reg = <0x1e000000 0x2000000>;
+		bank-width = <2>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		status = "disabled";
+	};
+
+	ubus {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		u-boot,dm-pre-reloc;
+
+		periph_cntl: syscon at fffe0000 {
+			compatible = "syscon";
+			reg = <0xfffe0000 0xc>;
+		};
+
+		reboot: syscon-reboot {
+			compatible = "syscon-reboot";
+			regmap = <&periph_cntl>;
+			offset = <0x8>;
+			mask = <0x1>;
+		};
+
+		uart0: serial at fffe0100 {
+			compatible = "brcm,bcm6345-uart";
+			reg = <0xfffe0100 0x18>;
+			clocks = <&periph_osc>;
+
+			status = "disabled";
+		};
+
+		uart1: serial at fffe0120 {
+			compatible = "brcm,bcm6345-uart";
+			reg = <0xfffe0120 0x18>;
+			clocks = <&periph_osc>;
+
+			status = "disabled";
+		};
+
+		memory-controller at fffe1200 {
+			compatible = "brcm,bcm6358-mc";
+			reg = <0xfffe1200 0x1000>;
+			u-boot,dm-pre-reloc;
+		};
+	};
+};
arch/mips/mach-bmips/Kconfig +17 -1
index 42a7e41..efdb827 100644
@@ -2,7 +2,23 @@ menu "Broadcom MIPS platforms"
 	depends on ARCH_BMIPS
 
 config SYS_SOC
-	default "none"
+	default "bcm6358" if SOC_BMIPS_BCM6358
+
+choice
+	prompt "Broadcom MIPS SoC select"
+
+config SOC_BMIPS_BCM6358
+	bool "BMIPS BCM6358 family"
+	select SUPPORTS_BIG_ENDIAN
+	select SUPPORTS_CPU_MIPS32_R1
+	select MIPS_TUNE_4KC
+	select MIPS_L1_CACHE_SHIFT_4
+	select SWAP_IO_SPACE
+	select SYSRESET_SYSCON
+	help
+	  This supports BMIPS BCM6358 family including BCM6358 and BCM6359.
+
+endchoice
 
 choice
 	prompt "Boot mode"
arch/mips/mach-bmips/include/ioremap.h new file +45 -0

45 lines not on this page · raw message

include/configs/bmips_bcm6358.h new file +30 -0
new file mode 100644
index 0000000..a7af1ca
@@ -0,0 +1,30 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_BMIPS_BCM6358_H
+#define __CONFIG_BMIPS_BCM6358_H
+
+/* CPU */
+#define CONFIG_SYS_MIPS_TIMER_FREQ	150000000
+
+/* RAM */
+#define CONFIG_NR_DRAM_BANKS		1
+#define CONFIG_SYS_SDRAM_BASE		0x80000000
+
+/* U-Boot */
+#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + 0x100000
+
+#if defined(CONFIG_BMIPS_BOOT_RAM)
+#define CONFIG_SYS_INIT_SP_OFFSET	0x2000
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#endif
+
+#define CONFIG_SYS_FLASH_BASE			0xbe000000
+#define CONFIG_SYS_FLASH_EMPTY_INFO
+#define CONFIG_SYS_FLASH_PROTECTION
+#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT	1
+
+#endif /* __CONFIG_BMIPS_BCM6358_H */
Signature · 1 line
2.1.4
#62 lore raw

PATCH v3 11/15 MIPS: add BMIPS Huawei HG556a board

In reply to Álvaro Fernández Rojas

---
v3: Add cfi-flash support.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Remove DEBUG_UART from defconfig.

 arch/mips/dts/Makefile              |  1 +
 arch/mips/dts/huawei,hg556a.dts     | 31 +++++++++++++++++++++++++
 arch/mips/mach-bmips/Kconfig        | 12 ++++++++++
 board/huawei/hg556a/Kconfig         | 12 ++++++++++
 board/huawei/hg556a/MAINTAINERS     |  6 +++++
 board/huawei/hg556a/Makefile        |  5 +++++
 board/huawei/hg556a/hg556a.c        |  7 ++++++
 configs/huawei_hg556a_ram_defconfig | 45 +++++++++++++++++++++++++++++++++++++
 include/configs/huawei_hg556a.h     | 18 +++++++++++++++
 9 files changed, 137 insertions(+)
 create mode 100644 arch/mips/dts/huawei,hg556a.dts
 create mode 100644 board/huawei/hg556a/Kconfig
 create mode 100644 board/huawei/hg556a/MAINTAINERS
 create mode 100644 board/huawei/hg556a/Makefile
 create mode 100644 board/huawei/hg556a/hg556a.c
 create mode 100644 configs/huawei_hg556a_ram_defconfig
 create mode 100644 include/configs/huawei_hg556a.h
arch/mips/dts/Makefile +1 -0
index 30fcc2b..1843b77 100644
@@ -8,6 +8,7 @@ dtb-$(CONFIG_TARGET_BOSTON) += img,boston.dtb
 dtb-$(CONFIG_TARGET_MALTA) += mti,malta.dtb
 dtb-$(CONFIG_TARGET_PIC32MZDASK) += pic32mzda_sk.dtb
 dtb-$(CONFIG_TARGET_XILFPGA) += nexys4ddr.dtb
+dtb-$(CONFIG_BOARD_HUAWEI_HG556A) += huawei,hg556a.dtb
 dtb-$(CONFIG_BOARD_TPLINK_WDR4300) += tplink_wdr4300.dtb
 
 targets += $(dtb-y)
arch/mips/dts/huawei,hg556a.dts new file +31 -0
new file mode 100644
index 0000000..08ef2c1
@@ -0,0 +1,31 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "brcm,bcm6358.dtsi"
+
+/ {
+	model = "Huawei HG556a Board";
+	compatible = "huawei,hg556a", "brcm,bcm6358";
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+};
+
+&pflash {
+	status = "okay";
+};
+
+&uart0 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
arch/mips/mach-bmips/Kconfig +12 -0
index efdb827..2867ad8 100644
@@ -21,6 +21,16 @@ config SOC_BMIPS_BCM6358
 endchoice
 
 choice
+	prompt "Board select"
+
+config BOARD_HUAWEI_HG556A
+	bool "Huawei HG556a board"
+	depends on SOC_BMIPS_BCM6358
+	select BMIPS_SUPPORTS_BOOT_RAM
+
+endchoice
+
+choice
 	prompt "Boot mode"
 
 config BMIPS_BOOT_RAM
@@ -35,4 +45,6 @@ endchoice
 config BMIPS_SUPPORTS_BOOT_RAM
 	bool
 
+source "board/huawei/hg556a/Kconfig"
+
 endmenu
board/huawei/hg556a/Kconfig new file +12 -0
new file mode 100644
index 0000000..88622d0
@@ -0,0 +1,12 @@
+if BOARD_HUAWEI_HG556A
+
+config SYS_BOARD
+	default "hg556a"
+
+config SYS_VENDOR
+	default "huawei"
+
+config SYS_CONFIG_NAME
+	default "huawei_hg556a"
+
+endif
board/huawei/hg556a/MAINTAINERS new file +6 -0
new file mode 100644
index 0000000..3ead7e4
@@ -0,0 +1,6 @@
+HUAWEI HG556A BOARD
+M:	Álvaro Fernández Rojas <[email protected]>
+S:	Maintained
+F:	board/huawei/hg556a/
+F:	include/configs/huawei_hg556a.h
+F:	configs/huawei_hg556a_ram_defconfig
board/huawei/hg556a/Makefile new file +5 -0
new file mode 100644
index 0000000..ace0ed3
@@ -0,0 +1,5 @@
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y += hg556a.o
board/huawei/hg556a/hg556a.c new file +7 -0
new file mode 100644
index 0000000..d181ca6
@@ -0,0 +1,7 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
configs/huawei_hg556a_ram_defconfig new file +45 -0

45 lines not on this page · raw message

include/configs/huawei_hg556a.h new file +18 -0
new file mode 100644
index 0000000..6d5300e
@@ -0,0 +1,18 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <configs/bmips_common.h>
+#include <configs/bmips_bcm6358.h>
+
+#define CONFIG_ENV_IS_NOWHERE
+#define CONFIG_ENV_SIZE			(8 * 1024)
+
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_CMDLINE_EDITING
+
+#define CONFIG_SYS_FLASH_CFI		1
+#define CONFIG_FLASH_CFI_DRIVER		1
Signature · 1 line
2.1.4
#63 lore raw

PATCH v3 12/15 MIPS: add support for Broadcom MIPS BCM6328 SoC family

In reply to Álvaro Fernández Rojas

---
v3: no changes
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Add PERF_BASE to cpus.

 arch/mips/dts/brcm,bcm6328.dtsi | 88 +++++++++++++++++++++++++++++++++++++++++
 arch/mips/mach-bmips/Kconfig    | 12 ++++++
 include/configs/bmips_bcm6328.h | 25 ++++++++++++
 3 files changed, 125 insertions(+)
 create mode 100644 arch/mips/dts/brcm,bcm6328.dtsi
 create mode 100644 include/configs/bmips_bcm6328.h
arch/mips/dts/brcm,bcm6328.dtsi new file +88 -0
new file mode 100644
index 0000000..707e755
@@ -0,0 +1,88 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include "skeleton.dtsi"
+
+/ {
+	compatible = "brcm,bcm6328";
+
+	cpus {
+		reg = <0x10000000 0x4>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		u-boot,dm-pre-reloc;
+
+		cpu at 0 {
+			compatible = "brcm,bcm6328-cpu", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <0>;
+			u-boot,dm-pre-reloc;
+		};
+
+		cpu at 1 {
+			compatible = "brcm,bcm6328-cpu", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <1>;
+			u-boot,dm-pre-reloc;
+		};
+	};
+
+	clocks {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		u-boot,dm-pre-reloc;
+
+		periph_osc: periph-osc {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <50000000>;
+			u-boot,dm-pre-reloc;
+		};
+	};
+
+	ubus {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		u-boot,dm-pre-reloc;
+
+		reset_cntl: syscon at 10000068 {
+			compatible = "syscon";
+			reg = <0x10000068 0x4>;
+		};
+
+		reboot: syscon-reboot {
+			compatible = "syscon-reboot";
+			regmap = <&reset_cntl>;
+			offset = <0>;
+			mask = <0x1>;
+		};
+
+		uart0: serial at 10000100 {
+			compatible = "brcm,bcm6345-uart";
+			reg = <0x10000100 0x18>;
+			clocks = <&periph_osc>;
+
+			status = "disabled";
+		};
+
+		uart1: serial at 10000120 {
+			compatible = "brcm,bcm6345-uart";
+			reg = <0x10000120 0x18>;
+			clocks = <&periph_osc>;
+
+			status = "disabled";
+		};
+
+		memory-controller at 10003000 {
+			compatible = "brcm,bcm6328-mc";
+			reg = <0x10003000 0x1000>;
+			u-boot,dm-pre-reloc;
+		};
+	};
+};
arch/mips/mach-bmips/Kconfig +12 -0
index 2867ad8..4c74cee 100644
@@ -2,11 +2,23 @@ menu "Broadcom MIPS platforms"
 	depends on ARCH_BMIPS
 
 config SYS_SOC
+	default "bcm6328" if SOC_BMIPS_BCM6328
 	default "bcm6358" if SOC_BMIPS_BCM6358
 
 choice
 	prompt "Broadcom MIPS SoC select"
 
+config SOC_BMIPS_BCM6328
+	bool "BMIPS BCM6328 family"
+	select SUPPORTS_BIG_ENDIAN
+	select SUPPORTS_CPU_MIPS32_R1
+	select MIPS_TUNE_4KC
+	select MIPS_L1_CACHE_SHIFT_4
+	select SWAP_IO_SPACE
+	select SYSRESET_SYSCON
+	help
+	  This supports BMIPS BCM6328 family including BCM63281 and BCM63283.
+
 config SOC_BMIPS_BCM6358
 	bool "BMIPS BCM6358 family"
 	select SUPPORTS_BIG_ENDIAN
include/configs/bmips_bcm6328.h new file +25 -0
new file mode 100644
index 0000000..a5c9a2e
@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_BMIPS_BCM6328_H
+#define __CONFIG_BMIPS_BCM6328_H
+
+/* CPU */
+#define CONFIG_SYS_MIPS_TIMER_FREQ	160000000
+
+/* RAM */
+#define CONFIG_NR_DRAM_BANKS		1
+#define CONFIG_SYS_SDRAM_BASE		0x80000000
+
+/* U-Boot */
+#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + 0x100000
+
+#if defined(CONFIG_BMIPS_BOOT_RAM)
+#define CONFIG_SYS_INIT_SP_OFFSET	0x2000
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#endif
+
+#endif /* __CONFIG_BMIPS_BCM6328_H */
Signature · 1 line
2.1.4
#64 lore raw

PATCH v3 13/15 MIPS: add BMIPS Comtrend AR-5387un board

In reply to Álvaro Fernández Rojas

---
v3: No changes.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Remove DEBUG_UART from defconfig.

 arch/mips/dts/Makefile                  |  1 +
 arch/mips/dts/comtrend,ar-5387un.dts    | 27 +++++++++++++++++++++
 arch/mips/mach-bmips/Kconfig            |  6 +++++
 board/comtrend/ar5387un/Kconfig         | 12 ++++++++++
 board/comtrend/ar5387un/MAINTAINERS     |  6 +++++
 board/comtrend/ar5387un/Makefile        |  5 ++++
 board/comtrend/ar5387un/ar-5387un.c     |  7 ++++++
 configs/comtrend_ar5387un_ram_defconfig | 42 +++++++++++++++++++++++++++++++++
 include/configs/comtrend_ar5387un.h     | 15 ++++++++++++
 9 files changed, 121 insertions(+)
 create mode 100644 arch/mips/dts/comtrend,ar-5387un.dts
 create mode 100644 board/comtrend/ar5387un/Kconfig
 create mode 100644 board/comtrend/ar5387un/MAINTAINERS
 create mode 100644 board/comtrend/ar5387un/Makefile
 create mode 100644 board/comtrend/ar5387un/ar-5387un.c
 create mode 100644 configs/comtrend_ar5387un_ram_defconfig
 create mode 100644 include/configs/comtrend_ar5387un.h
arch/mips/dts/Makefile +1 -0
index 1843b77..0805819 100644
@@ -8,6 +8,7 @@ dtb-$(CONFIG_TARGET_BOSTON) += img,boston.dtb
 dtb-$(CONFIG_TARGET_MALTA) += mti,malta.dtb
 dtb-$(CONFIG_TARGET_PIC32MZDASK) += pic32mzda_sk.dtb
 dtb-$(CONFIG_TARGET_XILFPGA) += nexys4ddr.dtb
+dtb-$(CONFIG_BOARD_COMTREND_AR5387UN) += comtrend,ar-5387un.dtb
 dtb-$(CONFIG_BOARD_HUAWEI_HG556A) += huawei,hg556a.dtb
 dtb-$(CONFIG_BOARD_TPLINK_WDR4300) += tplink_wdr4300.dtb
 
arch/mips/dts/comtrend,ar-5387un.dts new file +27 -0
new file mode 100644
index 0000000..f9c4a1c
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "brcm,bcm6328.dtsi"
+
+/ {
+	model = "Comtrend AR-5387un Board";
+	compatible = "comtrend,ar5387-un", "brcm,bcm6328";
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+};
+
+&uart0 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
arch/mips/mach-bmips/Kconfig +6 -0
index 4c74cee..ffb6ddd 100644
@@ -35,6 +35,11 @@ endchoice
 choice
 	prompt "Board select"
 
+config BOARD_COMTREND_AR5387UN
+	bool "Comtrend AR-5387un board"
+	depends on SOC_BMIPS_BCM6328
+	select BMIPS_SUPPORTS_BOOT_RAM
+
 config BOARD_HUAWEI_HG556A
 	bool "Huawei HG556a board"
 	depends on SOC_BMIPS_BCM6358
@@ -57,6 +62,7 @@ endchoice
 config BMIPS_SUPPORTS_BOOT_RAM
 	bool
 
+source "board/comtrend/ar5387un/Kconfig"
 source "board/huawei/hg556a/Kconfig"
 
 endmenu
board/comtrend/ar5387un/Kconfig new file +12 -0
new file mode 100644
index 0000000..45ab7e2
@@ -0,0 +1,12 @@
+if BOARD_COMTREND_AR5387UN
+
+config SYS_BOARD
+	default "ar5387un"
+
+config SYS_VENDOR
+	default "comtrend"
+
+config SYS_CONFIG_NAME
+	default "comtrend_ar5387un"
+
+endif
board/comtrend/ar5387un/MAINTAINERS new file +6 -0
new file mode 100644
index 0000000..bcaac64
@@ -0,0 +1,6 @@
+COMTREND AR-5387UN BOARD
+M:	Álvaro Fernández Rojas <[email protected]>
+S:	Maintained
+F:	board/comtrend/ar-5387un/
+F:	include/configs/comtrend_ar5387un.h
+F:	configs/comtrend_ar5387un_ram_defconfig
board/comtrend/ar5387un/Makefile new file +5 -0
new file mode 100644
index 0000000..9de1cd2
@@ -0,0 +1,5 @@
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y += ar-5387un.o
board/comtrend/ar5387un/ar-5387un.c new file +7 -0
new file mode 100644
index 0000000..d181ca6
@@ -0,0 +1,7 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
configs/comtrend_ar5387un_ram_defconfig new file +42 -0

42 lines not on this page · raw message

include/configs/comtrend_ar5387un.h new file +15 -0
new file mode 100644
index 0000000..8803506
@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <configs/bmips_common.h>
+#include <configs/bmips_bcm6328.h>
+
+#define CONFIG_ENV_IS_NOWHERE
+#define CONFIG_ENV_SIZE			(8 * 1024)
+
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_CMDLINE_EDITING
Signature · 1 line
2.1.4
#65 lore raw

PATCH v3 14/15 MIPS: add support for Broadcom MIPS BCM63268 SoC family

In reply to Álvaro Fernández Rojas

---
v3: No changes.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Add PERF_BASE to cpus.

 arch/mips/dts/brcm,bcm63268.dtsi | 88 ++++++++++++++++++++++++++++++++++++++++
 arch/mips/mach-bmips/Kconfig     | 12 ++++++
 include/configs/bmips_bcm63268.h | 25 ++++++++++++
 3 files changed, 125 insertions(+)
 create mode 100644 arch/mips/dts/brcm,bcm63268.dtsi
 create mode 100644 include/configs/bmips_bcm63268.h
arch/mips/dts/brcm,bcm63268.dtsi new file +88 -0
new file mode 100644
index 0000000..44ff888
@@ -0,0 +1,88 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include "skeleton.dtsi"
+
+/ {
+	compatible = "brcm,bcm63268";
+
+	cpus {
+		reg = <0x10000000 0x4>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		u-boot,dm-pre-reloc;
+
+		cpu at 0 {
+			compatible = "brcm,bcm63268-cpu", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <0>;
+			u-boot,dm-pre-reloc;
+		};
+
+		cpu at 1 {
+			compatible = "brcm,bcm63268-cpu", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <1>;
+			u-boot,dm-pre-reloc;
+		};
+	};
+
+	clocks {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		u-boot,dm-pre-reloc;
+
+		periph_osc: periph-osc {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <50000000>;
+			u-boot,dm-pre-reloc;
+		};
+	};
+
+	ubus {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		u-boot,dm-pre-reloc;
+
+		periph_cntl: syscon at 10000000 {
+			compatible = "syscon";
+			reg = <0x10000000 0x14>;
+		};
+
+		reboot: syscon-reboot {
+			compatible = "syscon-reboot";
+			regmap = <&periph_cntl>;
+			offset = <0x8>;
+			mask = <0x1>;
+		};
+
+		uart0: serial at 10000180 {
+			compatible = "brcm,bcm6345-uart";
+			reg = <0x10000180 0x18>;
+			clocks = <&periph_osc>;
+
+			status = "disabled";
+		};
+
+		uart1: serial at 100001a0 {
+			compatible = "brcm,bcm6345-uart";
+			reg = <0x100001a0 0x18>;
+			clocks = <&periph_osc>;
+
+			status = "disabled";
+		};
+
+		memory-controller at 10003000 {
+			compatible = "brcm,bcm6328-mc";
+			reg = <0x10003000 0x1000>;
+			u-boot,dm-pre-reloc;
+		};
+	};
+};
arch/mips/mach-bmips/Kconfig +12 -0
index ffb6ddd..6acad23 100644
@@ -4,6 +4,7 @@ menu "Broadcom MIPS platforms"
 config SYS_SOC
 	default "bcm6328" if SOC_BMIPS_BCM6328
 	default "bcm6358" if SOC_BMIPS_BCM6358
+	default "bcm63268" if SOC_BMIPS_BCM63268
 
 choice
 	prompt "Broadcom MIPS SoC select"
@@ -30,6 +31,17 @@ config SOC_BMIPS_BCM6358
 	help
 	  This supports BMIPS BCM6358 family including BCM6358 and BCM6359.
 
+config SOC_BMIPS_BCM63268
+	bool "BMIPS BCM63268 family"
+	select SUPPORTS_BIG_ENDIAN
+	select SUPPORTS_CPU_MIPS32_R1
+	select MIPS_TUNE_4KC
+	select MIPS_L1_CACHE_SHIFT_4
+	select SWAP_IO_SPACE
+	select SYSRESET_SYSCON
+	help
+	  This supports BMIPS BCM63268 family including BCM63168, BCM63169, BCM63268 and BCM63269.
+
 endchoice
 
 choice
include/configs/bmips_bcm63268.h new file +25 -0
new file mode 100644
index 0000000..91f42e9
@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_BMIPS_BCM63268_H
+#define __CONFIG_BMIPS_BCM63268_H
+
+/* CPU */
+#define CONFIG_SYS_MIPS_TIMER_FREQ	200000000
+
+/* RAM */
+#define CONFIG_NR_DRAM_BANKS		1
+#define CONFIG_SYS_SDRAM_BASE		0x80000000
+
+/* U-Boot */
+#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + 0x100000
+
+#if defined(CONFIG_BMIPS_BOOT_RAM)
+#define CONFIG_SYS_INIT_SP_OFFSET	0x2000
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#endif
+
+#endif /* __CONFIG_BMIPS_BCM63268_H */
Signature · 1 line
2.1.4
#66 lore raw

PATCH v3 15/15 MIPS: add BMIPS Comtrend VR-3032u board

In reply to Álvaro Fernández Rojas

---
v3: No changes.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Remove DEBUG_UART from defconfig.

 arch/mips/dts/Makefile                 |  1 +
 arch/mips/dts/comtrend,vr-3032u.dts    | 27 ++++++++++++++++++++++
 arch/mips/mach-bmips/Kconfig           |  6 +++++
 board/comtrend/vr3032u/Kconfig         | 12 ++++++++++
 board/comtrend/vr3032u/MAINTAINERS     |  6 +++++
 board/comtrend/vr3032u/Makefile        |  5 ++++
 board/comtrend/vr3032u/vr-3032u.c      |  7 ++++++
 configs/comtrend_vr3032u_ram_defconfig | 42 ++++++++++++++++++++++++++++++++++
 include/configs/comtrend_vr3032u.h     | 15 ++++++++++++
 9 files changed, 121 insertions(+)
 create mode 100644 arch/mips/dts/comtrend,vr-3032u.dts
 create mode 100644 board/comtrend/vr3032u/Kconfig
 create mode 100644 board/comtrend/vr3032u/MAINTAINERS
 create mode 100644 board/comtrend/vr3032u/Makefile
 create mode 100644 board/comtrend/vr3032u/vr-3032u.c
 create mode 100644 configs/comtrend_vr3032u_ram_defconfig
 create mode 100644 include/configs/comtrend_vr3032u.h
arch/mips/dts/Makefile +1 -0
index 0805819..4c02c48 100644
@@ -9,6 +9,7 @@ dtb-$(CONFIG_TARGET_MALTA) += mti,malta.dtb
 dtb-$(CONFIG_TARGET_PIC32MZDASK) += pic32mzda_sk.dtb
 dtb-$(CONFIG_TARGET_XILFPGA) += nexys4ddr.dtb
 dtb-$(CONFIG_BOARD_COMTREND_AR5387UN) += comtrend,ar-5387un.dtb
+dtb-$(CONFIG_BOARD_COMTREND_VR3032U) += comtrend,vr-3032u.dtb
 dtb-$(CONFIG_BOARD_HUAWEI_HG556A) += huawei,hg556a.dtb
 dtb-$(CONFIG_BOARD_TPLINK_WDR4300) += tplink_wdr4300.dtb
 
arch/mips/dts/comtrend,vr-3032u.dts new file +27 -0
new file mode 100644
index 0000000..c0fdb28
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "brcm,bcm63268.dtsi"
+
+/ {
+	model = "Comtrend VR-3032u Board";
+	compatible = "comtrend,vr-3032u", "brcm,bcm63268";
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+};
+
+&uart0 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
arch/mips/mach-bmips/Kconfig +6 -0
index 6acad23..5b30f3b 100644
@@ -57,6 +57,11 @@ config BOARD_HUAWEI_HG556A
 	depends on SOC_BMIPS_BCM6358
 	select BMIPS_SUPPORTS_BOOT_RAM
 
+config BOARD_COMTREND_VR3032U
+	bool "Comtrend VR-3032u board"
+	depends on SOC_BMIPS_BCM63268
+	select BMIPS_SUPPORTS_BOOT_RAM
+
 endchoice
 
 choice
@@ -75,6 +80,7 @@ config BMIPS_SUPPORTS_BOOT_RAM
 	bool
 
 source "board/comtrend/ar5387un/Kconfig"
+source "board/comtrend/vr3032u/Kconfig"
 source "board/huawei/hg556a/Kconfig"
 
 endmenu
board/comtrend/vr3032u/Kconfig new file +12 -0
new file mode 100644
index 0000000..6f552cf
@@ -0,0 +1,12 @@
+if BOARD_COMTREND_VR3032U
+
+config SYS_BOARD
+	default "vr3032u"
+
+config SYS_VENDOR
+	default "comtrend"
+
+config SYS_CONFIG_NAME
+	default "comtrend_vr3032u"
+
+endif
board/comtrend/vr3032u/MAINTAINERS new file +6 -0
new file mode 100644
index 0000000..833d7da
@@ -0,0 +1,6 @@
+COMTREND VR-3032U BOARD
+M:	Álvaro Fernández Rojas <[email protected]>
+S:	Maintained
+F:	board/comtrend/vr-3032u/
+F:	include/configs/comtrend_vr-3032u.h
+F:	configs/comtrend_vr3032u_ram_defconfig
board/comtrend/vr3032u/Makefile new file +5 -0
new file mode 100644
index 0000000..9e62031
@@ -0,0 +1,5 @@
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y += vr-3032u.o
board/comtrend/vr3032u/vr-3032u.c new file +7 -0
new file mode 100644
index 0000000..d181ca6
@@ -0,0 +1,7 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
configs/comtrend_vr3032u_ram_defconfig new file +42 -0

42 lines not on this page · raw message

include/configs/comtrend_vr3032u.h new file +15 -0
new file mode 100644
index 0000000..066b4c7
@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <configs/bmips_common.h>
+#include <configs/bmips_bcm63268.h>
+
+#define CONFIG_ENV_IS_NOWHERE
+#define CONFIG_ENV_SIZE			(8 * 1024)
+
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_CMDLINE_EDITING
Signature · 1 line
2.1.4
#67 lore raw

v6 cover Add support for Broadcom MIPS SoCs

In reply to Álvaro Fernández Rojas

This adds support for some of the xDSL Broadcom MIPS SoCs:
- BCM6358
- BCM6328
- BCM63268
However, support for other SoCs could be added in the future:
- Other BCM63xx
- BCM33xx
- BCM71xx

v6: Introduce changes suggested by D. Schwierzeck & S. Glass.
v5: Improve BMIPS CPU driver
v4: Introduce changes suggested by Simon Glass:
- Refactor cmd/cpu.
- Remove device_probe patch for sysreset.
v3: Introduce changes suggested by Simon Glass.
v2: Introduce changes suggested by Daniel Schwierzeck.

Álvaro Fernández Rojas (14):
cmd: cpu: fix NULL cpu feature prints
sysreset: add syscon-reboot driver
MIPS: allow using generic sysreset drivers
serial: add serial driver for BCM6345
cmd: cpu: refactor to ensure devices are probed and improve code style
cpu: add CPU driver for Broadcom MIPS SoCs
ram: add RAM driver for Broadcom MIPS SoCs
MIPS: add initial infrastructure for Broadcom MIPS SoCs
MIPS: add support for Broadcom MIPS BCM6358 SoC family
MIPS: add BMIPS Huawei HG556a board
MIPS: add support for Broadcom MIPS BCM6328 SoC family
MIPS: add BMIPS Comtrend AR-5387un board
MIPS: add support for Broadcom MIPS BCM63268 SoC family
MIPS: add BMIPS Comtrend VR-3032u board

 arch/mips/Kconfig                       |  10 ++
 arch/mips/Makefile                      |   1 +
 arch/mips/cpu/cpu.c                     |   2 +
 arch/mips/cpu/start.S                   |   5 +
 arch/mips/dts/Makefile                  |   3 +
 arch/mips/dts/brcm,bcm63268.dtsi        |  88 +++++++++
 arch/mips/dts/brcm,bcm6328.dtsi         |  88 +++++++++
 arch/mips/dts/brcm,bcm6358.dtsi         |  98 ++++++++++
 arch/mips/dts/comtrend,ar-5387un.dts    |  27 +++
 arch/mips/dts/comtrend,vr-3032u.dts     |  27 +++
 arch/mips/dts/huawei,hg556a.dts         |  31 ++++
 arch/mips/mach-bmips/Kconfig            |  88 +++++++++
 arch/mips/mach-bmips/Makefile           |   5 +
 arch/mips/mach-bmips/dram.c             |  37 ++++
 arch/mips/mach-bmips/include/ioremap.h  |  45 +++++
 board/comtrend/ar5387un/Kconfig         |  12 ++
 board/comtrend/ar5387un/MAINTAINERS     |   6 +
 board/comtrend/ar5387un/Makefile        |   5 +
 board/comtrend/ar5387un/ar-5387un.c     |   7 +
 board/comtrend/vr3032u/Kconfig          |  12 ++
 board/comtrend/vr3032u/MAINTAINERS      |   6 +
 board/comtrend/vr3032u/Makefile         |   5 +
 board/comtrend/vr3032u/vr-3032u.c       |   7 +
 board/huawei/hg556a/Kconfig             |  12 ++
 board/huawei/hg556a/MAINTAINERS         |   6 +
 board/huawei/hg556a/Makefile            |   5 +
 board/huawei/hg556a/hg556a.c            |   7 +
 cmd/cpu.c                               |  31 ++--
 configs/comtrend_ar5387un_ram_defconfig |  44 +++++
 configs/comtrend_vr3032u_ram_defconfig  |  44 +++++
 configs/huawei_hg556a_ram_defconfig     |  47 +++++
 drivers/cpu/Makefile                    |   2 +
 drivers/cpu/bmips_cpu.c                 | 310 ++++++++++++++++++++++++++++++++
 drivers/ram/Makefile                    |   2 +
 drivers/ram/bmips_ram.c                 | 126 +++++++++++++
 drivers/serial/Kconfig                  |  14 ++
 drivers/serial/Makefile                 |   1 +
 drivers/serial/serial_bcm6345.c         | 300 +++++++++++++++++++++++++++++++
 drivers/sysreset/Kconfig                |   8 +
 drivers/sysreset/Makefile               |   1 +
 drivers/sysreset/sysreset_syscon.c      |  78 ++++++++
 include/configs/bmips_bcm63268.h        |  25 +++
 include/configs/bmips_bcm6328.h         |  25 +++
 include/configs/bmips_bcm6358.h         |  30 ++++
 include/configs/bmips_common.h          |  23 +++
 include/configs/comtrend_ar5387un.h     |  17 ++
 include/configs/comtrend_vr3032u.h      |  17 ++
 include/configs/huawei_hg556a.h         |  20 +++
 48 files changed, 1793 insertions(+), 17 deletions(-)
 create mode 100644 arch/mips/dts/brcm,bcm63268.dtsi
 create mode 100644 arch/mips/dts/brcm,bcm6328.dtsi
 create mode 100644 arch/mips/dts/brcm,bcm6358.dtsi
 create mode 100644 arch/mips/dts/comtrend,ar-5387un.dts
 create mode 100644 arch/mips/dts/comtrend,vr-3032u.dts
 create mode 100644 arch/mips/dts/huawei,hg556a.dts
 create mode 100644 arch/mips/mach-bmips/Kconfig
 create mode 100644 arch/mips/mach-bmips/Makefile
 create mode 100644 arch/mips/mach-bmips/dram.c
 create mode 100644 arch/mips/mach-bmips/include/ioremap.h
 create mode 100644 board/comtrend/ar5387un/Kconfig
 create mode 100644 board/comtrend/ar5387un/MAINTAINERS
 create mode 100644 board/comtrend/ar5387un/Makefile
 create mode 100644 board/comtrend/ar5387un/ar-5387un.c
 create mode 100644 board/comtrend/vr3032u/Kconfig
 create mode 100644 board/comtrend/vr3032u/MAINTAINERS
 create mode 100644 board/comtrend/vr3032u/Makefile
 create mode 100644 board/comtrend/vr3032u/vr-3032u.c
 create mode 100644 board/huawei/hg556a/Kconfig
 create mode 100644 board/huawei/hg556a/MAINTAINERS
 create mode 100644 board/huawei/hg556a/Makefile
 create mode 100644 board/huawei/hg556a/hg556a.c
 create mode 100644 configs/comtrend_ar5387un_ram_defconfig
 create mode 100644 configs/comtrend_vr3032u_ram_defconfig
 create mode 100644 configs/huawei_hg556a_ram_defconfig
 create mode 100644 drivers/cpu/bmips_cpu.c
 create mode 100644 drivers/ram/bmips_ram.c
 create mode 100644 drivers/serial/serial_bcm6345.c
 create mode 100644 drivers/sysreset/sysreset_syscon.c
 create mode 100644 include/configs/bmips_bcm63268.h
 create mode 100644 include/configs/bmips_bcm6328.h
 create mode 100644 include/configs/bmips_bcm6358.h
 create mode 100644 include/configs/bmips_common.h
 create mode 100644 include/configs/comtrend_ar5387un.h
 create mode 100644 include/configs/comtrend_vr3032u.h
 create mode 100644 include/configs/huawei_hg556a.h
Signature · 1 line
2.1.4
#68 lore raw

PATCH v6 1/14 cmd: cpu: fix NULL cpu feature prints

Commit 740d5d3 added two new features but only one feature name, which results in NULL prints when device_id feature is selected.

Before:

	HG556a # cpu detail
	 -1: cpu at 0	BCM6358A1
		ID = 0, freq = 300 MHz: L1 cache, MMU, NULL
		Device ID 0x2a010
	 -1: cpu at 1	BCM6358A1
		ID = 1, freq = 300 MHz: L1 cache, MMU, NULL
		Device ID 0x2a010
After:
	HG556a # cpu detail
	 -1: cpu at 0	BCM6358A1
		ID = 0, freq = 300 MHz: L1 cache, MMU, Device ID
		Device ID 0x2a010
	 -1: cpu at 1	BCM6358A1
		ID = 1, freq = 300 MHz: L1 cache, MMU, Device ID
		Device ID 0x2a010

---
v6: No changes.
v5: No changes.
v4: No changes.
v3: No changes.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Add the missing name instead of checking for null names.

 cmd/cpu.c | 1 +
 1 file changed, 1 insertion(+)
cmd/cpu.c +1 -0
index bc4dc5c..adfd54a 100644
@@ -15,6 +15,7 @@ static const char *cpu_feature_name[CPU_FEAT_COUNT] = {
 	"L1 cache",
 	"MMU",
 	"Microcode",
+	"Device ID",
 };
 
 static int print_cpu_list(bool detail)
Signature · 1 line
2.1.4
#69 lore raw

PATCH v6 1/14 cmd: cpu: fix NULL cpu feature prints

Am 25.04.2017 um 00:39 schrieb Álvaro Fernández Rojas:

Quoted 31 lines

Commit 740d5d3 added two new features but only one feature name, which results in NULL prints when device_id feature is selected.

Before:

	HG556a # cpu detail
	 -1: cpu at 0	BCM6358A1
		ID = 0, freq = 300 MHz: L1 cache, MMU, NULL
		Device ID 0x2a010
	 -1: cpu at 1	BCM6358A1
		ID = 1, freq = 300 MHz: L1 cache, MMU, NULL
		Device ID 0x2a010
After:
	HG556a # cpu detail
	 -1: cpu at 0	BCM6358A1
		ID = 0, freq = 300 MHz: L1 cache, MMU, Device ID
		Device ID 0x2a010
	 -1: cpu at 1	BCM6358A1
		ID = 1, freq = 300 MHz: L1 cache, MMU, Device ID
		Device ID 0x2a010

---
v6: No changes.
v5: No changes.
v4: No changes.
v3: No changes.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Add the missing name instead of checking for null names.

Quoted 3 lines
 cmd/cpu.c | 1 +
 1 file changed, 1 insertion(+)

applied to u-boot-mips/next, thanks!

Signature · 9 lines
- Daniel

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#70 lore raw

PATCH v6 2/14 sysreset: add syscon-reboot driver

In reply to Álvaro Fernández Rojas

Add a new sysreset driver based on linux/drivers/power/reset/syscon-reboot.c, which provides a generic driver for platforms that only require writing a mask to a regmap offset.

---
v6: Introduce changes suggested by Daniel Schwierzeck:
- Fix lines over 80 characters.
v5: No changes.
v4: Rebased.
v3: Introduce changes suggested by Simon Glass:
- Add missing driver description.
- Alphabetically order includes.
- Add priv struct to store regmap during probe.
- Cosmetic fixes.
v2: No changes.

 drivers/sysreset/Kconfig           |  8 ++++
 drivers/sysreset/Makefile          |  1 +
 drivers/sysreset/sysreset_syscon.c | 78 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 87 insertions(+)
 create mode 100644 drivers/sysreset/sysreset_syscon.c
drivers/sysreset/Kconfig +8 -0
index 9664630..b2f7464 100644
@@ -23,4 +23,12 @@ config SYSRESET_PSCI
 	  must be running on your system.
 
 endif
+
+config SYSRESET_SYSCON
+	bool "Enable support for mfd syscon reboot driver"
+	select REGMAP
+	select SYSCON
+	help
+	  Reboot support for generic SYSCON mapped register reset.
+
 endmenu
drivers/sysreset/Makefile +1 -0
index 7bb8406..bd352e7 100644
@@ -6,6 +6,7 @@
 
 obj-$(CONFIG_SYSRESET) += sysreset-uclass.o
 obj-$(CONFIG_SYSRESET_PSCI) += sysreset_psci.o
+obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o
 
 ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_ROCKCHIP_RK3036) += sysreset_rk3036.o
drivers/sysreset/sysreset_syscon.c new file +78 -0

78 lines not on this page · raw message

Signature · 1 line
2.1.4
#71 lore raw

PATCH v6 2/14 sysreset: add syscon-reboot driver

Am 25.04.2017 um 00:39 schrieb Álvaro Fernández Rojas:

Quoted 18 lines

Add a new sysreset driver based on linux/drivers/power/reset/syscon-reboot.c, which provides a generic driver for platforms that only require writing a mask to a regmap offset.

---
v6: Introduce changes suggested by Daniel Schwierzeck:
- Fix lines over 80 characters.
v5: No changes.
v4: Rebased.
v3: Introduce changes suggested by Simon Glass:
- Add missing driver description.
- Alphabetically order includes.
- Add priv struct to store regmap during probe.
- Cosmetic fixes.
v2: No changes.

Quoted 6 lines
 drivers/sysreset/Kconfig           |  8 ++++
 drivers/sysreset/Makefile          |  1 +
 drivers/sysreset/sysreset_syscon.c | 78 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 87 insertions(+)
 create mode 100644 drivers/sysreset/sysreset_syscon.c

applied to u-boot-mips/next, thanks!

Signature · 9 lines
- Daniel

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#72 lore raw

PATCH v6 3/14 MIPS: allow using generic sysreset drivers

In reply to Álvaro Fernández Rojas

Avoid duplicating do_reset definition if SYSRESET is enabled for MIPS

---
v6: No changes.
v5: No changes.
v4: No changes.
v3: No changes.
v2: No changes.

 arch/mips/cpu/cpu.c | 2 ++
 1 file changed, 2 insertions(+)
arch/mips/cpu/cpu.c +2 -0
index 1b919ed..55e6498 100644
@@ -12,6 +12,7 @@
 #include <asm/mipsregs.h>
 #include <asm/reboot.h>
 
+#ifndef CONFIG_SYSRESET
 void __weak _machine_restart(void)
 {
 	fprintf(stderr, "*** reset failed ***\n");
@@ -26,6 +27,7 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
 	return 0;
 }
+#endif
 
 void write_one_tlb(int index, u32 pagemask, u32 hi, u32 low0, u32 low1)
 {
Signature · 1 line
2.1.4
#73 lore raw

PATCH v6 3/14 MIPS: allow using generic sysreset drivers

Am 25.04.2017 um 00:39 schrieb Álvaro Fernández Rojas:

Quoted 11 lines

Avoid duplicating do_reset definition if SYSRESET is enabled for MIPS

---
v6: No changes.
v5: No changes.
v4: No changes.
v3: No changes.
v2: No changes.

Quoted 3 lines
 arch/mips/cpu/cpu.c | 2 ++
 1 file changed, 2 insertions(+)

applied to u-boot-mips/next, thanks!

Signature · 9 lines
- Daniel

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#74 lore raw

PATCH v6 4/14 serial: add serial driver for BCM6345

In reply to Álvaro Fernández Rojas

It is based on linux/drivers/tty/serial/bcm63xx_uart.c

---
v6: Introduce changes suggested by Daniel Schwierzeck:
- Use clr/set bits macros.
- Use read/write instead of __raw_read/__raw_write.
- Fix function comments.
- Remove return parenthesis.
- Simplify bcm6345_serial_pending return.
- Add missing defines.
v5: No changes.
v4: Add more missing register configurations based on CFE.
v3: Several improvements:
- Add missing register configurations based on CFE.
- Replace tabs with whitespaces.
- Cosmetic fixes.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Remove unneeded defines.
- Fix incorrect multi-line comment.

 drivers/serial/Kconfig          |  14 ++
 drivers/serial/Makefile         |   1 +
 drivers/serial/serial_bcm6345.c | 300 ++++++++++++++++++++++++++++++++++++++++
 3 files changed, 315 insertions(+)
 create mode 100644 drivers/serial/serial_bcm6345.c
drivers/serial/Kconfig +14 -0
index c0ec2ec..872eafd 100644
@@ -134,6 +134,14 @@ config DEBUG_UART_ATMEL
 	  will need to provide parameters to make this work. The driver will
 	  be available until the real driver-model serial is running.
 
+config DEBUG_UART_BCM6345
+	bool "BCM6345 UART"
+	depends on BCM6345_SERIAL
+	help
+	  Select this to enable a debug UART on BCM6345 SoCs. You
+	  will need to provide parameters to make this work. The driver will
+	  be available until the real driver model serial is running.
+
 config DEBUG_UART_NS16550
 	bool "ns16550"
 	help
@@ -339,6 +347,12 @@ config ATMEL_USART
 	  configured in the device tree, and input clock frequency can
 	  be got from the clk node.
 
+config BCM6345_SERIAL
+	bool "Support for BCM6345 UART"
+	depends on DM_SERIAL && ARCH_BMIPS
+	help
+	  Select this to enable UART on BCM6345 SoCs.
+
 config FSL_LPUART
 	bool "Freescale LPUART support"
 	help
drivers/serial/Makefile +1 -0
index 4382cf9..dca31b2 100644
@@ -20,6 +20,7 @@ obj-$(CONFIG_ALTERA_JTAG_UART) += altera_jtag_uart.o
 obj-$(CONFIG_AR933X_UART) += serial_ar933x.o
 obj-$(CONFIG_ARM_DCC) += arm_dcc.o
 obj-$(CONFIG_ATMEL_USART) += atmel_usart.o
+obj-$(CONFIG_BCM6345_SERIAL) += serial_bcm6345.o
 obj-$(CONFIG_EFI_APP) += serial_efi.o
 obj-$(CONFIG_LPC32XX_HSUART) += lpc32xx_hsuart.o
 obj-$(CONFIG_MCFUART) += mcfuart.o
drivers/serial/serial_bcm6345.c new file +300 -0

300 lines not on this page · raw message

Signature · 1 line
2.1.4
#75 lore raw

PATCH v6 4/14 serial: add serial driver for BCM6345

Quoted 21 lines · Álvaro Fernández Rojas

It is based on linux/drivers/tty/serial/bcm63xx_uart.c

---
v6: Introduce changes suggested by Daniel Schwierzeck:
- Use clr/set bits macros.
- Use read/write instead of __raw_read/__raw_write.
- Fix function comments.
- Remove return parenthesis.
- Simplify bcm6345_serial_pending return.
- Add missing defines.
v5: No changes.
v4: Add more missing register configurations based on CFE.
v3: Several improvements:
- Add missing register configurations based on CFE.
- Replace tabs with whitespaces.
- Cosmetic fixes.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Remove unneeded defines.
- Fix incorrect multi-line comment.

Quoted 5 lines
 drivers/serial/Kconfig          |  14 ++
 drivers/serial/Makefile         |   1 +
 drivers/serial/serial_bcm6345.c | 300 ++++++++++++++++++++++++++++++++++++++++
 3 files changed, 315 insertions(+)
 create mode 100644 drivers/serial/serial_bcm6345.c
#76 lore raw

PATCH v6 4/14 serial: add serial driver for BCM6345

In reply to Álvaro Fernández Rojas

Am 25.04.2017 um 00:39 schrieb Álvaro Fernández Rojas:

Quoted 21 lines

It is based on linux/drivers/tty/serial/bcm63xx_uart.c

---
v6: Introduce changes suggested by Daniel Schwierzeck:
- Use clr/set bits macros.
- Use read/write instead of __raw_read/__raw_write.
- Fix function comments.
- Remove return parenthesis.
- Simplify bcm6345_serial_pending return.
- Add missing defines.
v5: No changes.
v4: Add more missing register configurations based on CFE.
v3: Several improvements:
- Add missing register configurations based on CFE.
- Replace tabs with whitespaces.
- Cosmetic fixes.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Remove unneeded defines.
- Fix incorrect multi-line comment.

Quoted 6 lines
 drivers/serial/Kconfig          |  14 ++
 drivers/serial/Makefile         |   1 +
 drivers/serial/serial_bcm6345.c | 300 ++++++++++++++++++++++++++++++++++++++++
 3 files changed, 315 insertions(+)
 create mode 100644 drivers/serial/serial_bcm6345.c

applied to u-boot-mips/next, thanks!

Signature · 9 lines
- Daniel

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#77 lore raw

PATCH v6 5/14 cmd: cpu: refactor to ensure devices are probed and improve code style

In reply to Álvaro Fernández Rojas

Use uclass_first_device and uclass_next_device in order to avoid exceptions for drivers that aren't probed when cpu ops are requested. Improve code style and fix indentations.
Fix incorrect line break when cpu info is not available.
Remove unneeded brackets.

---
v6: No changes.
v5: No changes.
v4: Refactor code to use uclass_first_device and uclass_next_device as
requested by Simon Glass.
v3: add new patch to ensure that device is probed.

 cmd/cpu.c | 30 +++++++++++++-----------------
 1 file changed, 13 insertions(+), 17 deletions(-)
cmd/cpu.c +13 -17
index adfd54a..6213c72 100644
@@ -1,6 +1,7 @@
 /*
  * Copyright (c) 2015 Google, Inc
  * Written by Simon Glass <[email protected]>
+ * Copyright (c) 2017 Álvaro Fernández Rojas <[email protected]>
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
@@ -21,20 +22,15 @@ static const char *cpu_feature_name[CPU_FEAT_COUNT] = {
 static int print_cpu_list(bool detail)
 {
 	struct udevice *dev;
-	struct uclass *uc;
 	char buf[100];
-	int ret;
 
-	ret = uclass_get(UCLASS_CPU, &uc);
-	if (ret) {
-		printf("Cannot find CPU uclass\n");
-		return ret;
-	}
-	uclass_foreach_dev(dev, uc) {
+	for (uclass_first_device(UCLASS_CPU, &dev);
+		     dev;
+		     uclass_next_device(&dev)) {
 		struct cpu_platdata *plat = dev_get_parent_platdata(dev);
 		struct cpu_info info;
-		bool first;
-		int i;
+		bool first = true;
+		int ret, i;
 
 		ret = cpu_get_desc(dev, buf, sizeof(buf));
 		printf("%3d: %-10s %s\n", dev->seq, dev->name,
@@ -45,13 +41,12 @@ static int print_cpu_list(bool detail)
 		if (ret) {
 			printf("\t(no detail available");
 			if (ret != -ENOSYS)
-				printf(": err=%d\n", ret);
+				printf(": err=%d", ret);
 			printf(")\n");
 			continue;
 		}
 		printf("\tID = %d, freq = ", plat->cpu_id);
 		print_freq(info.cpu_freq, "");
-		first = true;
 		for (i = 0; i < CPU_FEAT_COUNT; i++) {
 			if (info.features & (1 << i)) {
 				printf("%s%s", first ? ": " : ", ",
@@ -60,10 +55,9 @@ static int print_cpu_list(bool detail)
 			}
 		}
 		printf("\n");
-		if (info.features & (1 << CPU_FEAT_UCODE)) {
+		if (info.features & (1 << CPU_FEAT_UCODE))
 			printf("\tMicrocode version %#x\n",
 			       plat->ucode_version);
-		}
 		if (info.features & (1 << CPU_FEAT_DEVICE_ID))
 			printf("\tDevice ID %#lx\n", plat->device_id);
 	}
@@ -71,7 +65,8 @@ static int print_cpu_list(bool detail)
 	return 0;
 }
 
-static int do_cpu_list(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+static int do_cpu_list(cmd_tbl_t *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	if (print_cpu_list(false))
 		return CMD_RET_FAILURE;
@@ -97,7 +92,7 @@ static cmd_tbl_t cmd_cpu_sub[] = {
  * Process a cpu sub-command
  */
 static int do_cpu(cmd_tbl_t *cmdtp, int flag, int argc,
-		       char * const argv[])
+		  char * const argv[])
 {
 	cmd_tbl_t *c = NULL;
 
@@ -106,7 +101,8 @@ static int do_cpu(cmd_tbl_t *cmdtp, int flag, int argc,
 	argv++;
 
 	if (argc)
-		c = find_cmd_tbl(argv[0], cmd_cpu_sub, ARRAY_SIZE(cmd_cpu_sub));
+		c = find_cmd_tbl(argv[0], cmd_cpu_sub,
+				 ARRAY_SIZE(cmd_cpu_sub));
 
 	if (c)
 		return c->cmd(cmdtp, flag, argc, argv);
Signature · 1 line
2.1.4
#78 lore raw

PATCH v6 5/14 cmd: cpu: refactor to ensure devices are probed and improve code style

Am 25.04.2017 um 00:39 schrieb Álvaro Fernández Rojas:

Quoted 15 lines

Use uclass_first_device and uclass_next_device in order to avoid exceptions for drivers that aren't probed when cpu ops are requested. Improve code style and fix indentations.
Fix incorrect line break when cpu info is not available.
Remove unneeded brackets.

---
v6: No changes.
v5: No changes.
v4: Refactor code to use uclass_first_device and uclass_next_device as
requested by Simon Glass.
v3: add new patch to ensure that device is probed.

Quoted 3 lines
 cmd/cpu.c | 30 +++++++++++++-----------------
 1 file changed, 13 insertions(+), 17 deletions(-)

applied to u-boot-mips/next, thanks!

Signature · 9 lines
- Daniel

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#79 lore raw

PATCH v6 6/14 cpu: add CPU driver for Broadcom MIPS SoCs

In reply to Álvaro Fernández Rojas

---
v6: Introduce changes suggested by Simon Glass:
- Use read/write instead of __raw_read/__raw_write.
v5: Add specific desc functions.
v4: No changes.
v3: Several improvements:
- Probe driver correctly.
- Allocate size for priv struct.
- Cosmetic fixes.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Get register base from DT.

 drivers/cpu/Makefile    |   2 +
 drivers/cpu/bmips_cpu.c | 310 ++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 312 insertions(+)
 create mode 100644 drivers/cpu/bmips_cpu.c
drivers/cpu/Makefile +2 -0
index 8710160..db515f6 100644
@@ -5,3 +5,5 @@
 # SPDX-License-Identifier:      GPL-2.0+
 #
 obj-$(CONFIG_CPU) += cpu-uclass.o
+
+obj-$(CONFIG_ARCH_BMIPS) += bmips_cpu.o
drivers/cpu/bmips_cpu.c new file +310 -0

310 lines not on this page · raw message

Signature · 1 line
2.1.4
#80 lore raw

PATCH v6 6/14 cpu: add CPU driver for Broadcom MIPS SoCs

Am 25.04.2017 um 00:39 schrieb Álvaro Fernández Rojas:

Quoted 15 lines

---
v6: Introduce changes suggested by Simon Glass:
- Use read/write instead of __raw_read/__raw_write.
v5: Add specific desc functions.
v4: No changes.
v3: Several improvements:
- Probe driver correctly.
- Allocate size for priv struct.
- Cosmetic fixes.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Get register base from DT.

Quoted 5 lines
 drivers/cpu/Makefile    |   2 +
 drivers/cpu/bmips_cpu.c | 310 ++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 312 insertions(+)
 create mode 100644 drivers/cpu/bmips_cpu.c

applied to u-boot-mips/next, thanks!

Signature · 9 lines
- Daniel

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#81 lore raw

PATCH v6 7/14 ram: add RAM driver for Broadcom MIPS SoCs

In reply to Álvaro Fernández Rojas

---
v6: Introduce changes suggested by Simon Glass:
- Use read/write instead of __raw_read/__raw_write.
v5: No changes.
v4: No changes.
v3: Rename of_match to ids.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.

 drivers/ram/Makefile    |   2 +
 drivers/ram/bmips_ram.c | 126 ++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 128 insertions(+)
 create mode 100644 drivers/ram/bmips_ram.c
drivers/ram/Makefile +2 -0
index 0e10249..818dd9f 100644
@@ -6,3 +6,5 @@
 #
 obj-$(CONFIG_RAM) += ram-uclass.o
 obj-$(CONFIG_SANDBOX) += sandbox_ram.o
+
+obj-$(CONFIG_ARCH_BMIPS) += bmips_ram.o
drivers/ram/bmips_ram.c new file +126 -0

126 lines not on this page · raw message

Signature · 1 line
2.1.4
#82 lore raw

PATCH v6 7/14 ram: add RAM driver for Broadcom MIPS SoCs

Am 25.04.2017 um 00:39 schrieb Álvaro Fernández Rojas:

Quoted 11 lines

---
v6: Introduce changes suggested by Simon Glass:
- Use read/write instead of __raw_read/__raw_write.
v5: No changes.
v4: No changes.
v3: Rename of_match to ids.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.

Quoted 5 lines
 drivers/ram/Makefile    |   2 +
 drivers/ram/bmips_ram.c | 126 ++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 128 insertions(+)
 create mode 100644 drivers/ram/bmips_ram.c

applied to u-boot-mips/next, thanks!

Signature · 9 lines
- Daniel

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#83 lore raw

PATCH v6 8/14 MIPS: add initial infrastructure for Broadcom MIPS SoCs

In reply to Álvaro Fernández Rojas

CFE checks CPU Thread in a different way (using register $22):
mfc0 t1, C0_BCM_CONFIG, 3 # $22
li t2, CP0_CMT_TPID # (1 << 31)
and t1, t2
bnez t1, 2f # if we are running on thread 1, skip init
nop

---
v6: Introduce changes suggested by Daniel Schwierzeck:
- Improve BMIPS_BOOT_RAM description.
- Remove CONFIG_BAUDRATE (selected in each board defconfig).
- Remove CONFIG_REMAKE_ELF (selected in each board include).
v5: No changes.
v4: No changes.
v3: Select CONFIG_REMAKE_ELF.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Replace initdram with dram_init.
- Merge with "fix first CPU check" patch.

 arch/mips/Kconfig              | 10 ++++++++++
 arch/mips/Makefile             |  1 +
 arch/mips/cpu/start.S          |  5 +++++
 arch/mips/mach-bmips/Kconfig   | 23 +++++++++++++++++++++++
 arch/mips/mach-bmips/Makefile  |  5 +++++
 arch/mips/mach-bmips/dram.c    | 37 +++++++++++++++++++++++++++++++++++++
 include/configs/bmips_common.h | 23 +++++++++++++++++++++++
 7 files changed, 104 insertions(+)
 create mode 100644 arch/mips/mach-bmips/Kconfig
 create mode 100644 arch/mips/mach-bmips/Makefile
 create mode 100644 arch/mips/mach-bmips/dram.c
 create mode 100644 include/configs/bmips_common.h
arch/mips/Kconfig +10 -0
index d97930e..c97ea41 100644
@@ -75,6 +75,15 @@ config ARCH_ATH79
 	select OF_CONTROL
 	select DM
 
+config ARCH_BMIPS
+	bool "Support BMIPS SoCs"
+	select OF_CONTROL
+	select DM
+	select CLK
+	select CPU
+	select RAM
+	select SYSRESET
+
 config MACH_PIC32
 	bool "Support Microchip PIC32"
 	select OF_CONTROL
@@ -123,6 +132,7 @@ source "board/micronas/vct/Kconfig"
 source "board/pb1x00/Kconfig"
 source "board/qemu-mips/Kconfig"
 source "arch/mips/mach-ath79/Kconfig"
+source "arch/mips/mach-bmips/Kconfig"
 source "arch/mips/mach-pic32/Kconfig"
 
 if MIPS
arch/mips/Makefile +1 -0
index efe7e44..c30d4ef 100644
@@ -15,6 +15,7 @@ libs-y += arch/mips/lib/
 
 machine-$(CONFIG_SOC_AU1X00) += au1x00
 machine-$(CONFIG_ARCH_ATH79) += ath79
+machine-$(CONFIG_ARCH_BMIPS) += bmips
 machine-$(CONFIG_MACH_PIC32) += pic32
 
 machdirs := $(patsubst %,arch/mips/mach-%/,$(machine-y))
arch/mips/cpu/start.S +5 -0
index a6b7a04..d01ee9f 100644
@@ -151,8 +151,13 @@ reset:
 	 mfc0	t0, CP0_GLOBALNUMBER
 #endif
 
+#ifdef CONFIG_ARCH_BMIPS
+1:	mfc0	t0, CP0_DIAGNOSTIC, 3
+	and	t0, t0, (1 << 31)
+#else
 1:	mfc0	t0, CP0_EBASE
 	and	t0, t0, EBASE_CPUNUM
+#endif
 
 	/* Hang if this isn't the first CPU in the system */
 2:	beqz	t0, 4f
arch/mips/mach-bmips/Kconfig new file +23 -0
new file mode 100644
index 0000000..4f4d351
@@ -0,0 +1,23 @@
+menu "Broadcom MIPS platforms"
+	depends on ARCH_BMIPS
+
+config SYS_SOC
+	default "none"
+
+choice
+	prompt "Boot mode"
+
+config BMIPS_BOOT_RAM
+	bool "RAM boot"
+	depends on BMIPS_SUPPORTS_BOOT_RAM
+	help
+	  This builds an image that is linked to a RAM address. It can be used
+	  for booting from CFE via TFTP using an ELF image, but it can also be
+	  booted from RAM by other bootloaders using a BIN image.
+
+endchoice
+
+config BMIPS_SUPPORTS_BOOT_RAM
+	bool
+
+endmenu
arch/mips/mach-bmips/Makefile new file +5 -0
new file mode 100644
index 0000000..f432acc
@@ -0,0 +1,5 @@
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y += dram.o
arch/mips/mach-bmips/dram.c new file +37 -0
new file mode 100644
index 0000000..b19b28a
@@ -0,0 +1,37 @@
+/*
+ * Copyright (C) 2016 Daniel Schwierzeck <[email protected]>
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <ram.h>
+#include <dm.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int dram_init(void)
+{
+	struct ram_info ram;
+	struct udevice *dev;
+	int err;
+
+	err = uclass_get_device(UCLASS_RAM, 0, &dev);
+	if (err) {
+		debug("DRAM init failed: %d\n", err);
+		return 0;
+	}
+
+	err = ram_get_info(dev, &ram);
+	if (err) {
+		debug("Cannot get DRAM size: %d\n", err);
+		return 0;
+	}
+
+	debug("SDRAM base=%zx, size=%x\n", ram.base, ram.size);
+
+	gd->ram_size = ram.size;
+
+	return 0;
+}
include/configs/bmips_common.h new file +23 -0
new file mode 100644
index 0000000..d2b05d4
@@ -0,0 +1,23 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_BMIPS_COMMON_H
+#define __CONFIG_BMIPS_COMMON_H
+
+/* RAM */
+#define CONFIG_SYS_MEMTEST_START	0xa0000000
+#define CONFIG_SYS_MEMTEST_END		0xa2000000
+
+/* Memory usage */
+#define CONFIG_SYS_MAXARGS		24
+#define CONFIG_SYS_MALLOC_LEN		(1024 * 1024)
+#define CONFIG_SYS_BOOTPARAMS_LEN	(128 * 1024)
+#define CONFIG_SYS_CBSIZE		512
+
+/* U-Boot */
+#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE
+
+#endif /* __CONFIG_BMIPS_COMMON_H */
Signature · 1 line
2.1.4
#84 lore raw

PATCH v6 8/14 MIPS: add initial infrastructure for Broadcom MIPS SoCs

Quoted 21 lines · Álvaro Fernández Rojas

CFE checks CPU Thread in a different way (using register $22):

mfc0    t1, C0_BCM_CONFIG, 3 # $22
li      t2, CP0_CMT_TPID # (1 << 31)
and     t1, t2
bnez    t1, 2f  # if we are running on thread 1, skip init

nop

---
v6: Introduce changes suggested by Daniel Schwierzeck:
- Improve BMIPS_BOOT_RAM description.
- Remove CONFIG_BAUDRATE (selected in each board defconfig).
- Remove CONFIG_REMAKE_ELF (selected in each board include).
v5: No changes.
v4: No changes.
v3: Select CONFIG_REMAKE_ELF.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Replace initdram with dram_init.
- Merge with "fix first CPU check" patch.

Quoted 12 lines
 arch/mips/Kconfig              | 10 ++++++++++
 arch/mips/Makefile             |  1 +
 arch/mips/cpu/start.S          |  5 +++++
 arch/mips/mach-bmips/Kconfig   | 23 +++++++++++++++++++++++
 arch/mips/mach-bmips/Makefile  |  5 +++++
 arch/mips/mach-bmips/dram.c    | 37 +++++++++++++++++++++++++++++++++++++
 include/configs/bmips_common.h | 23 +++++++++++++++++++++++
 7 files changed, 104 insertions(+)
 create mode 100644 arch/mips/mach-bmips/Kconfig
 create mode 100644 arch/mips/mach-bmips/Makefile
 create mode 100644 arch/mips/mach-bmips/dram.c
 create mode 100644 include/configs/bmips_common.h
#85 lore raw

PATCH v6 8/14 MIPS: add initial infrastructure for Broadcom MIPS SoCs

In reply to Álvaro Fernández Rojas

Am 25.04.2017 um 00:39 schrieb Álvaro Fernández Rojas:

Quoted 21 lines

CFE checks CPU Thread in a different way (using register $22):
mfc0 t1, C0_BCM_CONFIG, 3 # $22
li t2, CP0_CMT_TPID # (1 << 31)
and t1, t2
bnez t1, 2f # if we are running on thread 1, skip init
nop

---
v6: Introduce changes suggested by Daniel Schwierzeck:
- Improve BMIPS_BOOT_RAM description.
- Remove CONFIG_BAUDRATE (selected in each board defconfig).
- Remove CONFIG_REMAKE_ELF (selected in each board include).
v5: No changes.
v4: No changes.
v3: Select CONFIG_REMAKE_ELF.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Replace initdram with dram_init.
- Merge with "fix first CPU check" patch.

Quoted 13 lines
 arch/mips/Kconfig              | 10 ++++++++++
 arch/mips/Makefile             |  1 +
 arch/mips/cpu/start.S          |  5 +++++
 arch/mips/mach-bmips/Kconfig   | 23 +++++++++++++++++++++++
 arch/mips/mach-bmips/Makefile  |  5 +++++
 arch/mips/mach-bmips/dram.c    | 37 +++++++++++++++++++++++++++++++++++++
 include/configs/bmips_common.h | 23 +++++++++++++++++++++++
 7 files changed, 104 insertions(+)
 create mode 100644 arch/mips/mach-bmips/Kconfig
 create mode 100644 arch/mips/mach-bmips/Makefile
 create mode 100644 arch/mips/mach-bmips/dram.c
 create mode 100644 include/configs/bmips_common.h

applied to u-boot-mips/next, thanks!

Signature · 9 lines
- Daniel

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#86 lore raw

PATCH v6 9/14 MIPS: add support for Broadcom MIPS BCM6358 SoC family

In reply to Álvaro Fernández Rojas

---
v6: Several improvements:
- Rename and shrink reset_cntl syscon to pll_cntl.
- Reorder include config defines.
v5: No changes.
v4: No changes.
v3: Add cfi-flash defines.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Add PERF_BASE to cpus.
- Merge with "fix ioremap for BCM6358" patch.
- Add a custom ioremap.h instead of modifying the generic one.

 arch/mips/dts/brcm,bcm6358.dtsi        | 98 ++++++++++++++++++++++++++++++++++
 arch/mips/mach-bmips/Kconfig           | 18 ++++++-
 arch/mips/mach-bmips/include/ioremap.h | 45 ++++++++++++++++
 include/configs/bmips_bcm6358.h        | 30 +++++++++++
 4 files changed, 190 insertions(+), 1 deletion(-)
 create mode 100644 arch/mips/dts/brcm,bcm6358.dtsi
 create mode 100644 arch/mips/mach-bmips/include/ioremap.h
 create mode 100644 include/configs/bmips_bcm6358.h
arch/mips/dts/brcm,bcm6358.dtsi new file +98 -0
new file mode 100644
index 0000000..48322fb
@@ -0,0 +1,98 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include "skeleton.dtsi"
+
+/ {
+	compatible = "brcm,bcm6358";
+
+	cpus {
+		reg = <0xfffe0000 0x4>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		u-boot,dm-pre-reloc;
+
+		cpu at 0 {
+			compatible = "brcm,bcm6358-cpu", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <0>;
+			u-boot,dm-pre-reloc;
+		};
+
+		cpu at 1 {
+			compatible = "brcm,bcm6358-cpu", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <1>;
+			u-boot,dm-pre-reloc;
+		};
+	};
+
+	clocks {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		u-boot,dm-pre-reloc;
+
+		periph_osc: periph-osc {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <50000000>;
+			u-boot,dm-pre-reloc;
+		};
+	};
+
+	pflash: nor at 1e000000 {
+		compatible = "cfi-flash";
+		reg = <0x1e000000 0x2000000>;
+		bank-width = <2>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		status = "disabled";
+	};
+
+	ubus {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		u-boot,dm-pre-reloc;
+
+		pll_cntl: syscon at fffe0008 {
+			compatible = "syscon";
+			reg = <0xfffe0008 0x4>;
+		};
+
+		syscon-reboot {
+			compatible = "syscon-reboot";
+			regmap = <&pll_cntl>;
+			offset = <0x0>;
+			mask = <0x1>;
+		};
+
+		uart0: serial at fffe0100 {
+			compatible = "brcm,bcm6345-uart";
+			reg = <0xfffe0100 0x18>;
+			clocks = <&periph_osc>;
+
+			status = "disabled";
+		};
+
+		uart1: serial at fffe0120 {
+			compatible = "brcm,bcm6345-uart";
+			reg = <0xfffe0120 0x18>;
+			clocks = <&periph_osc>;
+
+			status = "disabled";
+		};
+
+		memory-controller at fffe1200 {
+			compatible = "brcm,bcm6358-mc";
+			reg = <0xfffe1200 0x1000>;
+			u-boot,dm-pre-reloc;
+		};
+	};
+};
arch/mips/mach-bmips/Kconfig +17 -1
index 4f4d351..03cba72 100644
@@ -2,7 +2,23 @@ menu "Broadcom MIPS platforms"
 	depends on ARCH_BMIPS
 
 config SYS_SOC
-	default "none"
+	default "bcm6358" if SOC_BMIPS_BCM6358
+
+choice
+	prompt "Broadcom MIPS SoC select"
+
+config SOC_BMIPS_BCM6358
+	bool "BMIPS BCM6358 family"
+	select SUPPORTS_BIG_ENDIAN
+	select SUPPORTS_CPU_MIPS32_R1
+	select MIPS_TUNE_4KC
+	select MIPS_L1_CACHE_SHIFT_4
+	select SWAP_IO_SPACE
+	select SYSRESET_SYSCON
+	help
+	  This supports BMIPS BCM6358 family including BCM6358 and BCM6359.
+
+endchoice
 
 choice
 	prompt "Boot mode"
arch/mips/mach-bmips/include/ioremap.h new file +45 -0

45 lines not on this page · raw message

include/configs/bmips_bcm6358.h new file +30 -0
new file mode 100644
index 0000000..5d018a3
@@ -0,0 +1,30 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_BMIPS_BCM6358_H
+#define __CONFIG_BMIPS_BCM6358_H
+
+/* CPU */
+#define CONFIG_SYS_MIPS_TIMER_FREQ	150000000
+
+/* RAM */
+#define CONFIG_NR_DRAM_BANKS		1
+#define CONFIG_SYS_SDRAM_BASE		0x80000000
+
+/* U-Boot */
+#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + 0x100000
+
+#if defined(CONFIG_BMIPS_BOOT_RAM)
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SYS_INIT_SP_OFFSET	0x2000
+#endif
+
+#define CONFIG_SYS_FLASH_BASE			0xbe000000
+#define CONFIG_SYS_FLASH_EMPTY_INFO
+#define CONFIG_SYS_FLASH_PROTECTION
+#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT	1
+
+#endif /* __CONFIG_BMIPS_BCM6358_H */
Signature · 1 line
2.1.4
#87 lore raw

PATCH v6 9/14 MIPS: add support for Broadcom MIPS BCM6358 SoC family

Quoted 14 lines · Álvaro Fernández Rojas

---
v6: Several improvements:
- Rename and shrink reset_cntl syscon to pll_cntl.
- Reorder include config defines.
v5: No changes.
v4: No changes.
v3: Add cfi-flash defines.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Add PERF_BASE to cpus.
- Merge with "fix ioremap for BCM6358" patch.
- Add a custom ioremap.h instead of modifying the generic one.

Quoted 9 lines
 arch/mips/dts/brcm,bcm6358.dtsi        | 98 ++++++++++++++++++++++++++++++++++
 arch/mips/mach-bmips/Kconfig           | 18 ++++++-
 arch/mips/mach-bmips/include/ioremap.h | 45 ++++++++++++++++
 include/configs/bmips_bcm6358.h        | 30 +++++++++++
 4 files changed, 190 insertions(+), 1 deletion(-)
 create mode 100644 arch/mips/dts/brcm,bcm6358.dtsi
 create mode 100644 arch/mips/mach-bmips/include/ioremap.h
 create mode 100644 include/configs/bmips_bcm6358.h
#88 lore raw

PATCH v6 9/14 MIPS: add support for Broadcom MIPS BCM6358 SoC family

In reply to Álvaro Fernández Rojas

Am 25.04.2017 um 00:39 schrieb Álvaro Fernández Rojas:

Quoted 14 lines

---
v6: Several improvements:
- Rename and shrink reset_cntl syscon to pll_cntl.
- Reorder include config defines.
v5: No changes.
v4: No changes.
v3: Add cfi-flash defines.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Add PERF_BASE to cpus.
- Merge with "fix ioremap for BCM6358" patch.
- Add a custom ioremap.h instead of modifying the generic one.

Quoted 9 lines
 arch/mips/dts/brcm,bcm6358.dtsi        | 98 ++++++++++++++++++++++++++++++++++
 arch/mips/mach-bmips/Kconfig           | 18 ++++++-
 arch/mips/mach-bmips/include/ioremap.h | 45 ++++++++++++++++
 include/configs/bmips_bcm6358.h        | 30 +++++++++++
 4 files changed, 190 insertions(+), 1 deletion(-)
 create mode 100644 arch/mips/dts/brcm,bcm6358.dtsi
 create mode 100644 arch/mips/mach-bmips/include/ioremap.h
 create mode 100644 include/configs/bmips_bcm6358.h

applied to u-boot-mips/next, thanks!

Signature · 9 lines
- Daniel

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#89 lore raw

PATCH v6 10/14 MIPS: add BMIPS Huawei HG556a board

In reply to Álvaro Fernández Rojas

---
v6:
- Select CONFIG_BMIPS_BOOT_RAM and CONFIG_BAUDRATE in defconfig.
- Simplify board name.
v5: No changes.
v4: No changes.
v3: Add cfi-flash support.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Remove DEBUG_UART from defconfig.

 arch/mips/dts/Makefile              |  1 +
 arch/mips/dts/huawei,hg556a.dts     | 31 ++++++++++++++++++++++++
 arch/mips/mach-bmips/Kconfig        | 12 ++++++++++
 board/huawei/hg556a/Kconfig         | 12 ++++++++++
 board/huawei/hg556a/MAINTAINERS     |  6 +++++
 board/huawei/hg556a/Makefile        |  5 ++++
 board/huawei/hg556a/hg556a.c        |  7 ++++++
 configs/huawei_hg556a_ram_defconfig | 47 +++++++++++++++++++++++++++++++++++++
 include/configs/huawei_hg556a.h     | 20 ++++++++++++++++
 9 files changed, 141 insertions(+)
 create mode 100644 arch/mips/dts/huawei,hg556a.dts
 create mode 100644 board/huawei/hg556a/Kconfig
 create mode 100644 board/huawei/hg556a/MAINTAINERS
 create mode 100644 board/huawei/hg556a/Makefile
 create mode 100644 board/huawei/hg556a/hg556a.c
 create mode 100644 configs/huawei_hg556a_ram_defconfig
 create mode 100644 include/configs/huawei_hg556a.h
arch/mips/dts/Makefile +1 -0
index 30fcc2b..1843b77 100644
@@ -8,6 +8,7 @@ dtb-$(CONFIG_TARGET_BOSTON) += img,boston.dtb
 dtb-$(CONFIG_TARGET_MALTA) += mti,malta.dtb
 dtb-$(CONFIG_TARGET_PIC32MZDASK) += pic32mzda_sk.dtb
 dtb-$(CONFIG_TARGET_XILFPGA) += nexys4ddr.dtb
+dtb-$(CONFIG_BOARD_HUAWEI_HG556A) += huawei,hg556a.dtb
 dtb-$(CONFIG_BOARD_TPLINK_WDR4300) += tplink_wdr4300.dtb
 
 targets += $(dtb-y)
arch/mips/dts/huawei,hg556a.dts new file +31 -0
new file mode 100644
index 0000000..6775909
@@ -0,0 +1,31 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "brcm,bcm6358.dtsi"
+
+/ {
+	model = "Huawei EchoLife HG556a";
+	compatible = "huawei,hg556a", "brcm,bcm6358";
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+};
+
+&pflash {
+	status = "okay";
+};
+
+&uart0 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
arch/mips/mach-bmips/Kconfig +12 -0
index 03cba72..0300ae3 100644
@@ -21,6 +21,16 @@ config SOC_BMIPS_BCM6358
 endchoice
 
 choice
+	prompt "Board select"
+
+config BOARD_HUAWEI_HG556A
+	bool "Huawei EchoLife HG556a"
+	depends on SOC_BMIPS_BCM6358
+	select BMIPS_SUPPORTS_BOOT_RAM
+
+endchoice
+
+choice
 	prompt "Boot mode"
 
 config BMIPS_BOOT_RAM
@@ -36,4 +46,6 @@ endchoice
 config BMIPS_SUPPORTS_BOOT_RAM
 	bool
 
+source "board/huawei/hg556a/Kconfig"
+
 endmenu
board/huawei/hg556a/Kconfig new file +12 -0
new file mode 100644
index 0000000..88622d0
@@ -0,0 +1,12 @@
+if BOARD_HUAWEI_HG556A
+
+config SYS_BOARD
+	default "hg556a"
+
+config SYS_VENDOR
+	default "huawei"
+
+config SYS_CONFIG_NAME
+	default "huawei_hg556a"
+
+endif
board/huawei/hg556a/MAINTAINERS new file +6 -0
new file mode 100644
index 0000000..3ead7e4
@@ -0,0 +1,6 @@
+HUAWEI HG556A BOARD
+M:	Álvaro Fernández Rojas <[email protected]>
+S:	Maintained
+F:	board/huawei/hg556a/
+F:	include/configs/huawei_hg556a.h
+F:	configs/huawei_hg556a_ram_defconfig
board/huawei/hg556a/Makefile new file +5 -0
new file mode 100644
index 0000000..ace0ed3
@@ -0,0 +1,5 @@
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y += hg556a.o
board/huawei/hg556a/hg556a.c new file +7 -0
new file mode 100644
index 0000000..d181ca6
@@ -0,0 +1,7 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
configs/huawei_hg556a_ram_defconfig new file +47 -0

47 lines not on this page · raw message

include/configs/huawei_hg556a.h new file +20 -0
new file mode 100644
index 0000000..ab64518
@@ -0,0 +1,20 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <configs/bmips_common.h>
+#include <configs/bmips_bcm6358.h>
+
+#define CONFIG_REMAKE_ELF
+
+#define CONFIG_ENV_IS_NOWHERE
+#define CONFIG_ENV_SIZE			(8 * 1024)
+
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_SYS_LONGHELP
+
+#define CONFIG_SYS_FLASH_CFI		1
+#define CONFIG_FLASH_CFI_DRIVER		1
Signature · 1 line
2.1.4
#90 lore raw

PATCH v6 10/14 MIPS: add BMIPS Huawei HG556a board

Quoted 21 lines · Álvaro Fernández Rojas

---
v6:
- Select CONFIG_BMIPS_BOOT_RAM and CONFIG_BAUDRATE in defconfig.
- Simplify board name.
v5: No changes.
v4: No changes.
v3: Add cfi-flash support.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Remove DEBUG_UART from defconfig.

 arch/mips/dts/Makefile              |  1 +
 arch/mips/dts/huawei,hg556a.dts     | 31 ++++++++++++++++++++++++
 arch/mips/mach-bmips/Kconfig        | 12 ++++++++++
 board/huawei/hg556a/Kconfig         | 12 ++++++++++
 board/huawei/hg556a/MAINTAINERS     |  6 +++++
 board/huawei/hg556a/Makefile        |  5 ++++
 board/huawei/hg556a/hg556a.c        |  7 ++++++
 configs/huawei_hg556a_ram_defconfig | 47 +++++++++++++++++++++++++++++++++++++
 include/configs/huawei_hg556a.h     | 20 ++++++++++++++++
Quoted 8 lines
 9 files changed, 141 insertions(+)
 create mode 100644 arch/mips/dts/huawei,hg556a.dts
 create mode 100644 board/huawei/hg556a/Kconfig
 create mode 100644 board/huawei/hg556a/MAINTAINERS
 create mode 100644 board/huawei/hg556a/Makefile
 create mode 100644 board/huawei/hg556a/hg556a.c
 create mode 100644 configs/huawei_hg556a_ram_defconfig
 create mode 100644 include/configs/huawei_hg556a.h
#91 lore raw

PATCH v6 10/14 MIPS: add BMIPS Huawei HG556a board

In reply to Álvaro Fernández Rojas

Am 25.04.2017 um 00:39 schrieb Álvaro Fernández Rojas:

Quoted 21 lines

---
v6:
- Select CONFIG_BMIPS_BOOT_RAM and CONFIG_BAUDRATE in defconfig.
- Simplify board name.
v5: No changes.
v4: No changes.
v3: Add cfi-flash support.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Remove DEBUG_UART from defconfig.

 arch/mips/dts/Makefile              |  1 +
 arch/mips/dts/huawei,hg556a.dts     | 31 ++++++++++++++++++++++++
 arch/mips/mach-bmips/Kconfig        | 12 ++++++++++
 board/huawei/hg556a/Kconfig         | 12 ++++++++++
 board/huawei/hg556a/MAINTAINERS     |  6 +++++
 board/huawei/hg556a/Makefile        |  5 ++++
 board/huawei/hg556a/hg556a.c        |  7 ++++++
 configs/huawei_hg556a_ram_defconfig | 47 +++++++++++++++++++++++++++++++++++++
 include/configs/huawei_hg556a.h     | 20 ++++++++++++++++
Quoted 9 lines
 9 files changed, 141 insertions(+)
 create mode 100644 arch/mips/dts/huawei,hg556a.dts
 create mode 100644 board/huawei/hg556a/Kconfig
 create mode 100644 board/huawei/hg556a/MAINTAINERS
 create mode 100644 board/huawei/hg556a/Makefile
 create mode 100644 board/huawei/hg556a/hg556a.c
 create mode 100644 configs/huawei_hg556a_ram_defconfig
 create mode 100644 include/configs/huawei_hg556a.h

applied to u-boot-mips/next, thanks!

Signature · 9 lines
- Daniel

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#92 lore raw

PATCH v6 11/14 MIPS: add support for Broadcom MIPS BCM6328 SoC family

In reply to Álvaro Fernández Rojas

---
v6: Several improvements:
- Rename reset_cntl syscon to pll_cntl.
- Reorder include config defines.
v5: No changes.
v4: No changes.
v3: No changes.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Add PERF_BASE to cpus.

 arch/mips/dts/brcm,bcm6328.dtsi | 88 +++++++++++++++++++++++++++++++++++++++++
 arch/mips/mach-bmips/Kconfig    | 12 ++++++
 include/configs/bmips_bcm6328.h | 25 ++++++++++++
 3 files changed, 125 insertions(+)
 create mode 100644 arch/mips/dts/brcm,bcm6328.dtsi
 create mode 100644 include/configs/bmips_bcm6328.h
arch/mips/dts/brcm,bcm6328.dtsi new file +88 -0
new file mode 100644
index 0000000..b287239
@@ -0,0 +1,88 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include "skeleton.dtsi"
+
+/ {
+	compatible = "brcm,bcm6328";
+
+	cpus {
+		reg = <0x10000000 0x4>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		u-boot,dm-pre-reloc;
+
+		cpu at 0 {
+			compatible = "brcm,bcm6328-cpu", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <0>;
+			u-boot,dm-pre-reloc;
+		};
+
+		cpu at 1 {
+			compatible = "brcm,bcm6328-cpu", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <1>;
+			u-boot,dm-pre-reloc;
+		};
+	};
+
+	clocks {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		u-boot,dm-pre-reloc;
+
+		periph_osc: periph-osc {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <50000000>;
+			u-boot,dm-pre-reloc;
+		};
+	};
+
+	ubus {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		u-boot,dm-pre-reloc;
+
+		pll_cntl: syscon at 10000068 {
+			compatible = "syscon";
+			reg = <0x10000068 0x4>;
+		};
+
+		syscon-reboot {
+			compatible = "syscon-reboot";
+			regmap = <&pll_cntl>;
+			offset = <0x0>;
+			mask = <0x1>;
+		};
+
+		uart0: serial at 10000100 {
+			compatible = "brcm,bcm6345-uart";
+			reg = <0x10000100 0x18>;
+			clocks = <&periph_osc>;
+
+			status = "disabled";
+		};
+
+		uart1: serial at 10000120 {
+			compatible = "brcm,bcm6345-uart";
+			reg = <0x10000120 0x18>;
+			clocks = <&periph_osc>;
+
+			status = "disabled";
+		};
+
+		memory-controller at 10003000 {
+			compatible = "brcm,bcm6328-mc";
+			reg = <0x10003000 0x1000>;
+			u-boot,dm-pre-reloc;
+		};
+	};
+};
arch/mips/mach-bmips/Kconfig +12 -0
index 0300ae3..467ba5b 100644
@@ -2,11 +2,23 @@ menu "Broadcom MIPS platforms"
 	depends on ARCH_BMIPS
 
 config SYS_SOC
+	default "bcm6328" if SOC_BMIPS_BCM6328
 	default "bcm6358" if SOC_BMIPS_BCM6358
 
 choice
 	prompt "Broadcom MIPS SoC select"
 
+config SOC_BMIPS_BCM6328
+	bool "BMIPS BCM6328 family"
+	select SUPPORTS_BIG_ENDIAN
+	select SUPPORTS_CPU_MIPS32_R1
+	select MIPS_TUNE_4KC
+	select MIPS_L1_CACHE_SHIFT_4
+	select SWAP_IO_SPACE
+	select SYSRESET_SYSCON
+	help
+	  This supports BMIPS BCM6328 family including BCM63281 and BCM63283.
+
 config SOC_BMIPS_BCM6358
 	bool "BMIPS BCM6358 family"
 	select SUPPORTS_BIG_ENDIAN
include/configs/bmips_bcm6328.h new file +25 -0
new file mode 100644
index 0000000..41c7838
@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_BMIPS_BCM6328_H
+#define __CONFIG_BMIPS_BCM6328_H
+
+/* CPU */
+#define CONFIG_SYS_MIPS_TIMER_FREQ	160000000
+
+/* RAM */
+#define CONFIG_NR_DRAM_BANKS		1
+#define CONFIG_SYS_SDRAM_BASE		0x80000000
+
+/* U-Boot */
+#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + 0x100000
+
+#if defined(CONFIG_BMIPS_BOOT_RAM)
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SYS_INIT_SP_OFFSET	0x2000
+#endif
+
+#endif /* __CONFIG_BMIPS_BCM6328_H */
Signature · 1 line
2.1.4
#93 lore raw

PATCH v6 11/14 MIPS: add support for Broadcom MIPS BCM6328 SoC family

Quoted 12 lines · Álvaro Fernández Rojas

---
v6: Several improvements:
- Rename reset_cntl syscon to pll_cntl.
- Reorder include config defines.
v5: No changes.
v4: No changes.
v3: No changes.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Add PERF_BASE to cpus.

Quoted 6 lines
 arch/mips/dts/brcm,bcm6328.dtsi | 88 +++++++++++++++++++++++++++++++++++++++++
 arch/mips/mach-bmips/Kconfig    | 12 ++++++
 include/configs/bmips_bcm6328.h | 25 ++++++++++++
 3 files changed, 125 insertions(+)
 create mode 100644 arch/mips/dts/brcm,bcm6328.dtsi
 create mode 100644 include/configs/bmips_bcm6328.h
#94 lore raw

PATCH v6 11/14 MIPS: add support for Broadcom MIPS BCM6328 SoC family

In reply to Álvaro Fernández Rojas

Am 25.04.2017 um 00:39 schrieb Álvaro Fernández Rojas:

Quoted 12 lines

---
v6: Several improvements:
- Rename reset_cntl syscon to pll_cntl.
- Reorder include config defines.
v5: No changes.
v4: No changes.
v3: No changes.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Add PERF_BASE to cpus.

Quoted 7 lines
 arch/mips/dts/brcm,bcm6328.dtsi | 88 +++++++++++++++++++++++++++++++++++++++++
 arch/mips/mach-bmips/Kconfig    | 12 ++++++
 include/configs/bmips_bcm6328.h | 25 ++++++++++++
 3 files changed, 125 insertions(+)
 create mode 100644 arch/mips/dts/brcm,bcm6328.dtsi
 create mode 100644 include/configs/bmips_bcm6328.h

applied to u-boot-mips/next, thanks!

Signature · 9 lines
- Daniel

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#95 lore raw

PATCH v6 12/14 MIPS: add BMIPS Comtrend AR-5387un board

In reply to Álvaro Fernández Rojas

---
v6:
- Select CONFIG_BMIPS_BOOT_RAM and CONFIG_BAUDRATE in defconfig.
- Simplify board name.
v5: No changes.
v4: No changes.
v3: No changes.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Remove DEBUG_UART from defconfig.

 arch/mips/dts/Makefile                  |  1 +
 arch/mips/dts/comtrend,ar-5387un.dts    | 27 ++++++++++++++++++++
 arch/mips/mach-bmips/Kconfig            |  6 +++++
 board/comtrend/ar5387un/Kconfig         | 12 +++++++++
 board/comtrend/ar5387un/MAINTAINERS     |  6 +++++
 board/comtrend/ar5387un/Makefile        |  5 ++++
 board/comtrend/ar5387un/ar-5387un.c     |  7 ++++++
 configs/comtrend_ar5387un_ram_defconfig | 44 +++++++++++++++++++++++++++++++++
 include/configs/comtrend_ar5387un.h     | 17 +++++++++++++
 9 files changed, 125 insertions(+)
 create mode 100644 arch/mips/dts/comtrend,ar-5387un.dts
 create mode 100644 board/comtrend/ar5387un/Kconfig
 create mode 100644 board/comtrend/ar5387un/MAINTAINERS
 create mode 100644 board/comtrend/ar5387un/Makefile
 create mode 100644 board/comtrend/ar5387un/ar-5387un.c
 create mode 100644 configs/comtrend_ar5387un_ram_defconfig
 create mode 100644 include/configs/comtrend_ar5387un.h
arch/mips/dts/Makefile +1 -0
index 1843b77..0805819 100644
@@ -8,6 +8,7 @@ dtb-$(CONFIG_TARGET_BOSTON) += img,boston.dtb
 dtb-$(CONFIG_TARGET_MALTA) += mti,malta.dtb
 dtb-$(CONFIG_TARGET_PIC32MZDASK) += pic32mzda_sk.dtb
 dtb-$(CONFIG_TARGET_XILFPGA) += nexys4ddr.dtb
+dtb-$(CONFIG_BOARD_COMTREND_AR5387UN) += comtrend,ar-5387un.dtb
 dtb-$(CONFIG_BOARD_HUAWEI_HG556A) += huawei,hg556a.dtb
 dtb-$(CONFIG_BOARD_TPLINK_WDR4300) += tplink_wdr4300.dtb
 
arch/mips/dts/comtrend,ar-5387un.dts new file +27 -0
new file mode 100644
index 0000000..73f3be4
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "brcm,bcm6328.dtsi"
+
+/ {
+	model = "Comtrend AR-5387un";
+	compatible = "comtrend,ar5387-un", "brcm,bcm6328";
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+};
+
+&uart0 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
arch/mips/mach-bmips/Kconfig +6 -0
index 467ba5b..e3ffcb7 100644
@@ -35,6 +35,11 @@ endchoice
 choice
 	prompt "Board select"
 
+config BOARD_COMTREND_AR5387UN
+	bool "Comtrend AR-5387un"
+	depends on SOC_BMIPS_BCM6328
+	select BMIPS_SUPPORTS_BOOT_RAM
+
 config BOARD_HUAWEI_HG556A
 	bool "Huawei EchoLife HG556a"
 	depends on SOC_BMIPS_BCM6358
@@ -58,6 +63,7 @@ endchoice
 config BMIPS_SUPPORTS_BOOT_RAM
 	bool
 
+source "board/comtrend/ar5387un/Kconfig"
 source "board/huawei/hg556a/Kconfig"
 
 endmenu
board/comtrend/ar5387un/Kconfig new file +12 -0
new file mode 100644
index 0000000..45ab7e2
@@ -0,0 +1,12 @@
+if BOARD_COMTREND_AR5387UN
+
+config SYS_BOARD
+	default "ar5387un"
+
+config SYS_VENDOR
+	default "comtrend"
+
+config SYS_CONFIG_NAME
+	default "comtrend_ar5387un"
+
+endif
board/comtrend/ar5387un/MAINTAINERS new file +6 -0
new file mode 100644
index 0000000..bcaac64
@@ -0,0 +1,6 @@
+COMTREND AR-5387UN BOARD
+M:	Álvaro Fernández Rojas <[email protected]>
+S:	Maintained
+F:	board/comtrend/ar-5387un/
+F:	include/configs/comtrend_ar5387un.h
+F:	configs/comtrend_ar5387un_ram_defconfig
board/comtrend/ar5387un/Makefile new file +5 -0
new file mode 100644
index 0000000..9de1cd2
@@ -0,0 +1,5 @@
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y += ar-5387un.o
board/comtrend/ar5387un/ar-5387un.c new file +7 -0
new file mode 100644
index 0000000..d181ca6
@@ -0,0 +1,7 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
configs/comtrend_ar5387un_ram_defconfig new file +44 -0

44 lines not on this page · raw message

include/configs/comtrend_ar5387un.h new file +17 -0
new file mode 100644
index 0000000..5d8f968
@@ -0,0 +1,17 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <configs/bmips_common.h>
+#include <configs/bmips_bcm6328.h>
+
+#define CONFIG_REMAKE_ELF
+
+#define CONFIG_ENV_IS_NOWHERE
+#define CONFIG_ENV_SIZE			(8 * 1024)
+
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_SYS_LONGHELP
Signature · 1 line
2.1.4
#96 lore raw

PATCH v6 12/14 MIPS: add BMIPS Comtrend AR-5387un board

Quoted 21 lines · Álvaro Fernández Rojas

---
v6:
- Select CONFIG_BMIPS_BOOT_RAM and CONFIG_BAUDRATE in defconfig.
- Simplify board name.
v5: No changes.
v4: No changes.
v3: No changes.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Remove DEBUG_UART from defconfig.

 arch/mips/dts/Makefile                  |  1 +
 arch/mips/dts/comtrend,ar-5387un.dts    | 27 ++++++++++++++++++++
 arch/mips/mach-bmips/Kconfig            |  6 +++++
 board/comtrend/ar5387un/Kconfig         | 12 +++++++++
 board/comtrend/ar5387un/MAINTAINERS     |  6 +++++
 board/comtrend/ar5387un/Makefile        |  5 ++++
 board/comtrend/ar5387un/ar-5387un.c     |  7 ++++++
 configs/comtrend_ar5387un_ram_defconfig | 44 +++++++++++++++++++++++++++++++++
 include/configs/comtrend_ar5387un.h     | 17 +++++++++++++
Quoted 8 lines
 9 files changed, 125 insertions(+)
 create mode 100644 arch/mips/dts/comtrend,ar-5387un.dts
 create mode 100644 board/comtrend/ar5387un/Kconfig
 create mode 100644 board/comtrend/ar5387un/MAINTAINERS
 create mode 100644 board/comtrend/ar5387un/Makefile
 create mode 100644 board/comtrend/ar5387un/ar-5387un.c
 create mode 100644 configs/comtrend_ar5387un_ram_defconfig
 create mode 100644 include/configs/comtrend_ar5387un.h
#97 lore raw

PATCH v6 12/14 MIPS: add BMIPS Comtrend AR-5387un board

In reply to Álvaro Fernández Rojas

Am 25.04.2017 um 00:39 schrieb Álvaro Fernández Rojas:

Quoted 21 lines

---
v6:
- Select CONFIG_BMIPS_BOOT_RAM and CONFIG_BAUDRATE in defconfig.
- Simplify board name.
v5: No changes.
v4: No changes.
v3: No changes.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Remove DEBUG_UART from defconfig.

 arch/mips/dts/Makefile                  |  1 +
 arch/mips/dts/comtrend,ar-5387un.dts    | 27 ++++++++++++++++++++
 arch/mips/mach-bmips/Kconfig            |  6 +++++
 board/comtrend/ar5387un/Kconfig         | 12 +++++++++
 board/comtrend/ar5387un/MAINTAINERS     |  6 +++++
 board/comtrend/ar5387un/Makefile        |  5 ++++
 board/comtrend/ar5387un/ar-5387un.c     |  7 ++++++
 configs/comtrend_ar5387un_ram_defconfig | 44 +++++++++++++++++++++++++++++++++
 include/configs/comtrend_ar5387un.h     | 17 +++++++++++++
Quoted 9 lines
 9 files changed, 125 insertions(+)
 create mode 100644 arch/mips/dts/comtrend,ar-5387un.dts
 create mode 100644 board/comtrend/ar5387un/Kconfig
 create mode 100644 board/comtrend/ar5387un/MAINTAINERS
 create mode 100644 board/comtrend/ar5387un/Makefile
 create mode 100644 board/comtrend/ar5387un/ar-5387un.c
 create mode 100644 configs/comtrend_ar5387un_ram_defconfig
 create mode 100644 include/configs/comtrend_ar5387un.h

applied to u-boot-mips/next, thanks!

Signature · 9 lines
- Daniel

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#98 lore raw

PATCH v6 13/14 MIPS: add support for Broadcom MIPS BCM63268 SoC family

In reply to Álvaro Fernández Rojas

---
v6: Several improvements:
- Rename and shrink reset_cntl syscon to pll_cntl.
- Reorder include config defines.
v5: No changes.
v4: No changes.
v3: No changes.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Add PERF_BASE to cpus.

 arch/mips/dts/brcm,bcm63268.dtsi | 88 ++++++++++++++++++++++++++++++++++++++++
 arch/mips/mach-bmips/Kconfig     | 13 ++++++
 include/configs/bmips_bcm63268.h | 25 ++++++++++++
 3 files changed, 126 insertions(+)
 create mode 100644 arch/mips/dts/brcm,bcm63268.dtsi
 create mode 100644 include/configs/bmips_bcm63268.h
arch/mips/dts/brcm,bcm63268.dtsi new file +88 -0
new file mode 100644
index 0000000..3d81047
@@ -0,0 +1,88 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include "skeleton.dtsi"
+
+/ {
+	compatible = "brcm,bcm63268";
+
+	cpus {
+		reg = <0x10000000 0x4>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		u-boot,dm-pre-reloc;
+
+		cpu at 0 {
+			compatible = "brcm,bcm63268-cpu", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <0>;
+			u-boot,dm-pre-reloc;
+		};
+
+		cpu at 1 {
+			compatible = "brcm,bcm63268-cpu", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <1>;
+			u-boot,dm-pre-reloc;
+		};
+	};
+
+	clocks {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		u-boot,dm-pre-reloc;
+
+		periph_osc: periph-osc {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <50000000>;
+			u-boot,dm-pre-reloc;
+		};
+	};
+
+	ubus {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		u-boot,dm-pre-reloc;
+
+		pll_cntl: syscon at 10000008 {
+			compatible = "syscon";
+			reg = <0x10000008 0x4>;
+		};
+
+		syscon-reboot {
+			compatible = "syscon-reboot";
+			regmap = <&pll_cntl>;
+			offset = <0x0>;
+			mask = <0x1>;
+		};
+
+		uart0: serial at 10000180 {
+			compatible = "brcm,bcm6345-uart";
+			reg = <0x10000180 0x18>;
+			clocks = <&periph_osc>;
+
+			status = "disabled";
+		};
+
+		uart1: serial at 100001a0 {
+			compatible = "brcm,bcm6345-uart";
+			reg = <0x100001a0 0x18>;
+			clocks = <&periph_osc>;
+
+			status = "disabled";
+		};
+
+		memory-controller at 10003000 {
+			compatible = "brcm,bcm6328-mc";
+			reg = <0x10003000 0x1000>;
+			u-boot,dm-pre-reloc;
+		};
+	};
+};
arch/mips/mach-bmips/Kconfig +13 -0
index e3ffcb7..b461b79 100644
@@ -4,6 +4,7 @@ menu "Broadcom MIPS platforms"
 config SYS_SOC
 	default "bcm6328" if SOC_BMIPS_BCM6328
 	default "bcm6358" if SOC_BMIPS_BCM6358
+	default "bcm63268" if SOC_BMIPS_BCM63268
 
 choice
 	prompt "Broadcom MIPS SoC select"
@@ -30,6 +31,18 @@ config SOC_BMIPS_BCM6358
 	help
 	  This supports BMIPS BCM6358 family including BCM6358 and BCM6359.
 
+config SOC_BMIPS_BCM63268
+	bool "BMIPS BCM63268 family"
+	select SUPPORTS_BIG_ENDIAN
+	select SUPPORTS_CPU_MIPS32_R1
+	select MIPS_TUNE_4KC
+	select MIPS_L1_CACHE_SHIFT_4
+	select SWAP_IO_SPACE
+	select SYSRESET_SYSCON
+	help
+	  This supports BMIPS BCM63268 family including BCM63168, BCM63169,
+	  BCM63268 and BCM63269.
+
 endchoice
 
 choice
include/configs/bmips_bcm63268.h new file +25 -0
new file mode 100644
index 0000000..ac0a670
@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_BMIPS_BCM63268_H
+#define __CONFIG_BMIPS_BCM63268_H
+
+/* CPU */
+#define CONFIG_SYS_MIPS_TIMER_FREQ	200000000
+
+/* RAM */
+#define CONFIG_NR_DRAM_BANKS		1
+#define CONFIG_SYS_SDRAM_BASE		0x80000000
+
+/* U-Boot */
+#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + 0x100000
+
+#if defined(CONFIG_BMIPS_BOOT_RAM)
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SYS_INIT_SP_OFFSET	0x2000
+#endif
+
+#endif /* __CONFIG_BMIPS_BCM63268_H */
Signature · 1 line
2.1.4
#99 lore raw

PATCH v6 13/14 MIPS: add support for Broadcom MIPS BCM63268 SoC family

Quoted 12 lines · Álvaro Fernández Rojas

---
v6: Several improvements:
- Rename and shrink reset_cntl syscon to pll_cntl.
- Reorder include config defines.
v5: No changes.
v4: No changes.
v3: No changes.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Add PERF_BASE to cpus.

Quoted 6 lines
 arch/mips/dts/brcm,bcm63268.dtsi | 88 ++++++++++++++++++++++++++++++++++++++++
 arch/mips/mach-bmips/Kconfig     | 13 ++++++
 include/configs/bmips_bcm63268.h | 25 ++++++++++++
 3 files changed, 126 insertions(+)
 create mode 100644 arch/mips/dts/brcm,bcm63268.dtsi
 create mode 100644 include/configs/bmips_bcm63268.h
#100 lore raw

PATCH v6 13/14 MIPS: add support for Broadcom MIPS BCM63268 SoC family

In reply to Álvaro Fernández Rojas

Am 25.04.2017 um 00:39 schrieb Álvaro Fernández Rojas:

Quoted 12 lines

---
v6: Several improvements:
- Rename and shrink reset_cntl syscon to pll_cntl.
- Reorder include config defines.
v5: No changes.
v4: No changes.
v3: No changes.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Add PERF_BASE to cpus.

Quoted 7 lines
 arch/mips/dts/brcm,bcm63268.dtsi | 88 ++++++++++++++++++++++++++++++++++++++++
 arch/mips/mach-bmips/Kconfig     | 13 ++++++
 include/configs/bmips_bcm63268.h | 25 ++++++++++++
 3 files changed, 126 insertions(+)
 create mode 100644 arch/mips/dts/brcm,bcm63268.dtsi
 create mode 100644 include/configs/bmips_bcm63268.h

applied to u-boot-mips/next, thanks!

Signature · 9 lines
- Daniel

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#101 lore raw

PATCH v6 14/14 MIPS: add BMIPS Comtrend VR-3032u board

In reply to Álvaro Fernández Rojas

---
v6:
- Select CONFIG_BMIPS_BOOT_RAM and CONFIG_BAUDRATE in defconfig.
- Simplify board name.
v5: No changes.
v4: No changes.
v3: No changes.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Remove DEBUG_UART from defconfig.

 arch/mips/dts/Makefile                 |  1 +
 arch/mips/dts/comtrend,vr-3032u.dts    | 27 +++++++++++++++++++++
 arch/mips/mach-bmips/Kconfig           |  6 +++++
 board/comtrend/vr3032u/Kconfig         | 12 ++++++++++
 board/comtrend/vr3032u/MAINTAINERS     |  6 +++++
 board/comtrend/vr3032u/Makefile        |  5 ++++
 board/comtrend/vr3032u/vr-3032u.c      |  7 ++++++
 configs/comtrend_vr3032u_ram_defconfig | 44 ++++++++++++++++++++++++++++++++++
 include/configs/comtrend_vr3032u.h     | 17 +++++++++++++
 9 files changed, 125 insertions(+)
 create mode 100644 arch/mips/dts/comtrend,vr-3032u.dts
 create mode 100644 board/comtrend/vr3032u/Kconfig
 create mode 100644 board/comtrend/vr3032u/MAINTAINERS
 create mode 100644 board/comtrend/vr3032u/Makefile
 create mode 100644 board/comtrend/vr3032u/vr-3032u.c
 create mode 100644 configs/comtrend_vr3032u_ram_defconfig
 create mode 100644 include/configs/comtrend_vr3032u.h
arch/mips/dts/Makefile +1 -0
index 0805819..4c02c48 100644
@@ -9,6 +9,7 @@ dtb-$(CONFIG_TARGET_MALTA) += mti,malta.dtb
 dtb-$(CONFIG_TARGET_PIC32MZDASK) += pic32mzda_sk.dtb
 dtb-$(CONFIG_TARGET_XILFPGA) += nexys4ddr.dtb
 dtb-$(CONFIG_BOARD_COMTREND_AR5387UN) += comtrend,ar-5387un.dtb
+dtb-$(CONFIG_BOARD_COMTREND_VR3032U) += comtrend,vr-3032u.dtb
 dtb-$(CONFIG_BOARD_HUAWEI_HG556A) += huawei,hg556a.dtb
 dtb-$(CONFIG_BOARD_TPLINK_WDR4300) += tplink_wdr4300.dtb
 
arch/mips/dts/comtrend,vr-3032u.dts new file +27 -0
new file mode 100644
index 0000000..6715304
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "brcm,bcm63268.dtsi"
+
+/ {
+	model = "Comtrend VR-3032u";
+	compatible = "comtrend,vr-3032u", "brcm,bcm63268";
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+};
+
+&uart0 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
arch/mips/mach-bmips/Kconfig +6 -0
index b461b79..d168448 100644
@@ -53,6 +53,11 @@ config BOARD_COMTREND_AR5387UN
 	depends on SOC_BMIPS_BCM6328
 	select BMIPS_SUPPORTS_BOOT_RAM
 
+config BOARD_COMTREND_VR3032U
+	bool "Comtrend VR-3032u board"
+	depends on SOC_BMIPS_BCM63268
+	select BMIPS_SUPPORTS_BOOT_RAM
+
 config BOARD_HUAWEI_HG556A
 	bool "Huawei EchoLife HG556a"
 	depends on SOC_BMIPS_BCM6358
@@ -77,6 +82,7 @@ config BMIPS_SUPPORTS_BOOT_RAM
 	bool
 
 source "board/comtrend/ar5387un/Kconfig"
+source "board/comtrend/vr3032u/Kconfig"
 source "board/huawei/hg556a/Kconfig"
 
 endmenu
board/comtrend/vr3032u/Kconfig new file +12 -0
new file mode 100644
index 0000000..6f552cf
@@ -0,0 +1,12 @@
+if BOARD_COMTREND_VR3032U
+
+config SYS_BOARD
+	default "vr3032u"
+
+config SYS_VENDOR
+	default "comtrend"
+
+config SYS_CONFIG_NAME
+	default "comtrend_vr3032u"
+
+endif
board/comtrend/vr3032u/MAINTAINERS new file +6 -0
new file mode 100644
index 0000000..833d7da
@@ -0,0 +1,6 @@
+COMTREND VR-3032U BOARD
+M:	Álvaro Fernández Rojas <[email protected]>
+S:	Maintained
+F:	board/comtrend/vr-3032u/
+F:	include/configs/comtrend_vr-3032u.h
+F:	configs/comtrend_vr3032u_ram_defconfig
board/comtrend/vr3032u/Makefile new file +5 -0
new file mode 100644
index 0000000..9e62031
@@ -0,0 +1,5 @@
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y += vr-3032u.o
board/comtrend/vr3032u/vr-3032u.c new file +7 -0
new file mode 100644
index 0000000..d181ca6
@@ -0,0 +1,7 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
configs/comtrend_vr3032u_ram_defconfig new file +44 -0

44 lines not on this page · raw message

include/configs/comtrend_vr3032u.h new file +17 -0
new file mode 100644
index 0000000..d45f8b3
@@ -0,0 +1,17 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <configs/bmips_common.h>
+#include <configs/bmips_bcm63268.h>
+
+#define CONFIG_REMAKE_ELF
+
+#define CONFIG_ENV_IS_NOWHERE
+#define CONFIG_ENV_SIZE			(8 * 1024)
+
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_SYS_LONGHELP
Signature · 1 line
2.1.4
#102 lore raw

PATCH v6 14/14 MIPS: add BMIPS Comtrend VR-3032u board

Quoted 21 lines · Álvaro Fernández Rojas

---
v6:
- Select CONFIG_BMIPS_BOOT_RAM and CONFIG_BAUDRATE in defconfig.
- Simplify board name.
v5: No changes.
v4: No changes.
v3: No changes.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Remove DEBUG_UART from defconfig.

 arch/mips/dts/Makefile                 |  1 +
 arch/mips/dts/comtrend,vr-3032u.dts    | 27 +++++++++++++++++++++
 arch/mips/mach-bmips/Kconfig           |  6 +++++
 board/comtrend/vr3032u/Kconfig         | 12 ++++++++++
 board/comtrend/vr3032u/MAINTAINERS     |  6 +++++
 board/comtrend/vr3032u/Makefile        |  5 ++++
 board/comtrend/vr3032u/vr-3032u.c      |  7 ++++++
 configs/comtrend_vr3032u_ram_defconfig | 44 ++++++++++++++++++++++++++++++++++
 include/configs/comtrend_vr3032u.h     | 17 +++++++++++++
Quoted 8 lines
 9 files changed, 125 insertions(+)
 create mode 100644 arch/mips/dts/comtrend,vr-3032u.dts
 create mode 100644 board/comtrend/vr3032u/Kconfig
 create mode 100644 board/comtrend/vr3032u/MAINTAINERS
 create mode 100644 board/comtrend/vr3032u/Makefile
 create mode 100644 board/comtrend/vr3032u/vr-3032u.c
 create mode 100644 configs/comtrend_vr3032u_ram_defconfig
 create mode 100644 include/configs/comtrend_vr3032u.h
#103 lore raw

PATCH v6 14/14 MIPS: add BMIPS Comtrend VR-3032u board

In reply to Álvaro Fernández Rojas

Am 25.04.2017 um 00:39 schrieb Álvaro Fernández Rojas:

Quoted 21 lines

---
v6:
- Select CONFIG_BMIPS_BOOT_RAM and CONFIG_BAUDRATE in defconfig.
- Simplify board name.
v5: No changes.
v4: No changes.
v3: No changes.
v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Remove DEBUG_UART from defconfig.

 arch/mips/dts/Makefile                 |  1 +
 arch/mips/dts/comtrend,vr-3032u.dts    | 27 +++++++++++++++++++++
 arch/mips/mach-bmips/Kconfig           |  6 +++++
 board/comtrend/vr3032u/Kconfig         | 12 ++++++++++
 board/comtrend/vr3032u/MAINTAINERS     |  6 +++++
 board/comtrend/vr3032u/Makefile        |  5 ++++
 board/comtrend/vr3032u/vr-3032u.c      |  7 ++++++
 configs/comtrend_vr3032u_ram_defconfig | 44 ++++++++++++++++++++++++++++++++++
 include/configs/comtrend_vr3032u.h     | 17 +++++++++++++
Quoted 9 lines
 9 files changed, 125 insertions(+)
 create mode 100644 arch/mips/dts/comtrend,vr-3032u.dts
 create mode 100644 board/comtrend/vr3032u/Kconfig
 create mode 100644 board/comtrend/vr3032u/MAINTAINERS
 create mode 100644 board/comtrend/vr3032u/Makefile
 create mode 100644 board/comtrend/vr3032u/vr-3032u.c
 create mode 100644 configs/comtrend_vr3032u_ram_defconfig
 create mode 100644 include/configs/comtrend_vr3032u.h

applied to u-boot-mips/next, thanks!

Signature · 9 lines
- Daniel

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