Patch "clk: sunxi: Add apb0 gates for H3" has been added to the 4.4-stable tree

This is a note to let you know that I've just added the patch titled

clk: sunxi: Add apb0 gates for H3

to the 4.4-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
clk-sunxi-add-apb0-gates-for-h3.patch
and it can be found in the queue-4.4 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.

From: Krzysztof Adamski <[email protected]>
Date: Mon, 22 Feb 2016 14:03:25 +0100
Subject: clk: sunxi: Add apb0 gates for H3

From: Krzysztof Adamski <[email protected]>

commit 6e17b4181603d183d20c73f4535529ddf2a2a020 upstream.

This patch adds support for APB0 in H3. It seems to be compatible with earlier SOCs. apb0 gates controls R_ block peripherals (R_PIO, R_IR, etc).

Since this gates behave just like any Allwinner clock gate, add a generic compatible that can be reused if we don't have any clock to protect.

[Maxime: Removed the H3 compatible from the simple-gates driver, reworked
the commit log a bit]

---
 Documentation/devicetree/bindings/clock/sunxi.txt |    2 ++
 drivers/clk/sunxi/clk-simple-gates.c              |    2 ++
 2 files changed, 4 insertions(+)

@@ -18,6 +18,7 @@ Required properties:
 	"allwinner,sun4i-a10-cpu-clk" - for the CPU multiplexer clock
 	"allwinner,sun4i-a10-axi-clk" - for the AXI clock
 	"allwinner,sun8i-a23-axi-clk" - for the AXI clock on A23
+	"allwinner,sun4i-a10-gates-clk" - for generic gates on all compatible SoCs
 	"allwinner,sun4i-a10-axi-gates-clk" - for the AXI gates
 	"allwinner,sun4i-a10-ahb-clk" - for the AHB clock
 	"allwinner,sun5i-a13-ahb-clk" - for the AHB clock on A13

@@ -43,6 +44,7 @@ Required properties:
 	"allwinner,sun6i-a31-apb0-gates-clk" - for the APB0 gates on A31
 	"allwinner,sun7i-a20-apb0-gates-clk" - for the APB0 gates on A20
 	"allwinner,sun8i-a23-apb0-gates-clk" - for the APB0 gates on A23
+	"allwinner,sun8i-h3-apb0-gates-clk" - for the APB0 gates on H3
 	"allwinner,sun9i-a80-apb0-gates-clk" - for the APB0 gates on A80
 	"allwinner,sun4i-a10-apb1-clk" - for the APB1 clock
 	"allwinner,sun9i-a80-apb1-clk" - for the APB1 bus clock on A80

@@ -98,6 +98,8 @@ static void __init sunxi_simple_gates_in
 	sunxi_simple_gates_setup(node, NULL, 0);
 }
 
+CLK_OF_DECLARE(sun4i_a10_gates, "allwinner,sun4i-a10-gates-clk",
+	       sunxi_simple_gates_init);
 CLK_OF_DECLARE(sun4i_a10_apb0, "allwinner,sun4i-a10-apb0-gates-clk",
 	       sunxi_simple_gates_init);
 CLK_OF_DECLARE(sun4i_a10_apb1, "allwinner,sun4i-a10-apb1-gates-clk",

Patches currently in stable-queue which might be from [email protected] are

queue-4.4/clk-sunxi-add-apb0-gates-for-h3.patch