dm: clk: add BCM6345 gated clock controller support

PATCH Superseded Álvaro Fernández Rojas 3 participants 18 messages May 3, 2017 – May 10, 2017

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Álvaro Fernández Rojas

author

2017-05-03 13:09 UTC #0 lore raw

cover dm: clk: add BCM6345 gated clock controller support

Broadcom MIPS SoCs have gated clock controllers which only allow enabling and disabling each peripheral clock.
Changing clock rates is not possible on these SoCs.

Álvaro Fernández Rojas (5):
dm: clk: add BCM6345 clock driver
mips: bmips: add bcm6345-clk driver support for BCM6358
mips: bmips: add bcm6345-clk driver support for BCM6328
mips: bmips: add bcm6345-clk driver support for BCM63268
mips: bmips: enable bcm6345-clk driver for all BMIPS boards

 arch/mips/dts/brcm,bcm63268.dtsi           | 13 +++++
 arch/mips/dts/brcm,bcm6328.dtsi            |  7 +++
 arch/mips/dts/brcm,bcm6358.dtsi            |  7 +++
 configs/comtrend_ar5387un_ram_defconfig    |  1 +
 configs/comtrend_vr3032u_ram_defconfig     |  1 +
 configs/huawei_hg556a_ram_defconfig        |  1 +
 configs/sfr_nb4-ser_ram_defconfig          |  1 +
 drivers/clk/Kconfig                        |  8 +++
 drivers/clk/Makefile                       |  1 +
 drivers/clk/clk_bcm6345.c                  | 78 ++++++++++++++++++++++++++++++
 include/dt-bindings/clock/bcm63268-clock.h | 52 ++++++++++++++++++++
 include/dt-bindings/clock/bcm6328-clock.h  | 25 ++++++++++
 include/dt-bindings/clock/bcm6358-clock.h  | 24 +++++++++
 13 files changed, 219 insertions(+)
 create mode 100644 drivers/clk/clk_bcm6345.c
 create mode 100644 include/dt-bindings/clock/bcm63268-clock.h
 create mode 100644 include/dt-bindings/clock/bcm6328-clock.h
 create mode 100644 include/dt-bindings/clock/bcm6358-clock.h

Signature · 1 line

2.1.4

Álvaro Fernández Rojas

author

2017-05-03 13:09 UTC #1 lore raw

PATCH 1/5 dm: clk: add BCM6345 clock driver

This is a simplified version of linux/arch/mips/bcm63xx/clk.c

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
 drivers/clk/Kconfig       |  8 +++++
 drivers/clk/Makefile      |  1 +
 drivers/clk/clk_bcm6345.c | 78 +++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 87 insertions(+)
 create mode 100644 drivers/clk/clk_bcm6345.c

drivers/clk/Kconfig +8 -0

index 5ca958c..fa3fbe2 100644
@@ -20,6 +20,14 @@ config SPL_CLK
 	  setting up clocks within SPL, and allows the same drivers to be
 	  used as U-Boot proper.
 
+config CLK_BCM6345
+	bool "Enable clock driver support for BCM6345"
+	depends on CLK && ARCH_BMIPS
+	default y
+	help
+	  This clock driver adds support for clock realted settings for
+	  BCM6345.
+
 config CLK_BOSTON
 	def_bool y if TARGET_BOSTON
 	depends on CLK

drivers/clk/Makefile +1 -0

index 01a8cd6..2746a80 100644
@@ -17,6 +17,7 @@ obj-y += tegra/
 obj-$(CONFIG_CLK_UNIPHIER) += uniphier/
 obj-$(CONFIG_CLK_EXYNOS) += exynos/
 obj-$(CONFIG_CLK_AT91) += at91/
+obj-$(CONFIG_CLK_BCM6345) += clk_bcm6345.o
 obj-$(CONFIG_CLK_BOSTON) += clk_boston.o
 obj-$(CONFIG_ARCH_ASPEED) += aspeed/
 obj-$(CONFIG_STM32F7) += clk_stm32f7.o

drivers/clk/clk_bcm6345.c new file +78 -0

78 lines not on this page · raw message

Signature · 1 line

2.1.4

Simon Glass

2017-05-04 16:51 UTC #2 lore raw

PATCH 1/5 dm: clk: add BCM6345 clock driver

Hi Alvarao,

Quoted 9 lines · Álvaro Fernández Rojas

This is a simplified version of linux/arch/mips/bcm63xx/clk.c
Signed-off-by Álvaro Fernández Rojas <[email protected]>
---
 drivers/clk/Kconfig       |  8 +++++
 drivers/clk/Makefile      |  1 +
 drivers/clk/clk_bcm6345.c | 78 +++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 87 insertions(+)
 create mode 100644 drivers/clk/clk_bcm6345.c

Reviewed-by Simon Glass <[email protected]>

nits below

Quoted 6 lines

drivers/clk/Kconfig +0 -0
index 5ca958c..fa3fbe2 100644

drivers/clk/Kconfig config SPL_CLK · line 29

Quoted 10 lines

drivers/clk/Kconfig +7 -0

@@ -20,6 +20,14 @@ config SPL_CLK
          setting up clocks within SPL, and allows the same drivers to be
          used as U-Boot proper.
 
+config CLK_BCM6345
+       bool "Enable clock driver support for BCM6345"
+       depends on CLK && ARCH_BMIPS
+       default y
+       help
+         This clock driver adds support for clock realted settings for
+         BCM6345.

Can you give a bit more detail here? Does it support all clocks?

Quoted 23 lines

drivers/clk/Kconfig +1 -0

+
 config CLK_BOSTON
        def_bool y if TARGET_BOSTON
        depends on CLK

drivers/clk/Makefile +1 -0

index 01a8cd6..2746a80 100644
@@ -17,6 +17,7 @@ obj-y += tegra/
 obj-$(CONFIG_CLK_UNIPHIER) += uniphier/
 obj-$(CONFIG_CLK_EXYNOS) += exynos/
 obj-$(CONFIG_CLK_AT91) += at91/
+obj-$(CONFIG_CLK_BCM6345) += clk_bcm6345.o
 obj-$(CONFIG_CLK_BOSTON) += clk_boston.o
 obj-$(CONFIG_ARCH_ASPEED) += aspeed/
 obj-$(CONFIG_STM32F7) += clk_stm32f7.o

drivers/clk/clk_bcm6345.c new file +1 -0

new file mode 100644
index 0000000..0b52079
@@ -0,0 +1,78 @@
+/*

drivers/clk/clk_bcm6345.c line 11

Quoted 10 lines

drivers/clk/clk_bcm6345.c new file +10 -0

+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/arch/mips/bcm63xx/clk.c:
+ *     Copyright (C) 2008 Maxime Bizon <[email protected]>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <clk-uclass.h>
+#include <common.h>

This should always go first.

Regards,
Simon

Álvaro Fernández Rojas

author

2017-05-03 13:09 UTC #3 lore raw

PATCH 2/5 mips: bmips: add bcm6345-clk driver support for BCM6358

In reply to Álvaro Fernández Rojas

This driver can control up to 32 clocks.

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
 arch/mips/dts/brcm,bcm6358.dtsi           |  7 +++++++
 include/dt-bindings/clock/bcm6358-clock.h | 24 ++++++++++++++++++++++++
 2 files changed, 31 insertions(+)
 create mode 100644 include/dt-bindings/clock/bcm6358-clock.h

arch/mips/dts/brcm,bcm6358.dtsi +7 -0

index edd0002..369c240 100644
@@ -4,6 +4,7 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
+#include <dt-bindings/clock/bcm6358-clock.h>
 #include <dt-bindings/gpio/gpio.h>
 #include "skeleton.dtsi"

@@ -43,6 +44,12 @@
 			clock-frequency = <50000000>;
 			u-boot,dm-pre-reloc;
 		};
+
+		periph_clk: periph-clk {
+			compatible = "brcm,bcm6345-clk";
+			reg = <0xfffe0004 0x4>;
+			#clock-cells = <1>;
+		};
 	};
 
 	pflash: nor at 1e000000 {

include/dt-bindings/clock/bcm6358-clock.h new file +24 -0

new file mode 100644
index 0000000..ff22321
@@ -0,0 +1,24 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_BCM6358_H
+#define __DT_BINDINGS_CLOCK_BCM6358_H
+
+#define BCM6358_CLK_ENET	4
+#define BCM6358_CLK_ADSL	5
+#define BCM6358_CLK_PCM		8
+#define BCM6358_CLK_SPI		9
+#define BCM6358_CLK_USBS	10
+#define BCM6358_CLK_SAR		11
+#define BCM6358_CLK_EMUSB	17
+#define BCM6358_CLK_ENET0	18
+#define BCM6358_CLK_ENET1	19
+#define BCM6358_CLK_USBSU	20
+#define BCM6358_CLK_EPHY	21
+
+#endif /* __DT_BINDINGS_CLOCK_BCM6358_H */

Signature · 1 line

2.1.4

Simon Glass

2017-05-04 16:51 UTC #4 lore raw

PATCH 2/5 mips: bmips: add bcm6345-clk driver support for BCM6358

Quoted 8 lines · Álvaro Fernández Rojas

This driver can control up to 32 clocks.

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
 arch/mips/dts/brcm,bcm6358.dtsi           |  7 +++++++
 include/dt-bindings/clock/bcm6358-clock.h | 24 ++++++++++++++++++++++++
 2 files changed, 31 insertions(+)
 create mode 100644 include/dt-bindings/clock/bcm6358-clock.h

Reviewed-by Simon Glass <[email protected]>

Álvaro Fernández Rojas

author

2017-05-03 13:09 UTC #5 lore raw

PATCH 3/5 mips: bmips: add bcm6345-clk driver support for BCM6328

In reply to Álvaro Fernández Rojas

This driver can control up to 32 clocks.

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
 arch/mips/dts/brcm,bcm6328.dtsi           |  7 +++++++
 include/dt-bindings/clock/bcm6328-clock.h | 25 +++++++++++++++++++++++++
 2 files changed, 32 insertions(+)
 create mode 100644 include/dt-bindings/clock/bcm6328-clock.h

arch/mips/dts/brcm,bcm6328.dtsi +7 -0

index a5b43ae..6b5c5dd 100644
@@ -4,6 +4,7 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
+#include <dt-bindings/clock/bcm6328-clock.h>
 #include <dt-bindings/gpio/gpio.h>
 #include "skeleton.dtsi"

@@ -43,6 +44,12 @@
 			clock-frequency = <50000000>;
 			u-boot,dm-pre-reloc;
 		};
+
+		periph_clk: periph-clk {
+			compatible = "brcm,bcm6345-clk";
+			reg = <0x10000004 0x4>;
+			#clock-cells = <1>;
+		};
 	};
 
 	ubus {

include/dt-bindings/clock/bcm6328-clock.h new file +25 -0

new file mode 100644
index 0000000..5d0fc11
@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_BCM6328_H
+#define __DT_BINDINGS_CLOCK_BCM6328_H
+
+#define BCM6328_CLK_PHYMIPS	0
+#define BCM6328_CLK_ADSL_QPROC	1
+#define BCM6328_CLK_ADSL_AFE	2
+#define BCM6328_CLK_ADSL	3
+#define BCM6328_CLK_MIPS	4
+#define BCM6328_CLK_SAR		5
+#define BCM6328_CLK_PCM		6
+#define BCM6328_CLK_USBD	7
+#define BCM6328_CLK_USBH	8
+#define BCM6328_CLK_HSSPI	9
+#define BCM6328_CLK_PCIE	10
+#define BCM6328_CLK_ROBOSW	11
+
+#endif /* __DT_BINDINGS_CLOCK_BCM6328_H */

Signature · 1 line

2.1.4

Simon Glass

2017-05-04 16:51 UTC #6 lore raw

PATCH 3/5 mips: bmips: add bcm6345-clk driver support for BCM6328

Quoted 9 lines · Álvaro Fernández Rojas

This driver can control up to 32 clocks.

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
 arch/mips/dts/brcm,bcm6328.dtsi           |  7 +++++++
 include/dt-bindings/clock/bcm6328-clock.h | 25 +++++++++++++++++++++++++
 2 files changed, 32 insertions(+)
 create mode 100644 include/dt-bindings/clock/bcm6328-clock.h

Reviewed-by Simon Glass <[email protected]>

Álvaro Fernández Rojas

author

2017-05-03 13:09 UTC #7 lore raw

PATCH 4/5 mips: bmips: add bcm6345-clk driver support for BCM63268

In reply to Álvaro Fernández Rojas

This driver can control up to 32 clocks.

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
 arch/mips/dts/brcm,bcm63268.dtsi           | 13 ++++++++
 include/dt-bindings/clock/bcm63268-clock.h | 52 ++++++++++++++++++++++++++++++
 2 files changed, 65 insertions(+)
 create mode 100644 include/dt-bindings/clock/bcm63268-clock.h

arch/mips/dts/brcm,bcm63268.dtsi +13 -0

index 11c6729..4d02024 100644
@@ -4,6 +4,7 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
+#include <dt-bindings/clock/bcm63268-clock.h>
 #include <dt-bindings/gpio/gpio.h>
 #include "skeleton.dtsi"

@@ -43,6 +44,18 @@
 			clock-frequency = <50000000>;
 			u-boot,dm-pre-reloc;
 		};
+
+		periph_clk: periph-clk {
+			compatible = "brcm,bcm6345-clk";
+			reg = <0x10000004 0x4>;
+			#clock-cells = <1>;
+		};
+
+		timer_clk: timer-clk {
+			compatible = "brcm,bcm6345-clk";
+			reg = <0x100000ac 0x4>;
+			#clock-cells = <1>;
+		};
 	};
 
 	ubus {

include/dt-bindings/clock/bcm63268-clock.h new file +52 -0

52 lines not on this page · raw message

Signature · 1 line

2.1.4

Simon Glass

2017-05-04 16:51 UTC #8 lore raw

PATCH 4/5 mips: bmips: add bcm6345-clk driver support for BCM63268

Quoted 8 lines · Álvaro Fernández Rojas

This driver can control up to 32 clocks.

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
 arch/mips/dts/brcm,bcm63268.dtsi           | 13 ++++++++
 include/dt-bindings/clock/bcm63268-clock.h | 52 ++++++++++++++++++++++++++++++
 2 files changed, 65 insertions(+)
 create mode 100644 include/dt-bindings/clock/bcm63268-clock.h

Reviewed-by Simon Glass <[email protected]>

Álvaro Fernández Rojas

author

2017-05-03 13:09 UTC #9 lore raw

PATCH 5/5 mips: bmips: enable bcm6345-clk driver for all BMIPS boards

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
 configs/comtrend_ar5387un_ram_defconfig | 1 +
 configs/comtrend_vr3032u_ram_defconfig  | 1 +
 configs/huawei_hg556a_ram_defconfig     | 1 +
 configs/sfr_nb4-ser_ram_defconfig       | 1 +
 4 files changed, 4 insertions(+)

configs/comtrend_ar5387un_ram_defconfig +1 -0

index f8656c4..55cb4bf 100644
@@ -1,5 +1,6 @@
 CONFIG_ARCH_BMIPS=y
 CONFIG_BAUDRATE=115200
+CONFIG_BCM6345_CLK=y
 CONFIG_BCM6345_SERIAL=y
 CONFIG_BMIPS_BOOT_RAM=y
 CONFIG_BOARD_COMTREND_AR5387UN=y

configs/comtrend_vr3032u_ram_defconfig +1 -0

index a04b0e5..7f13d24 100644
@@ -1,5 +1,6 @@
 CONFIG_ARCH_BMIPS=y
 CONFIG_BAUDRATE=115200
+CONFIG_BCM6345_CLK=y
 CONFIG_BCM6345_SERIAL=y
 CONFIG_BMIPS_BOOT_RAM=y
 CONFIG_BOARD_COMTREND_VR3032U=y

configs/huawei_hg556a_ram_defconfig +1 -0

index ccfdf1d..71e1163 100644
@@ -1,5 +1,6 @@
 CONFIG_ARCH_BMIPS=y
 CONFIG_BAUDRATE=115200
+CONFIG_BCM6345_CLK=y
 CONFIG_BCM6345_GPIO=y
 CONFIG_BCM6345_SERIAL=y
 CONFIG_BMIPS_BOOT_RAM=y

configs/sfr_nb4-ser_ram_defconfig +1 -0

index 8b885e3..cd6c4a2 100644
@@ -1,5 +1,6 @@
 CONFIG_ARCH_BMIPS=y
 CONFIG_BAUDRATE=115200
+CONFIG_BCM6345_CLK=y
 CONFIG_BCM6345_GPIO=y
 CONFIG_BCM6345_SERIAL=y
 CONFIG_BMIPS_BOOT_RAM=y

Signature · 1 line

2.1.4

Simon Glass

2017-05-04 16:51 UTC #10 lore raw

PATCH 5/5 mips: bmips: enable bcm6345-clk driver for all BMIPS boards

2017-05-03 7:09 GMT-06:00 Álvaro Fernández Rojas <[email protected]>:

Quoted 8 lines

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
 configs/comtrend_ar5387un_ram_defconfig | 1 +
 configs/comtrend_vr3032u_ram_defconfig  | 1 +
 configs/huawei_hg556a_ram_defconfig     | 1 +
 configs/sfr_nb4-ser_ram_defconfig       | 1 +
 4 files changed, 4 insertions(+)

Reviewed-by Simon Glass <[email protected]>

You might consider adding an imply to your Kconfig somewhere.

Álvaro Fernández Rojas

author

2017-05-07 18:13 UTC #11 lore raw

v2 cover dm: clk: add BCM6345 gated clock controller support

In reply to Álvaro Fernández Rojas

Broadcom MIPS SoCs have gated clock controllers which only allow enabling and disabling each peripheral clock.
Changing clock rates is not possible on these SoCs.

v2: Introduce changes suggested by Simon Glass

 arch/mips/dts/brcm,bcm63268.dtsi           | 13 +++++
 arch/mips/dts/brcm,bcm6328.dtsi            |  7 +++
 arch/mips/dts/brcm,bcm6358.dtsi            |  7 +++
 configs/comtrend_ar5387un_ram_defconfig    |  1 +
 configs/comtrend_vr3032u_ram_defconfig     |  1 +
 configs/huawei_hg556a_ram_defconfig        |  1 +
 configs/sfr_nb4-ser_ram_defconfig          |  1 +
 drivers/clk/Kconfig                        |  8 +++
 drivers/clk/Makefile                       |  1 +
 drivers/clk/clk_bcm6345.c                  | 78 ++++++++++++++++++++++++++++++
 include/dt-bindings/clock/bcm63268-clock.h | 52 ++++++++++++++++++++
 include/dt-bindings/clock/bcm6328-clock.h  | 25 ++++++++++
 include/dt-bindings/clock/bcm6358-clock.h  | 24 +++++++++
 13 files changed, 219 insertions(+)
 create mode 100644 drivers/clk/clk_bcm6345.c
 create mode 100644 include/dt-bindings/clock/bcm63268-clock.h
 create mode 100644 include/dt-bindings/clock/bcm6328-clock.h
 create mode 100644 include/dt-bindings/clock/bcm6358-clock.h

Signature · 1 line

2.1.4

Álvaro Fernández Rojas

author

2017-05-07 18:13 UTC #12 lore raw

PATCH v2 1/5 dm: clk: add BCM6345 clock driver

This is a simplified version of linux/arch/mips/bcm63xx/clk.c

Signed-off-by Álvaro Fernández Rojas <[email protected]>

Reviewed-by Simon Glass <[email protected]>

---
v2: Introduce changes suggested by Simon Glass:
- Swap common.h include to the beginning.
- Add a more detailed description.
- Switch to fdtdec_get_bool().

 drivers/clk/Kconfig       |  8 +++++
 drivers/clk/Makefile      |  1 +
 drivers/clk/clk_bcm6345.c | 78 +++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 87 insertions(+)
 create mode 100644 drivers/clk/clk_bcm6345.c

drivers/clk/Kconfig +8 -0

index 5ca958c..44da716 100644
@@ -20,6 +20,14 @@ config SPL_CLK
 	  setting up clocks within SPL, and allows the same drivers to be
 	  used as U-Boot proper.
 
+config CLK_BCM6345
+	bool "Clock controller driver for BCM6345"
+	depends on CLK && ARCH_BMIPS
+	default y
+	help
+	  This clock driver adds support for enabling and disabling peripheral
+	  clocks on BCM6345 SoCs. HW has no rate changing capabilities.
+
 config CLK_BOSTON
 	def_bool y if TARGET_BOSTON
 	depends on CLK

drivers/clk/Makefile +1 -0

index 01a8cd6..2746a80 100644
@@ -17,6 +17,7 @@ obj-y += tegra/
 obj-$(CONFIG_CLK_UNIPHIER) += uniphier/
 obj-$(CONFIG_CLK_EXYNOS) += exynos/
 obj-$(CONFIG_CLK_AT91) += at91/
+obj-$(CONFIG_CLK_BCM6345) += clk_bcm6345.o
 obj-$(CONFIG_CLK_BOSTON) += clk_boston.o
 obj-$(CONFIG_ARCH_ASPEED) += aspeed/
 obj-$(CONFIG_STM32F7) += clk_stm32f7.o

drivers/clk/clk_bcm6345.c new file +78 -0

78 lines not on this page · raw message

Signature · 1 line

2.1.4

Álvaro Fernández Rojas

author

2017-05-07 18:13 UTC #13 lore raw

PATCH v2 2/5 mips: bmips: add bcm6345-clk driver support for BCM6358

In reply to Álvaro Fernández Rojas

This driver can control up to 32 clocks.

Signed-off-by Álvaro Fernández Rojas <[email protected]>

Reviewed-by Simon Glass <[email protected]>

---
v2: no changes.

 arch/mips/dts/brcm,bcm6358.dtsi           |  7 +++++++
 include/dt-bindings/clock/bcm6358-clock.h | 24 ++++++++++++++++++++++++
 2 files changed, 31 insertions(+)
 create mode 100644 include/dt-bindings/clock/bcm6358-clock.h

arch/mips/dts/brcm,bcm6358.dtsi +7 -0

index edd0002..369c240 100644
@@ -4,6 +4,7 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
+#include <dt-bindings/clock/bcm6358-clock.h>
 #include <dt-bindings/gpio/gpio.h>
 #include "skeleton.dtsi"

@@ -43,6 +44,12 @@
 			clock-frequency = <50000000>;
 			u-boot,dm-pre-reloc;
 		};
+
+		periph_clk: periph-clk {
+			compatible = "brcm,bcm6345-clk";
+			reg = <0xfffe0004 0x4>;
+			#clock-cells = <1>;
+		};
 	};
 
 	pflash: nor at 1e000000 {

include/dt-bindings/clock/bcm6358-clock.h new file +24 -0

new file mode 100644
index 0000000..ff22321
@@ -0,0 +1,24 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_BCM6358_H
+#define __DT_BINDINGS_CLOCK_BCM6358_H
+
+#define BCM6358_CLK_ENET	4
+#define BCM6358_CLK_ADSL	5
+#define BCM6358_CLK_PCM		8
+#define BCM6358_CLK_SPI		9
+#define BCM6358_CLK_USBS	10
+#define BCM6358_CLK_SAR		11
+#define BCM6358_CLK_EMUSB	17
+#define BCM6358_CLK_ENET0	18
+#define BCM6358_CLK_ENET1	19
+#define BCM6358_CLK_USBSU	20
+#define BCM6358_CLK_EPHY	21
+
+#endif /* __DT_BINDINGS_CLOCK_BCM6358_H */

Signature · 1 line

2.1.4

Álvaro Fernández Rojas

author

2017-05-07 18:13 UTC #14 lore raw

PATCH v2 3/5 mips: bmips: add bcm6345-clk driver support for BCM6328

In reply to Álvaro Fernández Rojas

This driver can control up to 32 clocks.

Signed-off-by Álvaro Fernández Rojas <[email protected]>

Reviewed-by Simon Glass <[email protected]>

---
v2: no changes.

 arch/mips/dts/brcm,bcm6328.dtsi           |  7 +++++++
 include/dt-bindings/clock/bcm6328-clock.h | 25 +++++++++++++++++++++++++
 2 files changed, 32 insertions(+)
 create mode 100644 include/dt-bindings/clock/bcm6328-clock.h

arch/mips/dts/brcm,bcm6328.dtsi +7 -0

index a5b43ae..6b5c5dd 100644
@@ -4,6 +4,7 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
+#include <dt-bindings/clock/bcm6328-clock.h>
 #include <dt-bindings/gpio/gpio.h>
 #include "skeleton.dtsi"

@@ -43,6 +44,12 @@
 			clock-frequency = <50000000>;
 			u-boot,dm-pre-reloc;
 		};
+
+		periph_clk: periph-clk {
+			compatible = "brcm,bcm6345-clk";
+			reg = <0x10000004 0x4>;
+			#clock-cells = <1>;
+		};
 	};
 
 	ubus {

include/dt-bindings/clock/bcm6328-clock.h new file +25 -0

new file mode 100644
index 0000000..5d0fc11
@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <[email protected]>
+ *
+ * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_BCM6328_H
+#define __DT_BINDINGS_CLOCK_BCM6328_H
+
+#define BCM6328_CLK_PHYMIPS	0
+#define BCM6328_CLK_ADSL_QPROC	1
+#define BCM6328_CLK_ADSL_AFE	2
+#define BCM6328_CLK_ADSL	3
+#define BCM6328_CLK_MIPS	4
+#define BCM6328_CLK_SAR		5
+#define BCM6328_CLK_PCM		6
+#define BCM6328_CLK_USBD	7
+#define BCM6328_CLK_USBH	8
+#define BCM6328_CLK_HSSPI	9
+#define BCM6328_CLK_PCIE	10
+#define BCM6328_CLK_ROBOSW	11
+
+#endif /* __DT_BINDINGS_CLOCK_BCM6328_H */

Signature · 1 line

2.1.4

Álvaro Fernández Rojas

author

2017-05-07 18:13 UTC #15 lore raw

PATCH v2 4/5 mips: bmips: add bcm6345-clk driver support for BCM63268

In reply to Álvaro Fernández Rojas

This driver can control up to 32 clocks.

Signed-off-by Álvaro Fernández Rojas <[email protected]>

Reviewed-by Simon Glass <[email protected]>

---
v2: no changes.

 arch/mips/dts/brcm,bcm63268.dtsi           | 13 ++++++++
 include/dt-bindings/clock/bcm63268-clock.h | 52 ++++++++++++++++++++++++++++++
 2 files changed, 65 insertions(+)
 create mode 100644 include/dt-bindings/clock/bcm63268-clock.h

arch/mips/dts/brcm,bcm63268.dtsi +13 -0

index 11c6729..4d02024 100644
@@ -4,6 +4,7 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
+#include <dt-bindings/clock/bcm63268-clock.h>
 #include <dt-bindings/gpio/gpio.h>
 #include "skeleton.dtsi"

@@ -43,6 +44,18 @@
 			clock-frequency = <50000000>;
 			u-boot,dm-pre-reloc;
 		};
+
+		periph_clk: periph-clk {
+			compatible = "brcm,bcm6345-clk";
+			reg = <0x10000004 0x4>;
+			#clock-cells = <1>;
+		};
+
+		timer_clk: timer-clk {
+			compatible = "brcm,bcm6345-clk";
+			reg = <0x100000ac 0x4>;
+			#clock-cells = <1>;
+		};
 	};
 
 	ubus {

include/dt-bindings/clock/bcm63268-clock.h new file +52 -0

52 lines not on this page · raw message

Signature · 1 line

2.1.4

Álvaro Fernández Rojas

author

2017-05-07 18:13 UTC #16 lore raw

PATCH v2 5/5 mips: bmips: enable bcm6345-clk driver for all BMIPS boards

In reply to Álvaro Fernández Rojas

Signed-off-by Álvaro Fernández Rojas <[email protected]>

Reviewed-by Simon Glass <[email protected]>

---
v2: no changes.

 configs/comtrend_ar5387un_ram_defconfig | 1 +
 configs/comtrend_vr3032u_ram_defconfig  | 1 +
 configs/huawei_hg556a_ram_defconfig     | 1 +
 configs/sfr_nb4-ser_ram_defconfig       | 1 +
 4 files changed, 4 insertions(+)

configs/comtrend_ar5387un_ram_defconfig +1 -0

index f8656c4..55cb4bf 100644
@@ -1,5 +1,6 @@
 CONFIG_ARCH_BMIPS=y
 CONFIG_BAUDRATE=115200
+CONFIG_BCM6345_CLK=y
 CONFIG_BCM6345_SERIAL=y
 CONFIG_BMIPS_BOOT_RAM=y
 CONFIG_BOARD_COMTREND_AR5387UN=y

configs/comtrend_vr3032u_ram_defconfig +1 -0

index a04b0e5..7f13d24 100644
@@ -1,5 +1,6 @@
 CONFIG_ARCH_BMIPS=y
 CONFIG_BAUDRATE=115200
+CONFIG_BCM6345_CLK=y
 CONFIG_BCM6345_SERIAL=y
 CONFIG_BMIPS_BOOT_RAM=y
 CONFIG_BOARD_COMTREND_VR3032U=y

configs/huawei_hg556a_ram_defconfig +1 -0

index ccfdf1d..71e1163 100644
@@ -1,5 +1,6 @@
 CONFIG_ARCH_BMIPS=y
 CONFIG_BAUDRATE=115200
+CONFIG_BCM6345_CLK=y
 CONFIG_BCM6345_GPIO=y
 CONFIG_BCM6345_SERIAL=y
 CONFIG_BMIPS_BOOT_RAM=y

configs/sfr_nb4-ser_ram_defconfig +1 -0

index 8b885e3..cd6c4a2 100644
@@ -1,5 +1,6 @@
 CONFIG_ARCH_BMIPS=y
 CONFIG_BAUDRATE=115200
+CONFIG_BCM6345_CLK=y
 CONFIG_BCM6345_GPIO=y
 CONFIG_BCM6345_SERIAL=y
 CONFIG_BMIPS_BOOT_RAM=y

Signature · 1 line

2.1.4

Daniel Schwierzeck

2017-05-10 14:19 UTC #17 lore raw

v2 cover dm: clk: add BCM6345 gated clock controller support

In reply to Álvaro Fernández Rojas

Am 07.05.2017 um 20:13 schrieb Álvaro Fernández Rojas:

Quoted 23 lines

Broadcom MIPS SoCs have gated clock controllers which only allow enabling and disabling each peripheral clock.
Changing clock rates is not possible on these SoCs.
v2: Introduce changes suggested by Simon Glass
Álvaro Fernández Rojas (5):
dm: clk: add BCM6345 clock driver
mips: bmips: add bcm6345-clk driver support for BCM6358
mips: bmips: add bcm6345-clk driver support for BCM6328
mips: bmips: add bcm6345-clk driver support for BCM63268
mips: bmips: enable bcm6345-clk driver for all BMIPS boards
 arch/mips/dts/brcm,bcm63268.dtsi           | 13 +++++
 arch/mips/dts/brcm,bcm6328.dtsi            |  7 +++
 arch/mips/dts/brcm,bcm6358.dtsi            |  7 +++
 configs/comtrend_ar5387un_ram_defconfig    |  1 +
 configs/comtrend_vr3032u_ram_defconfig     |  1 +
 configs/huawei_hg556a_ram_defconfig        |  1 +
 configs/sfr_nb4-ser_ram_defconfig          |  1 +
 drivers/clk/Kconfig                        |  8 +++
 drivers/clk/Makefile                       |  1 +
 drivers/clk/clk_bcm6345.c                  | 78 ++++++++++++++++++++++++++++++

Quoted 9 lines

 include/dt-bindings/clock/bcm63268-clock.h | 52 ++++++++++++++++++++
 include/dt-bindings/clock/bcm6328-clock.h  | 25 ++++++++++
 include/dt-bindings/clock/bcm6358-clock.h  | 24 +++++++++
 13 files changed, 219 insertions(+)
 create mode 100644 drivers/clk/clk_bcm6345.c
 create mode 100644 include/dt-bindings/clock/bcm63268-clock.h
 create mode 100644 include/dt-bindings/clock/bcm6328-clock.h
 create mode 100644 include/dt-bindings/clock/bcm6358-clock.h

series applied to u-boot-mips/next, thanks

Signature · 9 lines

- Daniel

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