Add Intel Arria 10 SoC FPGA driver

PATCH Superseded tien.fong.chee at intel.com 4 participants 15 messages May 24, 2017 – May 29, 2017

Subsystems (4)

Arm (32-bit) Arm sub-architectures FPGA manager framework Arm/socfpga architecture

lore

Share & tools

lore

tien.fong.chee at intel.com

author

2017-05-24 02:24 UTC #0 lore raw

v6 cover Add Intel Arria 10 SoC FPGA driver

From: Tien Fong Chee <[email protected]>

This is the 6th version of patchset to adds support for Intel Arria 10 SoC FPGA driver. This version mainly resolved comments from Dinh in [v5]. This series is working on top of u-boot-socfpga-next branch
http://git.denx.de/?p=u-boot/u-boot-socfpga.git;a=shortlog;h=refs/heads/next.

[v5]: https://www.mail-archive.com/u-boot at lists.denx.de/msg250517.html

v5 -> v6 changes:
-----------------
- Created separate patch for enabling FPGA driver support.

Patchset history
----------------
[v1]: https://www.mail-archive.com/u-boot at lists.denx.de/msg247788.html [v2]: https://www.mail-archive.com/u-boot at lists.denx.de/msg248541.html [v3]: https://www.mail-archive.com/u-boot at lists.denx.de/msg249160.html [v4]: https://www.mail-archive.com/u-boot at lists.denx.de/msg250149.html

Tien Fong Chee (6):
arm: socfpga: Remove unused passing parameter of socfpga_bridges_reset
arm: socfpga: Restructure FPGA driver in the preparation to support

A10

arm: socfpga: Enable FPGA driver on SPL
arm: socfpga: Enable FPGA driver build on SPL
arm: socfpga: Move FPGA manager driver to FPGA driver
arm: socfpga: Add FPGA driver support for Arria 10

 arch/arm/mach-socfpga/Makefile                     |   1 -
 arch/arm/mach-socfpga/fpga_manager.c               |  78 ----
 arch/arm/mach-socfpga/include/mach/fpga_manager.h  |  70 +--
 .../include/mach/fpga_manager_arria10.h            | 100 +++++
 .../mach/{fpga_manager.h => fpga_manager_gen5.h}   |  69 ++-
 .../include/mach/reset_manager_arria10.h           |   2 +-
 arch/arm/mach-socfpga/reset_manager_arria10.c      |   4 +-
 drivers/Makefile                                   |   1 +
 drivers/fpga/Makefile                              |   2 +
 drivers/fpga/socfpga.c                             | 241 +----------
 drivers/fpga/socfpga_arria10.c                     | 479 +++++++++++++++++++++
 drivers/fpga/{socfpga.c => socfpga_gen5.c}         |  98 ++---
 include/configs/socfpga_common.h                   |   4 +-
 13 files changed, 685 insertions(+), 464 deletions(-)
 delete mode 100644 arch/arm/mach-socfpga/fpga_manager.c
 create mode 100644 arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h
 copy arch/arm/mach-socfpga/include/mach/{fpga_manager.h => fpga_manager_gen5.h} (57%)
 create mode 100644 drivers/fpga/socfpga_arria10.c
 copy drivers/fpga/{socfpga.c => socfpga_gen5.c} (85%)

Signature · 1 line

2.2.0

tien.fong.chee at intel.com

author

2017-05-24 02:24 UTC #1 lore raw

PATCH v6 1/6 arm: socfpga: Remove unused passing parameter of socfpga_bridges_reset

From: Tien Fong Chee <[email protected]>

Remove parameter from socfpga_bridges_reset(), and keeping this function for single purpose which is just triggering reset on bridges. socfpga_reset_deassert_bridges_handoff() can be called for releasing reset on any bridges based on the bridge setting defined in fdt.

Signed-off-by Tien Fong Chee <[email protected]>

---
 arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h | 2 +-
 arch/arm/mach-socfpga/reset_manager_arria10.c              | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h +1 -1

index 7922db8..b6d7f4f 100644
@@ -17,7 +17,7 @@ int socfpga_reset_deassert_bridges_handoff(void);
 void socfpga_reset_assert_fpga_connected_peripherals(void);
 void socfpga_reset_deassert_osc1wd0(void);
 void socfpga_reset_uart(int assert);
-int socfpga_bridges_reset(int enable);
+int socfpga_bridges_reset(void);
 
 struct socfpga_reset_manager {
 	u32	stat;

arch/arm/mach-socfpga/reset_manager_arria10.c +2 -2

index d8c858c..66f1ec2 100644
@@ -318,13 +318,13 @@ void socfpga_per_reset_all(void)
 }
 
 #if defined(CONFIG_SOCFPGA_VIRTUAL_TARGET)
-int socfpga_bridges_reset(int enable)
+int socfpga_bridges_reset(void)
 {
 	/* For SoCFPGA-VT, this is NOP. */
 	return 0;
 }
 #else
-int socfpga_bridges_reset(int enable)
+int socfpga_bridges_reset(void)
 {
 	int ret;

Signature · 1 line

2.2.0

tien.fong.chee at intel.com

author

2017-05-24 02:24 UTC #2 lore raw

PATCH v6 2/6 arm: socfpga: Restructure FPGA driver in the preparation to support A10

In reply to tien.fong.chee at intel.com

From: Tien Fong Chee <[email protected]>

Move FPGA driver which is Gen5 specific code into Gen5 driver file and keeping common FPGA driver intact. All the changes are still keeping in driver/fpga/ and no functional change. Subsequent patch would move FPGA manager driver from arch/arm into driver/fpga/.

Signed-off-by Tien Fong Chee <[email protected]>

---
 arch/arm/mach-socfpga/Makefile                     |   2 +-
 arch/arm/mach-socfpga/include/mach/fpga_manager.h  |  68 +-----
 .../mach/{fpga_manager.h => fpga_manager_gen5.h}   |  69 +++---
 drivers/fpga/Makefile                              |   1 +
 drivers/fpga/socfpga.c                             | 241 +--------------------
 drivers/fpga/{socfpga.c => socfpga_gen5.c}         |  54 +----
 6 files changed, 49 insertions(+), 386 deletions(-)
 copy arch/arm/mach-socfpga/include/mach/{fpga_manager.h => fpga_manager_gen5.h} (57%)
 copy drivers/fpga/{socfpga.c => socfpga_gen5.c} (83%)

arch/arm/mach-socfpga/Makefile +1 -1

index 41b779c..286bfef 100644
@@ -9,7 +9,6 @@
 
 obj-y	+= board.o
 obj-y	+= clock_manager.o
-obj-y	+= fpga_manager.o
 obj-y	+= misc.o
 obj-y	+= reset_manager.o
 obj-y	+= timer.o

@@ -21,6 +20,7 @@ obj-y	+= reset_manager_gen5.o
 obj-y	+= scan_manager.o
 obj-y	+= system_manager_gen5.o
 obj-y	+= wrap_pll_config.o
+obj-y	+= fpga_manager.o
 endif
 
 ifdef CONFIG_TARGET_SOCFPGA_ARRIA10

arch/arm/mach-socfpga/include/mach/fpga_manager.h +12 ~~-56~~

84 lines not on this page · raw message

arch/arm/mach-socfpga/include/mach/fpga_manager_gen5.h renamed from arch/arm/mach-socfpga/include/mach/fpga_manager.h +30 ~~-39~~

83 lines not on this page · raw message

drivers/fpga/Makefile +1 -0

index 777706f..b65e5ba 100644
@@ -20,4 +20,5 @@ obj-$(CONFIG_FPGA_CYCLON2) += cyclon2.o
 obj-$(CONFIG_FPGA_STRATIX_II) += stratixII.o
 obj-$(CONFIG_FPGA_STRATIX_V) += stratixv.o
 obj-$(CONFIG_FPGA_SOCFPGA) += socfpga.o
+obj-$(CONFIG_TARGET_SOCFPGA_GEN5) += socfpga_gen5.o
 endif

drivers/fpga/socfpga.c +4 ~~-237~~

262 lines not on this page · raw message

drivers/fpga/socfpga_gen5.c renamed from drivers/fpga/socfpga.c +1 ~~-53~~

72 lines not on this page · raw message

Signature · 1 line

2.2.0

tien.fong.chee at intel.com

author

2017-05-24 02:24 UTC #3 lore raw

PATCH v6 3/6 arm: socfpga: Enable FPGA driver on SPL

In reply to tien.fong.chee at intel.com

From: Tien Fong Chee <[email protected]>

This patch is for enabling the FPGA driver support on SPL.

Signed-off-by Tien Fong Chee <[email protected]>

---
 include/configs/socfpga_common.h | 1 +
 1 file changed, 1 insertion(+)

include/configs/socfpga_common.h +1 -0

index da7e4ad..e74e7eb 100644
@@ -110,6 +110,7 @@
 #define CONFIG_FPGA
 #define CONFIG_FPGA_ALTERA
 #define CONFIG_FPGA_SOCFPGA
+#define CONFIG_SPL_FPGA_SUPPORT
 #define CONFIG_FPGA_COUNT		1
 #endif
 #endif

Signature · 1 line

2.2.0

tien.fong.chee at intel.com

author

2017-05-24 02:24 UTC #4 lore raw

PATCH v6 4/6 arm: socfpga: Enable FPGA driver build on SPL

In reply to tien.fong.chee at intel.com

From: Tien Fong Chee <[email protected]>

Enable FPGA driver build for SPL because FPGA driver is needed for SPL to configure and getting DDR up before loading U-boot into DDR and booting from there.

Signed-off-by Tien Fong Chee <[email protected]>

---
 drivers/Makefile | 1 +
 1 file changed, 1 insertion(+)

drivers/Makefile +1 -0

index 4a4b237..bb35c9a 100644
@@ -47,6 +47,7 @@ obj-$(CONFIG_OMAP_USB_PHY) += usb/phy/
 obj-$(CONFIG_SPL_SATA_SUPPORT) += block/
 obj-$(CONFIG_SPL_USB_HOST_SUPPORT) += block/
 obj-$(CONFIG_SPL_MMC_SUPPORT) += block/
+obj-$(CONFIG_SPL_FPGA_SUPPORT) += fpga/
 endif
 
 ifdef CONFIG_TPL_BUILD

Signature · 1 line

2.2.0

tien.fong.chee at intel.com

author

2017-05-24 02:24 UTC #5 lore raw

PATCH v6 5/6 arm: socfpga: Move FPGA manager driver to FPGA driver

In reply to tien.fong.chee at intel.com

From: Tien Fong Chee <[email protected]>

Move FPGA manager driver which is Gen5 specific code from arch/arm/ into FPGA driver at driver/fpga/. No functional change.

Signed-off-by Tien Fong Chee <[email protected]>

---
 arch/arm/mach-socfpga/Makefile       |  1 -
 arch/arm/mach-socfpga/fpga_manager.c | 78 ------------------------------------
 drivers/fpga/socfpga_gen5.c          | 54 +++++++++++++++++++++++++
 3 files changed, 54 insertions(+), 79 deletions(-)
 delete mode 100644 arch/arm/mach-socfpga/fpga_manager.c

arch/arm/mach-socfpga/Makefile +0 -1

index 286bfef..824cd8e 100644
@@ -20,7 +20,6 @@ obj-y	+= reset_manager_gen5.o
 obj-y	+= scan_manager.o
 obj-y	+= system_manager_gen5.o
 obj-y	+= wrap_pll_config.o
-obj-y	+= fpga_manager.o
 endif
 
 ifdef CONFIG_TARGET_SOCFPGA_ARRIA10

arch/arm/mach-socfpga/fpga_manager.c deleted +0 ~~-78~~

78 lines not on this page · raw message

drivers/fpga/socfpga_gen5.c +54 -0

60 lines not on this page · raw message

Signature · 1 line

2.2.0

tien.fong.chee at intel.com

author

2017-05-24 02:24 UTC #6 lore raw

PATCH v6 6/6 arm: socfpga: Add FPGA driver support for Arria 10

In reply to tien.fong.chee at intel.com

From: Tien Fong Chee <[email protected]>

Add FPGA driver support for Arria 10.

Signed-off-by Tien Fong Chee <[email protected]>

---
 arch/arm/mach-socfpga/include/mach/fpga_manager.h  |   2 +
 .../include/mach/fpga_manager_arria10.h            | 100 +++++
 drivers/fpga/Makefile                              |   1 +
 drivers/fpga/socfpga_arria10.c                     | 479 +++++++++++++++++++++
 include/configs/socfpga_common.h                   |   3 +-
 5 files changed, 583 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h
 create mode 100644 drivers/fpga/socfpga_arria10.c

arch/arm/mach-socfpga/include/mach/fpga_manager.h +2 -0

index b046c2c..a21c716 100644
@@ -12,6 +12,8 @@
 
 #if defined(CONFIG_TARGET_SOCFPGA_GEN5)
 #include <asm/arch/fpga_manager_gen5.h>
+#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
+#include <asm/arch/fpga_manager_arria10.h>
 #endif
 
 /* FPGA CD Ratio Value */

arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h new file +100 -0

100 lines not on this page · raw message

drivers/fpga/Makefile +1 -0

index b65e5ba..08c9ff8 100644
@@ -21,4 +21,5 @@ obj-$(CONFIG_FPGA_STRATIX_II) += stratixII.o
 obj-$(CONFIG_FPGA_STRATIX_V) += stratixv.o
 obj-$(CONFIG_FPGA_SOCFPGA) += socfpga.o
 obj-$(CONFIG_TARGET_SOCFPGA_GEN5) += socfpga_gen5.o
+obj-$(CONFIG_TARGET_SOCFPGA_ARRIA10) += socfpga_arria10.o
 endif

drivers/fpga/socfpga_arria10.c new file +479 -0

479 lines not on this page · raw message

include/configs/socfpga_common.h +1 -2

index e74e7eb..9edcd2d 100644
@@ -105,7 +105,6 @@
 /*
  * FPGA Driver
  */
-#ifdef CONFIG_TARGET_SOCFPGA_GEN5
 #ifdef CONFIG_CMD_FPGA
 #define CONFIG_FPGA
 #define CONFIG_FPGA_ALTERA

@@ -113,7 +112,7 @@
 #define CONFIG_SPL_FPGA_SUPPORT
 #define CONFIG_FPGA_COUNT		1
 #endif
-#endif
+
 /*
  * L4 OSC1 Timer 0
  */

Signature · 1 line

2.2.0

Dinh Nguyen

maintainer

2017-05-24 14:56 UTC #7 lore raw

v6 cover Add Intel Arria 10 SoC FPGA driver

In reply to tien.fong.chee at intel.com

Quoted 7 lines · tien.fong.chee at intel.com

From: Tien Fong Chee <[email protected]>
This is the 6th version of patchset to adds support for Intel Arria 10 SoC FPGA driver. This version mainly resolved comments from Dinh in [v5]. This series is working on top of u-boot-socfpga-next branch
http://git.denx.de/?p=u-boot/u-boot-socfpga.git;a=shortlog;h=refs/heads/next.

Quoted 6 lines

[v5]: https://www.mail-archive.com/u-boot at lists.denx.de/msg250517.html
v5 -> v6 changes:
-----------------
- Created separate patch for enabling FPGA driver support.

Please consider at least doing a compile test for this patch series? I'm now very skeptical that you've done any kind of testing on this patch series? :(

For 'make socfpga_cyclone5_defconfig:

arch/arm/mach-socfpga/built-in.o: In function `socfpga_bridges_reset':
/home/dinguyen/linux_dev/u-boot/arch/arm/mach-socfpga/reset_manager_gen5.c:101:
undefined reference to fpgamgr_test_fpga_ready' arch/arm/mach-socfpga/built-in.o: In function populate_sysmgr_fpgaintf_module':
/home/dinguyen/linux_dev/u-boot/arch/arm/mach-socfpga/system_manager_gen5.c:48:
undefined reference to fpgamgr_test_fpga_ready' drivers/built-in.o: In function sdram_mmr_init_full':
/home/dinguyen/linux_dev/u-boot/drivers/ddr/altera/sdram.c:448:
undefined reference to `fpgamgr_test_fpga_ready' scripts/Makefile.spl:334: recipe for target 'spl/u-boot-spl' failed make[1]: *** [spl/u-boot-spl] Error 1
Makefile:1347: recipe for target 'spl/u-boot-spl' failed
make: *** [spl/u-boot-spl] Error 2

For socfpga_arria10_defconfig:

arch/arm/mach-socfpga/built-in.o: In function `socfpga_fpga_add':
/home/dinguyen/linux_dev/u-boot/arch/arm/mach-socfpga/misc.c:110:
undefined reference to `fpga_init' /home/dinguyen/linux_dev/u-boot/arch/arm/mach-socfpga/misc.c:112:
undefined reference to `fpga_add' scripts/Makefile.spl:334: recipe for target 'spl/u-boot-spl' failed make[1]: *** [spl/u-boot-spl] Error 1
Makefile:1347: recipe for target 'spl/u-boot-spl' failed
make: *** [spl/u-boot-spl] Error 2

Dinh

Chee

2017-05-25 08:53 UTC #8 lore raw

v6 cover Add Intel Arria 10 SoC FPGA driver

Quoted 57 lines · Dinh Nguyen

Quoted 10 lines · tien.fong.chee at intel.com
From: Tien Fong Chee <[email protected]>
This is the 6th version of patchset to adds support for Intel Arria 10 SoC FPGA
driver. This version mainly resolved comments from Dinh in [v5]. This series is working on top of u-boot-socfpga-next branch
http://git.denx.de/?p=u-boot/u-boot-socfpga.git;a=shortlog;h=refs/h
eads/next.
Quoted 7 lines
[v5]: https://www.mail-archive.com/u-boot at lists.denx.de/msg250517.h tml
v5 -> v6 changes:
-----------------
- Created separate patch for enabling FPGA driver support.
Please consider at least doing a compile test for this patch series? I'm
now very skeptical that you've done any kind of testing on this patch series? :(
For 'make socfpga_cyclone5_defconfig:
arch/arm/mach-socfpga/built-in.o: In function `socfpga_bridges_reset':
/home/dinguyen/linux_dev/u-boot/arch/arm/mach- socfpga/reset_manager_gen5.c:101:
undefined reference to fpgamgr_test_fpga_ready' arch/arm/mach-socfpga/built-in.o: In function populate_sysmgr_fpgaintf_module':
/home/dinguyen/linux_dev/u-boot/arch/arm/mach- socfpga/system_manager_gen5.c:48:
undefined reference to fpgamgr_test_fpga_ready' drivers/built-in.o: In function sdram_mmr_init_full':
/home/dinguyen/linux_dev/u-boot/drivers/ddr/altera/sdram.c:448:
undefined reference to `fpgamgr_test_fpga_ready' scripts/Makefile.spl:334: recipe for target 'spl/u-boot-spl' failed make[1]: *** [spl/u-boot-spl] Error 1
Makefile:1347: recipe for target 'spl/u-boot-spl' failed
make: *** [spl/u-boot-spl] Error 2
For socfpga_arria10_defconfig:
arch/arm/mach-socfpga/built-in.o: In function `socfpga_fpga_add':
/home/dinguyen/linux_dev/u-boot/arch/arm/mach-socfpga/misc.c:110:
undefined reference to `fpga_init' /home/dinguyen/linux_dev/u-boot/arch/arm/mach-socfpga/misc.c:112:
undefined reference to `fpga_add' scripts/Makefile.spl:334: recipe for target 'spl/u-boot-spl' failed make[1]: *** [spl/u-boot-spl] Error 1
Makefile:1347: recipe for target 'spl/u-boot-spl' failed
make: *** [spl/u-boot-spl] Error 2

Quoted 1 line

Dinh

I did the compilation on each patch, and testing the patch set on all arria10, cyclone5 and arria10 devkit.

I suspect something wrong with v6-0005-arm-socfpga-Move-FPGA-manager- driver-to-FPGA-driv.patch you applied. Could you help me check again and confirm all the patches waere applied properly?

In the meantime, i will clone the lastet from mainstream to confirm again. This cloning need take a few hours to finish.

Thanks.

Marek Vasut

2017-05-25 09:18 UTC #9 lore raw

v6 cover Add Intel Arria 10 SoC FPGA driver

Quoted 63 lines · Tien Fong

Quoted 57 lines · Dinh Nguyen
Quoted 10 lines · tien.fong.chee at intel.com
From: Tien Fong Chee <[email protected]>
This is the 6th version of patchset to adds support for Intel Arria 10 SoC FPGA
driver. This version mainly resolved comments from Dinh in [v5]. This series is working on top of u-boot-socfpga-next branch
http://git.denx.de/?p=u-boot/u-boot-socfpga.git;a=shortlog;h=refs/h
eads/next.
Quoted 7 lines
[v5]: https://www.mail-archive.com/u-boot at lists.denx.de/msg250517.h tml
v5 -> v6 changes:
-----------------
- Created separate patch for enabling FPGA driver support.
Please consider at least doing a compile test for this patch series? I'm
now very skeptical that you've done any kind of testing on this patch series? :(
For 'make socfpga_cyclone5_defconfig:
arch/arm/mach-socfpga/built-in.o: In function `socfpga_bridges_reset':
/home/dinguyen/linux_dev/u-boot/arch/arm/mach- socfpga/reset_manager_gen5.c:101:
undefined reference to fpgamgr_test_fpga_ready' arch/arm/mach-socfpga/built-in.o: In function populate_sysmgr_fpgaintf_module':
/home/dinguyen/linux_dev/u-boot/arch/arm/mach- socfpga/system_manager_gen5.c:48:
undefined reference to fpgamgr_test_fpga_ready' drivers/built-in.o: In function sdram_mmr_init_full':
/home/dinguyen/linux_dev/u-boot/drivers/ddr/altera/sdram.c:448:
undefined reference to `fpgamgr_test_fpga_ready' scripts/Makefile.spl:334: recipe for target 'spl/u-boot-spl' failed make[1]: *** [spl/u-boot-spl] Error 1
Makefile:1347: recipe for target 'spl/u-boot-spl' failed
make: *** [spl/u-boot-spl] Error 2
For socfpga_arria10_defconfig:
arch/arm/mach-socfpga/built-in.o: In function `socfpga_fpga_add':
/home/dinguyen/linux_dev/u-boot/arch/arm/mach-socfpga/misc.c:110:
undefined reference to `fpga_init' /home/dinguyen/linux_dev/u-boot/arch/arm/mach-socfpga/misc.c:112:
undefined reference to `fpga_add' scripts/Makefile.spl:334: recipe for target 'spl/u-boot-spl' failed make[1]: *** [spl/u-boot-spl] Error 1
Makefile:1347: recipe for target 'spl/u-boot-spl' failed
make: *** [spl/u-boot-spl] Error 2
Quoted 1 line
Dinh
I did the compilation on each patch, and testing the patch set on all arria10, cyclone5 and arria10 devkit.

Quoted 6 lines

I suspect something wrong with v6-0005-arm-socfpga-Move-FPGA-manager- driver-to-FPGA-driv.patch you applied. Could you help me check again and confirm all the patches waere applied properly?
In the meantime, i will clone the lastet from mainstream to confirm again. This cloning need take a few hours to finish.

Do you know git fetch origin ? That'll fetch only the new blobs, you don't need to fetch the whole repo again ...

Signature · 2 lines

Best regards,
Marek Vasut

Chee

2017-05-26 02:36 UTC #10 lore raw

v6 cover Add Intel Arria 10 SoC FPGA driver

Quoted 81 lines · Marek Vasut

Quoted 80 lines · Tien Fong
Quoted 67 lines · Dinh Nguyen
Quoted 14 lines · tien.fong.chee at intel.com
From: Tien Fong Chee <[email protected]>
This is the 6th version of patchset to adds support for Intel Arria
10 SoC FPGA
driver. This version mainly resolved comments from Dinh in [v5].
This series is working on top of u-boot-socfpga-next branch
http://git.denx.de/?p=u-boot/u-boot-socfpga.git;a=shortlog;h=re
fs/h
eads/next.
Quoted 8 lines
[v5]: https://www.mail-archive.com/u-boot at lists.denx.de/msg2505 17.h
tml
v5 -> v6 changes:
-----------------
- Created separate patch for enabling FPGA driver support.
Please consider at least doing a compile test for this patch series?
I'm
now very skeptical that you've done any kind of testing on this patch
series? :(
For 'make socfpga_cyclone5_defconfig:
arch/arm/mach-socfpga/built-in.o: In function `socfpga_bridges_reset':
/home/dinguyen/linux_dev/u-boot/arch/arm/mach- socfpga/reset_manager_gen5.c:101:
undefined reference to fpgamgr_test_fpga_ready' arch/arm/mach-socfpga/built-in.o: In function populate_sysmgr_fpgaintf_module':
/home/dinguyen/linux_dev/u-boot/arch/arm/mach- socfpga/system_manager_gen5.c:48:
undefined reference to fpgamgr_test_fpga_ready' drivers/built-in.o: In function sdram_mmr_init_full':
/home/dinguyen/linux_dev/u-boot/drivers/ddr/altera/sdram.c:448:
undefined reference to `fpgamgr_test_fpga_ready' scripts/Makefile.spl:334: recipe for target 'spl/u-boot-spl' failed
make[1]: *** [spl/u-boot-spl] Error 1
Makefile:1347: recipe for target 'spl/u-boot-spl' failed
make: *** [spl/u-boot-spl] Error 2
For socfpga_arria10_defconfig:
arch/arm/mach-socfpga/built-in.o: In function `socfpga_fpga_add':
/home/dinguyen/linux_dev/u-boot/arch/arm/mach-socfpga/misc.c:110:
undefined reference to `fpga_init' /home/dinguyen/linux_dev/u-boot/arch/arm/mach-socfpga/misc.c:112:
undefined reference to `fpga_add' scripts/Makefile.spl:334: recipe for target 'spl/u-boot-spl' failed
make[1]: *** [spl/u-boot-spl] Error 1
Makefile:1347: recipe for target 'spl/u-boot-spl' failed
make: *** [spl/u-boot-spl] Error 2
Quoted 1 line
Dinh
I did the compilation on each patch, and testing the patch set on all
arria10, cyclone5 and arria10 devkit.
I suspect something wrong with v6-0005-arm-socfpga-Move-FPGA- manager-
driver-to-FPGA-driv.patch you applied. Could you help me check again
and confirm all the patches waere applied properly?

Quoted 5 lines

Quoted 2 lines
In the meantime, i will clone the lastet from mainstream to confirm again. This cloning need take a few hours to finish.
Do you know git fetch origin ? That'll fetch only the new blobs, you don't need to fetch the whole repo again ...

Yeah, i don't have u-boot.git, so i need to clone it. In the meantime, i also run git fetch origin on u-boot-socfpga.git. Due to our company tight security, both also need a few hours.

Dinh Nguyen

maintainer

2017-05-25 13:35 UTC #11 lore raw

v6 cover Add Intel Arria 10 SoC FPGA driver

In reply to Chee

Quoted 58 lines · Tien Fong

Quoted 57 lines · Dinh Nguyen
Quoted 10 lines · tien.fong.chee at intel.com
From: Tien Fong Chee <[email protected]>
This is the 6th version of patchset to adds support for Intel Arria 10 SoC FPGA
driver. This version mainly resolved comments from Dinh in [v5]. This series is working on top of u-boot-socfpga-next branch
http://git.denx.de/?p=u-boot/u-boot-socfpga.git;a=shortlog;h=refs/h
eads/next.
Quoted 7 lines
[v5]: https://www.mail-archive.com/u-boot at lists.denx.de/msg250517.h tml
v5 -> v6 changes:
-----------------
- Created separate patch for enabling FPGA driver support.
Please consider at least doing a compile test for this patch series? I'm
now very skeptical that you've done any kind of testing on this patch series? :(
For 'make socfpga_cyclone5_defconfig:
arch/arm/mach-socfpga/built-in.o: In function `socfpga_bridges_reset':
/home/dinguyen/linux_dev/u-boot/arch/arm/mach- socfpga/reset_manager_gen5.c:101:
undefined reference to fpgamgr_test_fpga_ready' arch/arm/mach-socfpga/built-in.o: In function populate_sysmgr_fpgaintf_module':
/home/dinguyen/linux_dev/u-boot/arch/arm/mach- socfpga/system_manager_gen5.c:48:
undefined reference to fpgamgr_test_fpga_ready' drivers/built-in.o: In function sdram_mmr_init_full':
/home/dinguyen/linux_dev/u-boot/drivers/ddr/altera/sdram.c:448:
undefined reference to `fpgamgr_test_fpga_ready' scripts/Makefile.spl:334: recipe for target 'spl/u-boot-spl' failed make[1]: *** [spl/u-boot-spl] Error 1
Makefile:1347: recipe for target 'spl/u-boot-spl' failed
make: *** [spl/u-boot-spl] Error 2
For socfpga_arria10_defconfig:
arch/arm/mach-socfpga/built-in.o: In function `socfpga_fpga_add':
/home/dinguyen/linux_dev/u-boot/arch/arm/mach-socfpga/misc.c:110:
undefined reference to `fpga_init' /home/dinguyen/linux_dev/u-boot/arch/arm/mach-socfpga/misc.c:112:
undefined reference to `fpga_add' scripts/Makefile.spl:334: recipe for target 'spl/u-boot-spl' failed make[1]: *** [spl/u-boot-spl] Error 1
Makefile:1347: recipe for target 'spl/u-boot-spl' failed
make: *** [spl/u-boot-spl] Error 2

Quoted 9 lines

Quoted 1 line
Dinh
I did the compilation on each patch, and testing the patch set on all arria10, cyclone5 and arria10 devkit.
I suspect something wrong with v6-0005-arm-socfpga-Move-FPGA-manager- driver-to-FPGA-driv.patch you applied. Could you help me check again and confirm all the patches waere applied properly?

Yes, I've applied all of your patches correctly. The only diff between this series and the last is:

$ git diff tien_fong_fpga_a10_v5

drivers/Makefile +0 -1

index b4a2230..4a4b237 100644
@@ -47,7 +47,6 @@ obj-$(CONFIG_OMAP_USB_PHY) += usb/phy/
 obj-$(CONFIG_SPL_SATA_SUPPORT) += block/
 obj-$(CONFIG_SPL_USB_HOST_SUPPORT) += block/
 obj-$(CONFIG_SPL_MMC_SUPPORT) += block/
-obj-$(CONFIG_FPGA) += fpga/
 endif
 
 ifdef CONFIG_TPL_BUILD

(quoted diff) +0 -0

b/include/configs/socfpga_common.h
index 913b9f1..9edcd2d 100644

include/configs/socfpga_common.h +1 -0

@@ -109,6 +109,7 @@
 #define CONFIG_FPGA
 #define CONFIG_FPGA_ALTERA
 #define CONFIG_FPGA_SOCFPGA
+#define CONFIG_SPL_FPGA_SUPPORT
 #define CONFIG_FPGA_COUNT              1
 #endif

So the patch for using CONFIG_SPL_FPGA_SUPPORT is causing this build error. Please investigate.

Dinh

Chee

2017-05-26 08:48 UTC #12 lore raw

v6 cover Add Intel Arria 10 SoC FPGA driver

Quoted 115 lines · Dinh Nguyen

Quoted 74 lines · Tien Fong
Quoted 67 lines · Dinh Nguyen
Quoted 14 lines · tien.fong.chee at intel.com
From: Tien Fong Chee <[email protected]>
This is the 6th version of patchset to adds support for Intel Arria
10 SoC FPGA
driver. This version mainly resolved comments from Dinh in [v5].
This series is working on top of u-boot-socfpga-next branch
http://git.denx.de/?p=u-boot/u-boot-socfpga.git;a=shortlog;h=re
fs/h
eads/next.
Quoted 8 lines
[v5]: https://www.mail-archive.com/u-boot at lists.denx.de/msg2505 17.h
tml
v5 -> v6 changes:
-----------------
- Created separate patch for enabling FPGA driver support.
Please consider at least doing a compile test for this patch series?
I'm
now very skeptical that you've done any kind of testing on this patch
series? :(
For 'make socfpga_cyclone5_defconfig:
arch/arm/mach-socfpga/built-in.o: In function `socfpga_bridges_reset':
/home/dinguyen/linux_dev/u-boot/arch/arm/mach- socfpga/reset_manager_gen5.c:101:
undefined reference to fpgamgr_test_fpga_ready' arch/arm/mach-socfpga/built-in.o: In function populate_sysmgr_fpgaintf_module':
/home/dinguyen/linux_dev/u-boot/arch/arm/mach- socfpga/system_manager_gen5.c:48:
undefined reference to fpgamgr_test_fpga_ready' drivers/built-in.o: In function sdram_mmr_init_full':
/home/dinguyen/linux_dev/u-boot/drivers/ddr/altera/sdram.c:448:
undefined reference to `fpgamgr_test_fpga_ready' scripts/Makefile.spl:334: recipe for target 'spl/u-boot-spl' failed
make[1]: *** [spl/u-boot-spl] Error 1
Makefile:1347: recipe for target 'spl/u-boot-spl' failed
make: *** [spl/u-boot-spl] Error 2
For socfpga_arria10_defconfig:
arch/arm/mach-socfpga/built-in.o: In function `socfpga_fpga_add':
/home/dinguyen/linux_dev/u-boot/arch/arm/mach-socfpga/misc.c:110:
undefined reference to `fpga_init' /home/dinguyen/linux_dev/u-boot/arch/arm/mach-socfpga/misc.c:112:
undefined reference to `fpga_add' scripts/Makefile.spl:334: recipe for target 'spl/u-boot-spl' failed
make[1]: *** [spl/u-boot-spl] Error 1
Makefile:1347: recipe for target 'spl/u-boot-spl' failed
make: *** [spl/u-boot-spl] Error 2
Quoted 1 line
Dinh
I did the compilation on each patch, and testing the patch set on all
arria10, cyclone5 and arria10 devkit.
Quoted 6 lines
I suspect something wrong with v6-0005-arm-socfpga-Move-FPGA- manager-
driver-to-FPGA-driv.patch you applied. Could you help me check again
and confirm all the patches waere applied properly?
Yes, I've applied all of your patches correctly. The only diff between
this series and the last is:
$ git diff tien_fong_fpga_a10_v5
drivers/Makefile +0 -0
index b4a2230..4a4b237 100644
@@ -47,7 +47,6 @@ obj-$(CONFIG_OMAP_USB_PHY) += usb/phy/
obj-$(CONFIG_SPL_SATA_SUPPORT) += block/
obj-$(CONFIG_SPL_USB_HOST_SUPPORT) += block/
obj-$(CONFIG_SPL_MMC_SUPPORT) += block/
-obj-$(CONFIG_FPGA) += fpga/
endif
ifdef CONFIG_TPL_BUILD
include/configs/socfpga_common.h +1 -0
index 913b9f1..9edcd2d 100644
@@ -109,6 +109,7 @@
  #define CONFIG_FPGA
  #define CONFIG_FPGA_ALTERA
  #define CONFIG_FPGA_SOCFPGA
+#define CONFIG_SPL_FPGA_SUPPORT
  #define CONFIG_FPGA_COUNT              1
  #endif
 
So the patch for using CONFIG_SPL_FPGA_SUPPORT is causing this build error. Please investigate.

Quoted 1 line

Dinh

Hi Dinh,

I have tried with both u-boot.git and u-boot-socfpga.git lastest version, i can't still reproduce the issue u have seen :(. Would you mind to share me the details of the step to reproduce it such as on what branch?

Hi Ley Foon,

Could you help to try out the patch set too?

Thanks a lot.

Fong.

Dinh Nguyen

maintainer

2017-05-26 14:49 UTC #13 lore raw

v6 cover Add Intel Arria 10 SoC FPGA driver

Quoted 4 lines · Tien Fong

Quoted 4 lines
So the patch for using CONFIG_SPL_FPGA_SUPPORT is causing this build error. Please investigate.

Quoted 9 lines

Quoted 1 line
Dinh
Hi Dinh,
I have tried with both u-boot.git and u-boot-socfpga.git lastest version, i can't still reproduce the issue u have seen :(. Would you mind to share me the details of the step to reproduce it such as on what branch?

Ah, sorry about that. I went back and just did a batch apply of all 6 patches, and it builds fine.

I was hitting the build error because I missed applying patch 4/6 "arm:
socfpga: Enable FPGA driver build on SPL"

The reason I missed this was because the 3/6 patch was named "arm:
socfpga: Enable FPGA driver on SPL".

So can you please go back and edit the commit header of patch 4/6, to something more generic? As its not ARM or SOCFPGA specific.

Thanks,
Dinh

Chee

2017-05-29 03:00 UTC #14 lore raw

v6 cover Add Intel Arria 10 SoC FPGA driver

Quoted 26 lines · Dinh Nguyen

Quoted 7 lines · Tien Fong
Quoted 7 lines
So the patch for using CONFIG_SPL_FPGA_SUPPORT is causing this build
error. Please investigate.
Quoted 9 lines
Quoted 1 line
Dinh
Hi Dinh,
I have tried with both u-boot.git and u-boot-socfpga.git lastest version, i can't still reproduce the issue u have seen :(. Would you
mind to share me the details of the step to reproduce it such as on what branch?
Ah, sorry about that. I went back and just did a batch apply of all 6 patches, and it builds fine.
I was hitting the build error because I missed applying patch 4/6 "arm:
socfpga: Enable FPGA driver build on SPL"

Quoted 8 lines

The reason I missed this was because the 3/6 patch was named "arm:
socfpga: Enable FPGA driver on SPL".
So can you please go back and edit the commit header of patch 4/6, to something more generic? As its not ARM or SOCFPGA specific.
Thanks,
Dinh

great, at least we know what going on. Yeah, i can change that to more generic.

Thanks.