Patch "dmaengine: mv_xor_v2: fix tx_submit() implementation" has been added to the 4.11-stable tree
Subsystems (2)
This is a note to let you know that I've just added the patch titled
dmaengine: mv_xor_v2: fix tx_submit() implementation
to the 4.11-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
dmaengine-mv_xor_v2-fix-tx_submit-implementation.patch
and it can be found in the queue-4.11 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.
Quoted 1 line
From
44d5887a8bf1e86915c8ff647337cb138149da82Mon Sep 17 00:00:00 2001
From: Thomas Petazzoni <[email protected]>
Date: Fri, 5 May 2017 11:57:48 +0200
Subject: dmaengine: mv_xor_v2: fix tx_submit() implementation
From: Thomas Petazzoni <[email protected]>
commit 44d5887a8bf1e86915c8ff647337cb138149da82 upstream.
The mv_xor_v2_tx_submit() gets the next available HW descriptor by calling mv_xor_v2_get_desq_write_ptr(), which reads a HW register telling the next available HW descriptor. This was working fine when HW descriptors were issued for processing directly in tx_submit().
However, as part of the review process of the driver, a change was requested to move the actual kick-off of HW descriptors processing to ->issue_pending(). Due to this, reading the HW register to know the next available HW descriptor no longer works.
So instead of using this HW register, we implemented a software index pointing to the next available HW descriptor.
--- drivers/dma/mv_xor_v2.c | 22 +++++----------------- 1 file changed, 5 insertions(+), 17 deletions(-)
drivers/dma/mv_xor_v2.c +5 -17
@@ -161,6 +161,7 @@ struct mv_xor_v2_device {struct mv_xor_v2_sw_desc *sw_desq;int desc_size;unsigned int npendings; +unsigned int hw_queue_idx; };/**
@@ -214,18 +215,6 @@ static void mv_xor_v2_set_data_buffers(s }/* -* Return the next available index in the DESQ. -*/ -static int mv_xor_v2_get_desq_write_ptr (struct mv_xor_v2_device *xor_dev) -{ -/* read the index for the next available descriptor in the DESQ */ -u32 reg =readl (xor_dev->dma_base +MV_XOR_V2_DMA_DESQ_ALLOC_OFF ); - -return ((reg >>MV_XOR_V2_DMA_DESQ_ALLOC_WRPTR_SHIFT ) - &MV_XOR_V2_DMA_DESQ_ALLOC_WRPTR_MASK ); -} - -/* * notify the engine of new descriptors, and update the available index. */ static void mv_xor_v2_add_desc_to_desq(struct mv_xor_v2_device *xor_dev,
@@ -306,7 +295,6 @@ static irqreturn_t mv_xor_v2_interrupt_hstatic dma_cookie_t mv_xor_v2_tx_submit (struct dma_async_tx_descriptor *tx) { -int desq_ptr;void *dest_hw_desc;dma_cookie_t cookie; struct mv_xor_v2_sw_desc *sw_desc =
@@ -322,15 +310,15 @@ mv_xor_v2_tx_submit(struct dma_async_tx_spin_lock_bh (&xor_dev->lock); cookie =dma_cookie_assign (tx); -/* get the next available slot in the DESQ */ - desq_ptr =mv_xor_v2_get_desq_write_ptr (xor_dev); -/* copy the HW descriptor from the SW descriptor to the DESQ */ - dest_hw_desc = xor_dev->hw_desq_virt + desq_ptr; + dest_hw_desc = xor_dev->hw_desq_virt + xor_dev->hw_queue_idx;memcpy (dest_hw_desc, &sw_desc->hw_desc, xor_dev->desc_size); xor_dev->npendings++; + xor_dev->hw_queue_idx++; +if (xor_dev->hw_queue_idx >=MV_XOR_V2_DESC_NUM ) + xor_dev->hw_queue_idx =0 ;spin_unlock_bh (&xor_dev->lock);
Patches currently in stable-queue which might be from [email protected] are
queue-4.11/dmaengine-mv_xor_v2-properly-handle-wrapping-in-the-array-of-hw-descriptors.patch queue-4.11/dmaengine-mv_xor_v2-enable-xor-engine-after-its-configuration.patch queue-4.11/dmaengine-mv_xor_v2-set-dma-mask-to-40-bits.patch queue-4.11/dmaengine-mv_xor_v2-do-not-use-descriptors-not-acked-by-async_tx.patch queue-4.11/dmaengine-mv_xor_v2-handle-mv_xor_v2_prep_sw_desc-error-properly.patch queue-4.11/dmaengine-mv_xor_v2-remove-interrupt-coalescing.patch queue-4.11/dmaengine-mv_xor_v2-fix-tx_submit-implementation.patch