cpu: Add Intel Tangier support

From: Felipe Balbi <[email protected]>

Add Intel Tangier SoC support.

Intel Tangier SoC is a core part of Intel Merrifield platform. For example, Intel Edison board is based on such platform.

The patch is based on work done by the following people (in alphabetical order):
Aiden Park <[email protected]>
Dukjoon Jeon <[email protected]>
eric.park <[email protected]>
Fabien Chereau <[email protected]>
Scott D Phillips <[email protected]> Sebastien Colleur <[email protected]> Steve Sakoman <[email protected]>
Vincent Tinelli <[email protected]>

Signed-off-by Vincent Tinelli <[email protected]>

Signed-off-by Felipe Balbi <[email protected]>

Signed-off-by Andy Shevchenko <[email protected]>

---
 arch/x86/Kconfig                   |   1 +
 arch/x86/cpu/Makefile              |   1 +
 arch/x86/cpu/tangier/Kconfig       |  20 ++++
 arch/x86/cpu/tangier/Makefile      |   1 +
 arch/x86/cpu/tangier/car.S         |  13 +++
 arch/x86/cpu/tangier/sdram.c       | 234 +++++++++++++++++++++++++++++++++++++
 arch/x86/cpu/tangier/tangier.c     |  36 ++++++
 arch/x86/include/asm/dma-mapping.h |  41 +++++++
 8 files changed, 347 insertions(+)
 create mode 100644 arch/x86/cpu/tangier/Kconfig
 create mode 100644 arch/x86/cpu/tangier/Makefile
 create mode 100644 arch/x86/cpu/tangier/car.S
 create mode 100644 arch/x86/cpu/tangier/sdram.c
 create mode 100644 arch/x86/cpu/tangier/tangier.c
 create mode 100644 arch/x86/include/asm/dma-mapping.h

Quoted 19 lines · Andy Shevchenko

From: Felipe Balbi <[email protected]>

Add Intel Tangier SoC support.

Intel Tangier SoC is a core part of Intel Merrifield platform. For example, Intel Edison board is based on such platform.

The patch is based on work done by the following people (in alphabetical
order):
        Aiden Park <[email protected]>
        Dukjoon Jeon <[email protected]> eric.park <[email protected]>
        Fabien Chereau <[email protected]> Scott D Phillips <[email protected]> Sebastien Colleur <[email protected]> Steve Sakoman <[email protected]> Vincent Tinelli <[email protected]>

Quoted 3 lines

Signed-off-by Vincent Tinelli <[email protected]>

Signed-off-by Felipe Balbi <[email protected]>

Signed-off-by Andy Shevchenko <[email protected]>

Reviewed-by Simon Glass <[email protected]>

Please check the chromium copyright though.

From: Felipe Balbi <[email protected]>

Add Intel Tangier SoC support.

Intel Tangier SoC is a core part of Intel Merrifield platform. For example, Intel Edison board is based on such platform.

The patch is based on work done by the following people (in alphabetical order):
Aiden Park <[email protected]>
Dukjoon Jeon <[email protected]>
eric.park <[email protected]>
Fabien Chereau <[email protected]>
Scott D Phillips <[email protected]> Sebastien Colleur <[email protected]> Steve Sakoman <[email protected]>
Vincent Tinelli <[email protected]>

Signed-off-by Vincent Tinelli <[email protected]>

Signed-off-by Felipe Balbi <[email protected]>

Signed-off-by Andy Shevchenko <[email protected]>

---
 arch/x86/Kconfig                   |   1 +
 arch/x86/cpu/Makefile              |   1 +
 arch/x86/cpu/tangier/Kconfig       |  20 ++++
 arch/x86/cpu/tangier/Makefile      |   1 +
 arch/x86/cpu/tangier/car.S         |  13 +++
 arch/x86/cpu/tangier/sdram.c       | 234 +++++++++++++++++++++++++++++++++++++
 arch/x86/cpu/tangier/tangier.c     |  36 ++++++
 arch/x86/include/asm/dma-mapping.h |  41 +++++++
 8 files changed, 347 insertions(+)
 create mode 100644 arch/x86/cpu/tangier/Kconfig
 create mode 100644 arch/x86/cpu/tangier/Makefile
 create mode 100644 arch/x86/cpu/tangier/car.S
 create mode 100644 arch/x86/cpu/tangier/sdram.c
 create mode 100644 arch/x86/cpu/tangier/tangier.c
 create mode 100644 arch/x86/include/asm/dma-mapping.h

arch/x86/Kconfig +1 -0

index 9ead3ebccf..31f2d154d4 100644
@@ -114,6 +114,7 @@ source "arch/x86/cpu/ivybridge/Kconfig"
 source "arch/x86/cpu/qemu/Kconfig"
 source "arch/x86/cpu/quark/Kconfig"
 source "arch/x86/cpu/queensbay/Kconfig"
+source "arch/x86/cpu/tangier/Kconfig"
 
 # architecture-specific options below
 

arch/x86/cpu/Makefile +1 -0

index 92a9023b0b..6f3535d216 100644
@@ -34,6 +34,7 @@ obj-$(CONFIG_QEMU) += qemu/
 obj-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE) += ivybridge/
 obj-$(CONFIG_INTEL_QUARK) += quark/
 obj-$(CONFIG_INTEL_QUEENSBAY) += queensbay/
+obj-$(CONFIG_INTEL_TANGIER) += tangier/
 obj-y += lapic.o ioapic.o
 obj-y += irq.o
 ifndef CONFIG_$(SPL_)X86_64

arch/x86/cpu/tangier/Kconfig new file +20 -0

new file mode 100644
index 0000000000..3545886a65
@@ -0,0 +1,20 @@
+#
+# Copyright (C) 2015 Intel, Inc
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+config INTEL_TANGIER
+       bool
+       depends on INTEL_MID
+
+config SYS_CAR_ADDR
+       hex
+       default 0x19200000
+
+config SYS_CAR_SIZE
+       hex
+       default 0x4000
+       help
+         Space in bytes in eSRAM used as Cache-As-RAM (CAR).
+         Note this size must not exceed eSRAM's total size.

arch/x86/cpu/tangier/Makefile new file +1 -0

new file mode 100644
index 0000000000..d937737057
@@ -0,0 +1 @@
+obj-y += car.o tangier.o sdram.o

arch/x86/cpu/tangier/car.S new file +13 -0

new file mode 100644
index 0000000000..6982106c19
@@ -0,0 +1,13 @@
+/*
+ * Copyright (c) 2011 The Chromium OS Authors.
+ * (C) Copyright 2010-2011
+ * Graeme Russ, <[email protected]>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+.section .text
+
+.globl car_init
+car_init:
+       jmp     car_init_ret

arch/x86/cpu/tangier/sdram.c new file +7 -0

new file mode 100644
index 0000000000..da046559a1
@@ -0,0 +1,234 @@
+/*
+ * Copyright (c) 2011 The Chromium OS Authors.
+ * (C) Copyright 2010,2011
+ * Graeme Russ, <[email protected]>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */

arch/x86/cpu/tangier/sdram.c new file +12 -0

+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* Memory type definitions */
+enum sfi_mem_type {
+       SFI_MEM_RESERVED,
+       SFI_LOADER_CODE,
+       SFI_LOADER_DATA,
+       SFI_BOOT_SERVICE_CODE,
+       SFI_BOOT_SERVICE_DATA,
+       SFI_RUNTIME_SERVICE_CODE,
+       SFI_RUNTIME_SERVICE_DATA,

arch/x86/cpu/tangier/sdram.c new file +191 -0

+static int sfi_table_check(struct sfi_table_header *sbh)
+{
+       char chksum = 0;
+       char *pos = (char *)sbh;
+       int i;
+
+       if (sbh->len < SFI_TABLE_LENGTH)
+               return -1;
+
+       if (sbh->len > SFI_LENGTH)
+               return -1;
+
+       for (i = 0; i < sbh->len; i++)
+               chksum += *pos++;
+
+       if (chksum)
+               error("sfi: Invalid checksum\n");
+
+       /* Checksum is OK if zero */
+       return chksum;
+}
+
+static int sfi_table_is_type(struct sfi_table_header *sbh, const char *signature)
+{
+       return !strncmp(sbh->sig, signature, SFI_SIGNATURE_SIZE) &&
+              !sfi_table_check(sbh);
+}
+
+static struct sfi_table_simple *sfi_get_table_by_sig(unsigned long addr,
+                                                    const char *signature)
+{
+       struct sfi_table_simple *sb = NULL;
+       int i;
+
+       for (i = 0; i < SFI_LENGTH; i += SFI_TABLE_LENGTH) {
+               sb = (struct sfi_table_simple *)(addr + i);
+               if (sfi_table_is_type(&sb->header, signature))
+                       break;
+       }
+
+       if (i >= SFI_LENGTH || !sb)
+               return NULL;
+
+       return sb;
+}
+
+static struct sfi_table_simple *sfi_search_mmap(void)
+{
+       struct sfi_table_header *sbh;
+       struct sfi_table_simple *sb;
+       u32 sys_entry_cnt;
+       u32 i;
+
+       /* Find SYST table */
+       sb = sfi_get_table_by_sig(SFI_BASE_ADDR, SFI_SIG_SYST);
+       if (!sb) {
+               error("failed to locate SYST table\n");
+               return NULL;
+       }
+
+       sys_entry_cnt = (sb->header.len - sizeof(*sbh)) / 8;
+
+       /* Search through each SYST entry for MMAP table */
+       for (i = 0; i < sys_entry_cnt; i++) {
+               sbh = (struct sfi_table_header *)(unsigned long)sb->pentry[i];
+
+               if (sfi_table_is_type(sbh, SFI_SIG_MMAP))
+                       return (struct sfi_table_simple *) sbh;
+       }
+
+       error("failed to locate SFI MMAP table\n");
+       return NULL;
+}
+
+#define sfi_for_each_mentry(i, sb, mentry)                             \
+       for (i = 0, mentry = (struct sfi_mem_entry *)sb->pentry;        \
+            i < SFI_GET_NUM_ENTRIES(sb, struct sfi_mem_entry);         \
+            i++, mentry++)                                             \
+
+static unsigned sfi_setup_e820(unsigned max_entries, struct e820entry *entries)
+{
+       struct sfi_table_simple *sb;
+       struct sfi_mem_entry *mentry;
+       unsigned long long start, end, size;
+       int type, total = 0;
+       int i;
+
+       sb = sfi_search_mmap();
+       if (!sb)
+               return 0;
+
+       sfi_for_each_mentry(i, sb, mentry) {
+               start = mentry->phys_start;
+               size = mentry->pages << 12;
+               end = start + size;
+
+               if (start > end)
+                       continue;
+
+               /* translate SFI mmap type to E820 map type */
+               switch (mentry->type) {
+               case SFI_MEM_CONV:
+                       type = E820_RAM;
+                       break;
+               case SFI_MEM_UNUSABLE:
+               case SFI_RUNTIME_SERVICE_DATA:
+                       continue;
+               default:
+                       type = E820_RESERVED;
+               }
+
+               if (total == E820MAX)
+                       break;
+               entries[total].addr = start;
+               entries[total].size = size;
+               entries[total].type = type;
+
+               total++;
+       }
+
+       return total;
+}
+
+static int sfi_get_bank_size(void)
+{
+       struct sfi_table_simple *sb;
+       struct sfi_mem_entry *mentry;
+       int bank = 0;
+       int i;
+
+       sb = sfi_search_mmap();
+       if (!sb)
+               return -ENXIO;
+
+       sfi_for_each_mentry(i, sb, mentry) {
+               if (mentry->type != SFI_MEM_CONV)
+                       continue;
+
+               gd->bd->bi_dram[bank].start = mentry->phys_start;
+               gd->bd->bi_dram[bank].size = mentry->pages << 12;
+               bank++;
+       }
+
+       return bank;
+}
+
+static phys_size_t sfi_get_ram_size(void)
+{
+       struct sfi_table_simple *sb;
+       struct sfi_mem_entry *mentry;
+       phys_size_t ram = 0;
+       int i;
+
+       sb = sfi_search_mmap();
+       if (!sb)
+               return 0;
+
+       sfi_for_each_mentry(i, sb, mentry) {
+               if (mentry->type != SFI_MEM_CONV)
+                       continue;
+
+               ram += (mentry->pages << 12);
+       }
+
+       debug("RAM size %llu\n", ram);
+
+       return ram;
+}
+
+unsigned install_e820_map(unsigned max_entries, struct e820entry *entries)
+{
+       return sfi_setup_e820(max_entries, entries);
+}
+
+int dram_init_banksize(void)
+{
+       int ret;
+
+       ret = sfi_get_bank_size();
+       if (ret < 0)
+               return ret;
+
+       return 0;
+}
+
+int dram_init(void)
+{
+       gd->ram_size = sfi_get_ram_size();
+
+       return 0;
+}

arch/x86/cpu/tangier/tangier.c new file +36 -0

new file mode 100644
index 0000000000..c06767b915
@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2011 The Chromium OS Authors.
+ * (C) Copyright 2008
+ * Graeme Russ, graeme.russ at gmail.com.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/scu.h>
+#include <asm/u-boot-x86.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Miscellaneous platform dependent initializations
+ */
+int arch_cpu_init(void)
+{
+       return x86_cpu_init_f();
+}
+
+int checkcpu(void)
+{
+       return 0;
+}
+
+int print_cpuinfo(void)
+{
+       return default_print_cpuinfo();
+}
+
+void reset_cpu(ulong addr)
+{
+       scu_ipc_simple_command(IPCMSG_COLD_RESET, 0);
+}

arch/x86/include/asm/dma-mapping.h new file +32 -0

new file mode 100644
index 0000000000..7de4c08e36
@@ -0,0 +1,41 @@
+/*
+ * (C) Copyright 2007
+ * Stelian Pop <[email protected]>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+#ifndef __ASM_X86_DMA_MAPPING_H
+#define __ASM_X86_DMA_MAPPING_H
+
+#define        dma_mapping_error(x, y) 0
+
+enum dma_data_direction {
+       DMA_BIDIRECTIONAL       = 0,
+       DMA_TO_DEVICE           = 1,
+       DMA_FROM_DEVICE         = 2,
+};
+
+static inline void *dma_alloc_coherent(size_t len, unsigned long *handle)
+{
+       *handle = (unsigned long)memalign(ARCH_DMA_MINALIGN, len);
+       return (void *)*handle;
+}
+
+static inline void dma_free_coherent(void *addr)
+{
+       free(addr);
+}
+
+static inline unsigned long dma_map_single(volatile void *vaddr, size_t len,
+                                          enum dma_data_direction dir)
+{

Hi Andy,

Quoted 17 lines · Andy Shevchenko

From: Felipe Balbi <[email protected]>

Add Intel Tangier SoC support.

Intel Tangier SoC is a core part of Intel Merrifield platform. For example, Intel Edison board is based on such platform.

The patch is based on work done by the following people (in alphabetical order):
Aiden Park <[email protected]>
Dukjoon Jeon <[email protected]>
eric.park <[email protected]>
Fabien Chereau <[email protected]>
Scott D Phillips <[email protected]> Sebastien Colleur <[email protected]> Steve Sakoman <[email protected]>
Vincent Tinelli <[email protected]>

arch/x86/cpu/tangier/sdram.c line 17

Quoted 9 lines

arch/x86/cpu/tangier/sdram.c new file +9 -0

+#include <common.h>
+#include <malloc.h>
+#include <asm/bootparam.h>
+#include <asm/e820.h>
+#include <asm/global_data.h>
+#include <asm/processor.h>
+#include <asm/sections.h>
+#include <asm/sfi.h>
+#include <asm/u-boot-x86.h>

Can you double check if all these header files are needed here?

Quoted 13 lines

arch/x86/cpu/tangier/sdram.c new file +13 -0

+/* Memory type definitions */
+enum sfi_mem_type {
+       SFI_MEM_RESERVED,
+       SFI_LOADER_CODE,
+       SFI_LOADER_DATA,
+       SFI_BOOT_SERVICE_CODE,
+       SFI_BOOT_SERVICE_DATA,
+       SFI_RUNTIME_SERVICE_CODE,
+       SFI_RUNTIME_SERVICE_DATA,
+       SFI_MEM_CONV,
+       SFI_MEM_UNUSABLE,
+       SFI_ACPI_RECLAIM,
+       SFI_ACPI_NVS,

arch/x86/cpu/tangier/sdram.c line 39

Quoted 6 lines

arch/x86/cpu/tangier/sdram.c new file +6 -0

+       SFI_MEM_MMIO,
+       SFI_MEM_IOPORT,
+       SFI_PAL_CODE,
+       SFI_MEM_TYPEMAX,
+};
+

Should this be moved to sfi.h?

arch/x86/cpu/tangier/sdram.c line 43

Quoted 5 lines

arch/x86/cpu/tangier/sdram.c new file +4 -0

+#define SFI_BASE_ADDR          0x000E0000
+#define SFI_LENGTH             0x00020000
+#define SFI_TABLE_LENGTH       16
+

Can you add some comments here? I guess U-Boot on tangier is not the 1st stage bootloader. It boots from the 1st stage bootloader and get memory information via SFI table which 1st stage bootloader provides?

Quoted 46 lines

arch/x86/cpu/tangier/tangier.c +0 -0

arch/x86/include/asm/dma-mapping.h new file +38 -0

new file mode 100644
index 0000000000..7de4c08e36
@@ -0,0 +1,41 @@
+/*
+ * (C) Copyright 2007
+ * Stelian Pop <[email protected]>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+#ifndef __ASM_X86_DMA_MAPPING_H
+#define __ASM_X86_DMA_MAPPING_H
+
+#define        dma_mapping_error(x, y) 0
+
+enum dma_data_direction {
+       DMA_BIDIRECTIONAL       = 0,
+       DMA_TO_DEVICE           = 1,
+       DMA_FROM_DEVICE         = 2,
+};
+
+static inline void *dma_alloc_coherent(size_t len, unsigned long *handle)
+{
+       *handle = (unsigned long)memalign(ARCH_DMA_MINALIGN, len);
+       return (void *)*handle;
+}
+
+static inline void dma_free_coherent(void *addr)
+{
+       free(addr);
+}
+
+static inline unsigned long dma_map_single(volatile void *vaddr, size_t len,
+                                          enum dma_data_direction dir)
+{
+       return (unsigned long)vaddr;
+}
+
+static inline void dma_unmap_single(volatile void *vaddr, size_t len,
+                                   unsigned long paddr)
+{

arch/x86/include/asm/dma-mapping.h

Quoted 4 lines

arch/x86/include/asm/dma-mapping.h new file +3 -1

+}
+
+#endif /* __ASM_X86_DMA_MAPPING_H */
--

Why is this dma-mapping.h file needed? For x86, all memory are coherent, which is indicated in your implementation as well (malloc/free are used)

Quoted 22 lines · Bin Meng

Hi Andy,

Quoted 17 lines · Andy Shevchenko

From: Felipe Balbi <[email protected]>

Add Intel Tangier SoC support.

Intel Tangier SoC is a core part of Intel Merrifield platform. For example, Intel Edison board is based on such platform.

The patch is based on work done by the following people (in alphabetical order):
Aiden Park <[email protected]>
Dukjoon Jeon <[email protected]>
eric.park <[email protected]>
Fabien Chereau <[email protected]>
Scott D Phillips <[email protected]> Sebastien Colleur <[email protected]> Steve Sakoman <[email protected]>
Vincent Tinelli <[email protected]>

Quoted 11 lines

arch/x86/cpu/tangier/sdram.c line 17

Quoted 9 lines

arch/x86/cpu/tangier/sdram.c new file +9 -0

+#include <common.h>
+#include <malloc.h>
+#include <asm/bootparam.h>
+#include <asm/e820.h>
+#include <asm/global_data.h>
+#include <asm/processor.h>
+#include <asm/sections.h>
+#include <asm/sfi.h>
+#include <asm/u-boot-x86.h>

Can you double check if all these header files are needed here?

Will do.

Quoted 13 lines

Quoted 13 lines

arch/x86/cpu/tangier/sdram.c new file +13 -0

+/* Memory type definitions */
+enum sfi_mem_type {
+       SFI_MEM_RESERVED,
+       SFI_LOADER_CODE,
+       SFI_LOADER_DATA,
+       SFI_BOOT_SERVICE_CODE,
+       SFI_BOOT_SERVICE_DATA,
+       SFI_RUNTIME_SERVICE_CODE,
+       SFI_RUNTIME_SERVICE_DATA,
+       SFI_MEM_CONV,
+       SFI_MEM_UNUSABLE,
+       SFI_ACPI_RECLAIM,
+       SFI_ACPI_NVS,

Quoted 8 lines

arch/x86/cpu/tangier/sdram.c line 39

Quoted 6 lines

arch/x86/cpu/tangier/sdram.c new file +6 -0

+       SFI_MEM_MMIO,
+       SFI_MEM_IOPORT,
+       SFI_PAL_CODE,
+       SFI_MEM_TYPEMAX,
+};
+

Should this be moved to sfi.h?

If no one objects, I would do this.

Quoted 10 lines

arch/x86/cpu/tangier/sdram.c line 43

Quoted 5 lines

arch/x86/cpu/tangier/sdram.c new file +4 -0

+#define SFI_BASE_ADDR          0x000E0000
+#define SFI_LENGTH             0x00020000
+#define SFI_TABLE_LENGTH       16
+

Can you add some comments here? I guess U-Boot on tangier is not the 1st stage bootloader. It boots from the 1st stage bootloader and get memory information via SFI table which 1st stage bootloader provides?

Quoted 47 lines

Quoted 47 lines

arch/x86/cpu/tangier/tangier.c +0 -0

arch/x86/include/asm/dma-mapping.h new file +38 -0

new file mode 100644
index 0000000000..7de4c08e36
@@ -0,0 +1,41 @@
+/*
+ * (C) Copyright 2007
+ * Stelian Pop <[email protected]>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+#ifndef __ASM_X86_DMA_MAPPING_H
+#define __ASM_X86_DMA_MAPPING_H
+
+#define        dma_mapping_error(x, y) 0
+
+enum dma_data_direction {
+       DMA_BIDIRECTIONAL       = 0,
+       DMA_TO_DEVICE           = 1,
+       DMA_FROM_DEVICE         = 2,
+};
+
+static inline void *dma_alloc_coherent(size_t len, unsigned long *handle)
+{
+       *handle = (unsigned long)memalign(ARCH_DMA_MINALIGN, len);
+       return (void *)*handle;
+}
+
+static inline void dma_free_coherent(void *addr)
+{
+       free(addr);
+}
+
+static inline unsigned long dma_map_single(volatile void *vaddr, size_t len,
+                                          enum dma_data_direction dir)
+{
+       return (unsigned long)vaddr;
+}
+
+static inline void dma_unmap_single(volatile void *vaddr, size_t len,
+                                   unsigned long paddr)
+{

Quoted 8 lines

arch/x86/include/asm/dma-mapping.h

Quoted 4 lines

arch/x86/include/asm/dma-mapping.h new file +3 -1

+}
+
+#endif /* __ASM_X86_DMA_MAPPING_H */
--

Why is this dma-mapping.h file needed? For x86, all memory are coherent, which is indicated in your implementation as well (malloc/free are used)

dwc3 is used on many platforms and SoCs, so, it's irrelevant to x86. Other option is to uglify dwc3 driver. I dunno it would be a good idea.

Hi Andy,

Quoted 59 lines · Andy Shevchenko

Quoted 22 lines · Bin Meng

Hi Andy,

Quoted 17 lines · Andy Shevchenko

From: Felipe Balbi <[email protected]>

Add Intel Tangier SoC support.

Intel Tangier SoC is a core part of Intel Merrifield platform. For example, Intel Edison board is based on such platform.

The patch is based on work done by the following people (in alphabetical order):
Aiden Park <[email protected]>
Dukjoon Jeon <[email protected]>
eric.park <[email protected]>
Fabien Chereau <[email protected]>
Scott D Phillips <[email protected]> Sebastien Colleur <[email protected]> Steve Sakoman <[email protected]>
Vincent Tinelli <[email protected]>

Quoted 11 lines

arch/x86/cpu/tangier/sdram.c line 17

Quoted 9 lines

arch/x86/cpu/tangier/sdram.c new file +9 -0

+#include <common.h>
+#include <malloc.h>
+#include <asm/bootparam.h>
+#include <asm/e820.h>
+#include <asm/global_data.h>
+#include <asm/processor.h>
+#include <asm/sections.h>
+#include <asm/sfi.h>
+#include <asm/u-boot-x86.h>

Can you double check if all these header files are needed here?

Will do.

Quoted 13 lines

Quoted 13 lines

arch/x86/cpu/tangier/sdram.c new file +13 -0

+/* Memory type definitions */
+enum sfi_mem_type {
+       SFI_MEM_RESERVED,
+       SFI_LOADER_CODE,
+       SFI_LOADER_DATA,
+       SFI_BOOT_SERVICE_CODE,
+       SFI_BOOT_SERVICE_DATA,
+       SFI_RUNTIME_SERVICE_CODE,
+       SFI_RUNTIME_SERVICE_DATA,
+       SFI_MEM_CONV,
+       SFI_MEM_UNUSABLE,
+       SFI_ACPI_RECLAIM,
+       SFI_ACPI_NVS,

Quoted 8 lines

arch/x86/cpu/tangier/sdram.c line 39

Quoted 6 lines

arch/x86/cpu/tangier/sdram.c new file +6 -0

+       SFI_MEM_MMIO,
+       SFI_MEM_IOPORT,
+       SFI_PAL_CODE,
+       SFI_MEM_TYPEMAX,
+};
+

Should this be moved to sfi.h?

Quoted 12 lines

If no one objects, I would do this.

Quoted 10 lines

arch/x86/cpu/tangier/sdram.c line 43

Quoted 5 lines

arch/x86/cpu/tangier/sdram.c new file +4 -0

+#define SFI_BASE_ADDR          0x000E0000
+#define SFI_LENGTH             0x00020000
+#define SFI_TABLE_LENGTH       16
+

Can you add some comments here? I guess U-Boot on tangier is not the 1st stage bootloader. It boots from the 1st stage bootloader and get memory information via SFI table which 1st stage bootloader provides?

Can you confirm if my above comments are correct? If so, please add some comments.

Quoted 56 lines

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Quoted 41 lines

arch/x86/cpu/tangier/tangier.c +0 -0

arch/x86/include/asm/dma-mapping.h new file +32 -0

new file mode 100644
index 0000000000..7de4c08e36
@@ -0,0 +1,41 @@
+/*
+ * (C) Copyright 2007
+ * Stelian Pop <[email protected]>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+#ifndef __ASM_X86_DMA_MAPPING_H
+#define __ASM_X86_DMA_MAPPING_H
+
+#define        dma_mapping_error(x, y) 0
+
+enum dma_data_direction {
+       DMA_BIDIRECTIONAL       = 0,
+       DMA_TO_DEVICE           = 1,
+       DMA_FROM_DEVICE         = 2,
+};
+
+static inline void *dma_alloc_coherent(size_t len, unsigned long *handle)
+{
+       *handle = (unsigned long)memalign(ARCH_DMA_MINALIGN, len);
+       return (void *)*handle;
+}
+
+static inline void dma_free_coherent(void *addr)
+{
+       free(addr);
+}
+
+static inline unsigned long dma_map_single(volatile void *vaddr, size_t len,
+                                          enum dma_data_direction dir)
+{

arch/x86/include/asm/dma-mapping.h

Quoted 10 lines

arch/x86/include/asm/dma-mapping.h new file +9 -1

+       return (unsigned long)vaddr;
+}
+
+static inline void dma_unmap_single(volatile void *vaddr, size_t len,
+                                   unsigned long paddr)
+{
+}
+
+#endif /* __ASM_X86_DMA_MAPPING_H */
--

Why is this dma-mapping.h file needed? For x86, all memory are coherent, which is indicated in your implementation as well (malloc/free are used)

Quoted 3 lines

dwc3 is used on many platforms and SoCs, so, it's irrelevant to x86. Other option is to uglify dwc3 driver. I dunno it would be a good idea.

OK, so please split this patch into two, Leave the adding of dma-mapping.h file to a single patch, and state that this is required on some cross-platform drivers.

On 20 April 2017 at 03:41, Bin Meng <[email protected]> wrote:

Andy, any update on this please? Is it still in progress?

Quoted 3 lines · Simon Glass

On 20 April 2017 at 03:41, Bin Meng <[email protected]> wrote:

Andy, any update on this please? Is it still in progress?

Hi, yes, it is still in progress.
The issue is I have not much time to look at it.

Can you remind me what is the summary regarding power suppliers?

From hardware point of view there no regulators wrt SDHCI host controllers, only some let's say magic bits that needs to be set or clear.

Hi Andy,

Quoted 2 lines · Andy Shevchenko

On Tue, Jun 20, 2017 at 9:51 PM, Simon Glass <[email protected]> wrote:

Quoted 5 lines

Quoted 2 lines · Bin Meng

Andy, any update on this please? Is it still in progress?

Hi, yes, it is still in progress.
The issue is I have not much time to look at it.

OK thanks.

Quoted 6 lines

Can you remind me what is the summary regarding power suppliers?

From hardware point of view there no regulators wrt SDHCI host controllers, only some let's say magic bits that needs to be set or clear.

The issue is just that we cannot call from drivers into board code. If you don't want to model it as a regulator

perhaps you could call into
code in arch/arm/cpu/... to flip the bits?

Quoted 6 lines · Simon Glass

Hi Andy,

Quoted 2 lines · Andy Shevchenko

On Tue, Jun 20, 2017 at 9:51 PM, Simon Glass <[email protected]> wrote:

Quoted 7 lines

Quoted 5 lines

Quoted 2 lines · Bin Meng

Andy, any update on this please? Is it still in progress?

Hi, yes, it is still in progress.
The issue is I have not much time to look at it.

OK thanks.

I'm about to send new version.
Though, there is one thing to be clear of...

Quoted 9 lines

Quoted 6 lines

Can you remind me what is the summary regarding power suppliers?

From hardware point of view there no regulators wrt SDHCI host controllers, only some let's say magic bits that needs to be set or clear.

The issue is just that we cannot call from drivers into board code. If you don't want to model it as a regulator

Okay, meaning there is no consensus, U-Boot (as I see currently) is broken in few ways, one of them is ignoring hardware and proposing to emulate something which certain board doesn't have. That's not how things work.

Linux kernel is not the same in terms of DM in this case. In Linux this board (and SDHCI controllers) is represented differently (by emulating PCI programming interface). And there the PM code is much more complicated than here.

Quoted 2 lines

perhaps you could call into
code in arch/arm/cpu/... to flip the bits?

(x86)

It was at very beginning like that, but since SCU and PMU are represented as system controllers (which they indeed are), the calling to them from CPU code would be hackish.

So, the only way I see now is to disable SD card slot on that board blaming U-Boot upstream DM design for that.

Quoted 16 lines · Andy Shevchenko

On Thu, Apr 20, 2017 at 5:59 AM, Bin Meng <[email protected]>

Quoted 15 lines

arch/x86/cpu/tangier/sdram.c line 43

Quoted 4 lines · Andy Shevchenko

arch/x86/cpu/tangier/sdram.c new file +4 -0

+#define SFI_BASE_ADDR          0x000E0000
+#define SFI_LENGTH             0x00020000
+#define SFI_TABLE_LENGTH       16
+

Can you add some comments here? I guess U-Boot on tangier is not the
1st stage bootloader. It boots from the 1st stage bootloader and get
memory information via SFI table which 1st stage bootloader provides?

Can you confirm if my above comments are correct? If so, please add some comments.