turbostat: fix Skylake server package C-states reporting
PATCH 1/1 turbostat: fix Skylake server package C-states reporting
From: Artem Bityutskiy <[email protected]>
This patch fixes the problem of turbostat not reporting any package C-states on Skylake Xeon processor when the deepest package C-stated is configured as "no limit" in the UEFI firmware configuration menu.
The lowest 3 bits of the MSR_PKG_CST_CONFIG_CONTROL (0x000000e2) register contain 7 in this case, meaning "No Package C state limits" (see Intel SDM, vol 4, Table 2-41 - MSRs Supported by Intel® Xeon® Processor Scalable Family with DisplayFamily_DisplayModel 06_55H).
The problem was that turbostat's internal array of supported package C-sates (skx_pkg_cstate_limits) marked position #7 as "PCLRSV" (reserved), instead of "PCLUNL" (not limited). Instead, position #8 was incorrectly marked as "PCLUNL" (probably due to a typo).
This patch fixes the issue by marking position #7 as "not limited", and position #8 as "reserved".
--- turbostat.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
turbostat.c +1 -1
@@ -1816,7 +1816,7 @@ int slv_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV,int amt_pkg_cstate_limits[16 ] = {PCLUNL ,PCL__1 ,PCL__2 ,PCLRSV ,PCLRSV ,PCLRSV ,PCL__6 ,PCL__7 ,PCLRSV ,PCLRSV ,PCLRSV ,PCLRSV ,PCLRSV ,PCLRSV ,PCLRSV ,PCLRSV };int phi_pkg_cstate_limits[16 ] = {PCL__0 ,PCL__2 ,PCL_6N ,PCL_6R ,PCLRSV ,PCLRSV ,PCLRSV ,PCLUNL ,PCLRSV ,PCLRSV ,PCLRSV ,PCLRSV ,PCLRSV ,PCLRSV ,PCLRSV ,PCLRSV };int bxt_pkg_cstate_limits[16 ] = {PCL__0 ,PCL__2 ,PCLUNL ,PCLRSV ,PCLRSV ,PCLRSV ,PCLRSV ,PCLRSV ,PCLRSV ,PCLRSV ,PCLRSV ,PCLRSV ,PCLRSV ,PCLRSV ,PCLRSV ,PCLRSV }; -int skx_pkg_cstate_limits[16 ] = {PCL__0 ,PCL__2 ,PCL_6N ,PCL_6R ,PCLRSV ,PCLRSV ,PCLRSV ,PCLRSV ,PCLUNL ,PCLRSV ,PCLRSV ,PCLRSV ,PCLRSV ,PCLRSV ,PCLRSV ,PCLRSV }; +int skx_pkg_cstate_limits[16 ] = {PCL__0 ,PCL__2 ,PCL_6N ,PCL_6R ,PCLRSV ,PCLRSV ,PCLRSV ,PCLUNL ,PCLRSV ,PCLRSV ,PCLRSV ,PCLRSV ,PCLRSV ,PCLRSV ,PCLRSV ,PCLRSV }; static void
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2.9.3