Patch "drm: rcar-du: Fix display timing controller parameter" has been added to the 4.9-stable tree

This is a note to let you know that I've just added the patch titled

drm: rcar-du: Fix display timing controller parameter

to the 4.9-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
drm-rcar-du-fix-display-timing-controller-parameter.patch
and it can be found in the queue-4.9 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.

From: Koji Matsuoka <[email protected]>
Date: Mon, 18 Apr 2016 16:31:30 +0900
Subject: drm: rcar-du: Fix display timing controller parameter

From: Koji Matsuoka <[email protected]>

commit 9cdced8a39c04cf798ddb2a27cb5952f7d39f633 upstream.

There is a bug in the setting of the DES (Display Enable Signal) register. This current setting occurs 1 dot left shift. The DES register should be set minus one value about the specifying value with H/W specification. This patch corrects it.

---
 drivers/gpu/drm/rcar-du/rcar_du_crtc.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

@@ -172,7 +172,7 @@ static void rcar_du_crtc_set_display_tim
 					mode->crtc_vsync_start - 1);
 	rcar_du_crtc_write(rcrtc, VCR,  mode->crtc_vtotal - 1);
 
-	rcar_du_crtc_write(rcrtc, DESR,  mode->htotal - mode->hsync_start);
+	rcar_du_crtc_write(rcrtc, DESR,  mode->htotal - mode->hsync_start - 1);
 	rcar_du_crtc_write(rcrtc, DEWR,  mode->hdisplay);
 }
 

Patches currently in stable-queue which might be from [email protected] are

queue-4.9/drm-rcar-du-fix-h-v-sync-signal-polarity-configuration.patch queue-4.9/drm-rcar-du-fix-display-timing-controller-parameter.patch