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Enable hardware for Nanopi M1 & Nanopi M1 Plus

PATCH In review Philipp Rossak 3 participants 8 messages Sep 1, 2017 – Sep 4, 2017

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#0 lore raw

v2 cover Enable hardware for Nanopi M1 & Nanopi M1 Plus

From: Philipp Rossak <[email protected]>

This is v2 of my Enable hardware for Nanopi M1 & Nanopi M1 Plus Patchseries.

Changes since v1:

- removed pincrtl node from power sequence

- removed vqmmc-supply

- changed ap6212 label to sdio_wifi

- removed vqmmc-supply & pincrtl node for powersequence on Bananapi M2 Plus

- Droped patches for the IR controller & UART that are allready queued for 4.15

- Droped dwmac-sun8i patches

Original cover letter from v1:

This Patchseries enables the IR controller and the dwmac-sun8i on the Friendlyarm Nanopi M1 and Friendlyarm Nanopi M1 Plus boards. On the Nanopi M1 Plus additionally the BT/Wifi module is activated.

Philipp Rossak (2):
ARM: dts: sun8i: h3: Enable AP6212 WiFi on mmc1 on Nanopi M1 Plus
ARM: dts: sun8i: h3: Improved Wifi bindings on Bananapi M2 Plus

 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts |  7 -------
 arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts   | 25 +++++++++++++++++++++++++
 2 files changed, 25 insertions(+), 7 deletions(-)
Signature · 1 line
2.7.4
#1 lore raw

PATCH v2 1/2 ARM: dts: sun8i: h3: Enable AP6212 WiFi on mmc1 on Nanopi M1 Plus

From: Philipp Rossak <[email protected]>

The WiFi side of the AP6212 WiFi/BT combo module is connected to mmc1. There are also GPIOs for enable and interrupts.

Enable WiFi on this board by enabling mmc1 and adding the power sequencing clocks and GPIO, as well as the chip's interrupt line.

---
 arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)
arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts +25 -0
index 6256f55..7d18c35 100644
@@ -48,6 +48,13 @@
 
 	aliases {
 		serial1 = &uart3;
+		ethernet1 = &sdio_wifi;
+	};
+
+	wifi_pwrseq: wifi_pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		pinctrl-names = "default";
+		reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
 	};
 };
 
@@ -65,6 +72,24 @@
 	status = "okay";
 };
 
+&mmc1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc1_pins_a>;
+	vmmc-supply = <&reg_vcc3v3>;
+	mmc-pwrseq = <&wifi_pwrseq>;
+	bus-width = <4>;
+	non-removable;
+	status = "okay";
+
+	sdio_wifi: sdio_wifi at 1 {
+		reg = <1>;
+		compatible = "brcm,bcm4329-fmac";
+		interrupt-parent = <&pio>;
+		interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 / EINT10 */
+		interrupt-names = "host-wake";
+	};
+};
+
 &ohci1 {
 	status = "okay";
 };
Signature · 1 line
2.7.4
#2 lore raw

Re: [PATCH v2 1/2] ARM: dts: sun8i: h3: Enable AP6212 WiFi on mmc1 on Nanopi M1 Plus

? 2017-09-02 00:30?Philipp Rossak ???

Quoted 20 lines

From: Philipp Rossak <[email protected]>

The WiFi side of the AP6212 WiFi/BT combo module is connected to mmc1. There are also GPIOs for enable and interrupts.

Enable WiFi on this board by enabling mmc1 and adding the power sequencing clocks and GPIO, as well as the chip's interrupt line.

---
 arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 25 
+++++++++++++++++++++++++
 1 file changed, 25 insertions(+)
arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts +0 -0
index 6256f55..7d18c35 100644

arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts line 51

Quoted 4 lines
arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts +1 -0
@@ -48,6 +48,13 @@
 
 	aliases {
 		serial1 = &uart3;
+		ethernet1 = &sdio_wifi;

When the Wi-Fi module itself has fixed MAC address, there's no need for such an alias.

Quoted 34 lines
arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts +24 -0
+	};
+
+	wifi_pwrseq: wifi_pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		pinctrl-names = "default";
+		reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
 	};
 };
 
@@ -65,6 +72,24 @@
 	status = "okay";
 };
 
+&mmc1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc1_pins_a>;
+	vmmc-supply = <&reg_vcc3v3>;
+	mmc-pwrseq = <&wifi_pwrseq>;
+	bus-width = <4>;
+	non-removable;
+	status = "okay";
+
+	sdio_wifi: sdio_wifi at 1 {
+		reg = <1>;
+		compatible = "brcm,bcm4329-fmac";
+		interrupt-parent = <&pio>;
+		interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 / EINT10 */
+		interrupt-names = "host-wake";
+	};
+};
+
 &ohci1 {
 	status = "okay";
 };
#3 lore raw

Re: [PATCH v2 1/2] ARM: dts: sun8i: h3: Enable AP6212 WiFi on mmc1 on Nanopi M1 Plus

Quoted 22 lines · icenowy at aosc.io

? 2017-09-02 00:30?Philipp Rossak ???

Quoted 21 lines

From: Philipp Rossak <[email protected]>

The WiFi side of the AP6212 WiFi/BT combo module is connected to mmc1. There are also GPIOs for enable and interrupts.

Enable WiFi on this board by enabling mmc1 and adding the power sequencing clocks and GPIO, as well as the chip's interrupt line.

---
 arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 25
+++++++++++++++++++++++++
 1 file changed, 25 insertions(+)
arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts +0 -0
index 6256f55..7d18c35 100644
@@ -48,6 +48,13 @@
 
Quoted 6 lines

arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts line 51

Quoted 3 lines
arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts +1 -0
 	aliases {
 		serial1 = &uart3;
+		ethernet1 = &sdio_wifi;

When the Wi-Fi module itself has fixed MAC address, there's no need for such an alias.

But the description is also accurate, which is what matters in the DT.

Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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#4 lore raw

Re: [PATCH v2 1/2] ARM: dts: sun8i: h3: Enable AP6212 WiFi on mmc1 on Nanopi M1 Plus

In reply to Philipp Rossak

Hi Philipp,

Quoted 32 lines · Philipp Rossak

From: Philipp Rossak <[email protected]>

The WiFi side of the AP6212 WiFi/BT combo module is connected to mmc1. There are also GPIOs for enable and interrupts.

Enable WiFi on this board by enabling mmc1 and adding the power sequencing clocks and GPIO, as well as the chip's interrupt line.

---
 arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)
arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts +7 -0
index 6256f55..7d18c35 100644
@@ -48,6 +48,13 @@
 
 	aliases {
 		serial1 = &uart3;
+		ethernet1 = &sdio_wifi;
+	};
+
+	wifi_pwrseq: wifi_pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		pinctrl-names = "default";
+		reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
 	};
 };
 

arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts line 78

Quoted 7 lines
arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts +4 -0
@@ -65,6 +72,24 @@
 	status = "okay";
 };
 
+&mmc1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc1_pins_a>;
+	vmmc-supply = <&reg_vcc3v3>;

I know I told you you weren't needing vqmmc, but Chen-Yu later told me that I was wrong about this.

I've added vqmmc back, and applied your patch.

Thanks!
Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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#5 lore raw

PATCH v2 2/2 ARM: dts: sun8i: h3: Improved Wifi bindings on Bananapi M2 Plus

In reply to Philipp Rossak

From: Philipp Rossak <[email protected]>

* vqmmc is in this case not needed
* no need for pincontrol nodes when the pin is set to a GPIO

---
 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 7 -------
 1 file changed, 7 deletions(-)
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts +0 -7
index d756ff8..f7e5d8a 100644
@@ -98,7 +98,6 @@
 	wifi_pwrseq: wifi_pwrseq {
 		compatible = "mmc-pwrseq-simple";
 		pinctrl-names = "default";
-		pinctrl-0 = <&wifi_en_bpi_m2p>;
 		reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
 	};
 };
@@ -153,7 +152,6 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&mmc1_pins_a>;
 	vmmc-supply = <&reg_vcc3v3>;
-	vqmmc-supply = <&reg_vcc3v3>;
 	mmc-pwrseq = <&wifi_pwrseq>;
 	bus-width = <4>;
 	non-removable;
@@ -200,11 +198,6 @@
 		pins = "PL3";
 		function = "gpio_in";
 	};
-
-	wifi_en_bpi_m2p: wifi_en_pin {
-		pins = "PL7";
-		function = "gpio_out";
-	};
 };
 
 &reg_usb0_vbus {
Signature · 1 line
2.7.4
#6 lore raw

Re: [PATCH v2 2/2] ARM: dts: sun8i: h3: Improved Wifi bindings on Bananapi M2 Plus

Hi Philipp,

Quoted 23 lines · Philipp Rossak

From: Philipp Rossak <[email protected]>

* vqmmc is in this case not needed
* no need for pincontrol nodes when the pin is set to a GPIO

---
 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 7 -------
 1 file changed, 7 deletions(-)
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts +0 -1
index d756ff8..f7e5d8a 100644
@@ -98,7 +98,6 @@
 	wifi_pwrseq: wifi_pwrseq {
 		compatible = "mmc-pwrseq-simple";
 		pinctrl-names = "default";
-		pinctrl-0 = <&wifi_en_bpi_m2p>;
 		reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
 	};
 };

arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts line 156

Quoted 4 lines
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts +0 -1
@@ -153,7 +152,6 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&mmc1_pins_a>;
 	vmmc-supply = <&reg_vcc3v3>;
-	vqmmc-supply = <&reg_vcc3v3>;

So we actually need this one.

arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts line 207

Quoted 12 lines
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts +0 -5
 	mmc-pwrseq = <&wifi_pwrseq>;
 	bus-width = <4>;
 	non-removable;
@@ -200,11 +198,6 @@
 		pins = "PL3";
 		function = "gpio_in";
 	};
-
-	wifi_en_bpi_m2p: wifi_en_pin {
-		pins = "PL7";
-		function = "gpio_out";
-	};

And there's also other GPIO pins here, I'd prefer if you could tackle them all at once.

Thanks!
Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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#7 lore raw

Re: [PATCH v2 2/2] ARM: dts: sun8i: h3: Improved Wifi bindings on Bananapi M2 Plus

Hi Maxime

Am 04.09.2017 um 10:05 schrieb Maxime Ripard:

Quoted 49 lines

Hi Philipp,

Quoted 23 lines · Philipp Rossak

From: Philipp Rossak <[email protected]>

* vqmmc is in this case not needed
* no need for pincontrol nodes when the pin is set to a GPIO

---
  arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 7 -------
  1 file changed, 7 deletions(-)
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts +0 -1
index d756ff8..f7e5d8a 100644
@@ -98,7 +98,6 @@
  	wifi_pwrseq: wifi_pwrseq {
  		compatible = "mmc-pwrseq-simple";
  		pinctrl-names = "default";
-		pinctrl-0 = <&wifi_en_bpi_m2p>;
  		reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
  	};
  };

arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts line 156

Quoted 4 lines
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts +0 -1
@@ -153,7 +152,6 @@
  	pinctrl-names = "default";
  	pinctrl-0 = <&mmc1_pins_a>;
  	vmmc-supply = <&reg_vcc3v3>;
-	vqmmc-supply = <&reg_vcc3v3>;

So we actually need this one.

arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts line 207

Quoted 12 lines
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts +0 -5
  	mmc-pwrseq = <&wifi_pwrseq>;
  	bus-width = <4>;
  	non-removable;
@@ -200,11 +198,6 @@
  		pins = "PL3";
  		function = "gpio_in";
  	};
-
-	wifi_en_bpi_m2p: wifi_en_pin {
-		pins = "PL7";
-		function = "gpio_out";
-	};

And there's also other GPIO pins here, I'd prefer if you could tackle them all at once.

Quoted 3 lines

Thanks!
Maxime

Thanks for the feedback!
I will fix that with a new single Patch in the next Days.

Philipp