powerpc/kvm/xive: Don't access TIMA using byte accesses

PATCH New Benjamin Herrenschmidt 1 participant 1 message Sep 6, 2017

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Benjamin Herrenschmidt

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2017-09-06 05:20 UTC #0 lore raw

PATCH 1/1 powerpc/kvm/xive: Don't access TIMA using byte accesses

The TIMA only supports byte stores to the CPPR, for everything else, we need to do a 32-bit or 64-bit load.

Signed-off-by Benjamin Herrenschmidt <[email protected]>

Fixes 2c4fb78f78b6e420604ee1b05bdfb5c1d637869f

---
 arch/powerpc/kvm/book3s_hv_rm_xive.c    | 1 -
 arch/powerpc/kvm/book3s_xive.c          | 1 -
 arch/powerpc/kvm/book3s_xive_template.c | 7 ++++---
 3 files changed, 4 insertions(+), 5 deletions(-)

arch/powerpc/kvm/book3s_hv_rm_xive.c +0 -1

index abf5f01b6eb1..5b81a807d742 100644
@@ -38,7 +38,6 @@ static inline void __iomem *get_tima_phys(void)
 #define __x_tima		get_tima_phys()
 #define __x_eoi_page(xd)	((void __iomem *)((xd)->eoi_page))
 #define __x_trig_page(xd)	((void __iomem *)((xd)->trig_page))
-#define __x_readb	__raw_rm_readb
 #define __x_writeb	__raw_rm_writeb
 #define __x_readw	__raw_rm_readw
 #define __x_readq	__raw_rm_readq

arch/powerpc/kvm/book3s_xive.c +0 -1

index 08b200a0bbce..13304622ab1c 100644
@@ -48,7 +48,6 @@
 #define __x_tima		xive_tima
 #define __x_eoi_page(xd)	((void __iomem *)((xd)->eoi_mmio))
 #define __x_trig_page(xd)	((void __iomem *)((xd)->trig_mmio))
-#define __x_readb	__raw_readb
 #define __x_writeb	__raw_writeb
 #define __x_readw	__raw_readw
 #define __x_readq	__raw_readq

arch/powerpc/kvm/book3s_xive_template.c +4 -3

index d1ed2c41b5d2..c7a5deadd1cc 100644
@@ -28,7 +28,8 @@ static void GLUE(X_PFX,ack_pending)(struct kvmppc_xive_vcpu *xc)
 	 * bit.
 	 */
 	if (cpu_has_feature(CPU_FTR_POWER9_DD1)) {
-		u8 pipr = __x_readb(__x_tima + TM_QW1_OS + TM_PIPR);
+		__be64 qw1 = __x_readq(__x_tima + TM_QW1_OS);
+		u8 pipr = be64_to_cpu(qw1) & 0xff;
 		if (pipr >= xc->hw_cppr)
 			return;
 	}

@@ -336,7 +337,6 @@ X_STATIC unsigned long GLUE(X_PFX,h_ipoll)(struct kvm_vcpu *vcpu, unsigned long
 	struct kvmppc_xive_vcpu *xc = vcpu->arch.xive_vcpu;
 	u8 pending = xc->pending;
 	u32 hirq;
-	u8 pipr;
 
 	pr_devel("H_IPOLL(server=%ld)\n", server);

@@ -353,7 +353,8 @@ X_STATIC unsigned long GLUE(X_PFX,h_ipoll)(struct kvm_vcpu *vcpu, unsigned long
 		pending = 0xff;
 	} else {
 		/* Grab pending interrupt if any */
-		pipr = __x_readb(__x_tima + TM_QW1_OS + TM_PIPR);
+		__be64 qw1 = __x_readq(__x_tima + TM_QW1_OS);
+		u8 pipr = be64_to_cpu(qw1) & 0xff;
 		if (pipr < 8)
 			pending |= 1 << pipr;
 	}