arm64: dts: stratix10: fix up the gic register for the Stratix10 platform
Subsystems (2)
Dinh Nguyen
maintainerPATCH 1/2 arm64: dts: stratix10: fix up the gic register for the Stratix10 platform
The register entries for the ARM GIC-400 should have a 2nd set of address.
Signed-off-by Dinh Nguyen <[email protected]>
--- arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)
arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi +4 -4
@@ -75,10 +75,10 @@ compatible = "arm,gic-400", "arm,cortex-a15-gic"; #interrupt-cells = <3>; interrupt-controller; - reg = <0x0 0xfffc1000 0x1000>, - <0x0 0xfffc2000 0x2000>, - <0x0 0xfffc4000 0x2000>, - <0x0 0xfffc6000 0x2000>; + reg = <0x0 0xfffc1000 0x0 0x1000>, + <0x0 0xfffc2000 0x0 0x2000>, + <0x0 0xfffc4000 0x0 0x2000>, + <0x0 0xfffc6000 0x0 0x2000>; }; soc {
Signature · 1 line
2.7.4
Dinh Nguyen
maintainerPATCH 2/2 arm64: dts: stratix10: add ethernet/sdmmc support to the S10 devkit
Enable ethernet and sdmmc support on the Stratix10 devkit.
Signed-off-by Dinh Nguyen <[email protected]>
--- .../boot/dts/altera/socfpga_stratix10_socdk.dts | 36 ++++++++++++++++++++++ 1 file changed, 36 insertions(+)
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts +36 -0
@@ -34,6 +34,42 @@ }; }; +&gmac0 { + phy-mode = "rgmii"; + phy-addr = <0xffffffff>; /* probe for phy addr */ + + /* + * These skews assume the user's FPGA design is adding 600ps of delay + * for TX_CLK on Arria 10. + * + * All skews are offset since hardware skew values for the ksz9031 + * range from a negative skew to a positive skew. + * See the micrel-ksz90x1.txt Documentation file for details. + */ + txd0-skew-ps = <0>; /* -420ps */ + txd1-skew-ps = <0>; /* -420ps */ + txd2-skew-ps = <0>; /* -420ps */ + txd3-skew-ps = <0>; /* -420ps */ + rxd0-skew-ps = <420>; /* 0ps */ + rxd1-skew-ps = <420>; /* 0ps */ + rxd2-skew-ps = <420>; /* 0ps */ + rxd3-skew-ps = <420>; /* 0ps */ + txen-skew-ps = <0>; /* -420ps */ + txc-skew-ps = <1860>; /* 960ps */ + rxdv-skew-ps = <420>; /* 0ps */ + rxc-skew-ps = <1680>; /* 780ps */ + max-frame-size = <3800>; + status = "okay"; +}; + +&mmc { + status = "okay"; + num-slots = <1>; + cap-sd-highspeed; + broken-cd; + bus-width = <4>; +}; + &uart0 { status = "okay"; };
Signature · 1 line
2.7.4
PATCH 2/2 arm64: dts: stratix10: add ethernet/sdmmc support to the S10 devkit
Quoted 12 lines · Dinh Nguyen
Enable ethernet and sdmmc support on the Stratix10 devkit.
Signed-off-by Dinh Nguyen <[email protected]>--- .../boot/dts/altera/socfpga_stratix10_socdk.dts | 36 ++++++++++++++++++++++ 1 file changed, 36 insertions(+)arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts +0
-0
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts line 39
Quoted 6 lines
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts +3
-0@@ -34,6 +34,42 @@ }; }; +&gmac0 { + phy-mode = "rgmii"; + phy-addr = <0xffffffff>; /* probe for phy addr */
This is a deprecated property for stmmac, just use the correct PHY address and use a phy-handle property to connect to it, along with a proper mdio subnode to indicate it is connecting to the stmmac MDIO bus.
Quoted 11 lines
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts +11
-0+ + /* + * These skews assume the user's FPGA design is adding 600ps of delay + * for TX_CLK on Arria 10. + * + * All skews are offset since hardware skew values for the ksz9031 + * range from a negative skew to a positive skew. + * See the micrel-ksz90x1.txt Documentation file for details. + */ + txd0-skew-ps = <0>; /* -420ps */ + txd1-skew-ps = <0>; /* -420ps */
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts line 60
Quoted 10 lines
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts +10
-0+ txd2-skew-ps = <0>; /* -420ps */ + txd3-skew-ps = <0>; /* -420ps */ + rxd0-skew-ps = <420>; /* 0ps */ + rxd1-skew-ps = <420>; /* 0ps */ + rxd2-skew-ps = <420>; /* 0ps */ + rxd3-skew-ps = <420>; /* 0ps */ + txen-skew-ps = <0>; /* -420ps */ + txc-skew-ps = <1860>; /* 960ps */ + rxdv-skew-ps = <420>; /* 0ps */ + rxc-skew-ps = <1680>; /* 780ps */
These are all PHY properties, and the driver and binding now recommend using them as such, can you move that to the PHY node instead?
Quoted 16 lines
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts +12
-0+ max-frame-size = <3800>; + status = "okay"; +}; + +&mmc { + status = "okay"; + num-slots = <1>; + cap-sd-highspeed; + broken-cd; + bus-width = <4>; +}; + &uart0 { status = "okay"; };
Signature · 1 line
Florian