drm/syncobj: extract two helpers from drm_syncobj_create

From: Marek Olšák <[email protected]>

For amdgpu.

drm_syncobj_create is renamed to drm_syncobj_create_as_handle, and new helpers drm_syncobj_create and drm_syncobj_get_handle are added.

Signed-off-by Marek Olšák <[email protected]>

---
  drivers/gpu/drm/drm_syncobj.c | 49 +++++++++++++++++++++++++++++++++++++++----
  include/drm/drm_syncobj.h     |  4 ++++
  2 files changed, 49 insertions(+), 4 deletions(-)

drivers/gpu/drm/drm_syncobj.c +0 -0

index 0422b8c..0bb1741 100644

drivers/gpu/drm/drm_syncobj.c +45 -2

+/**
+ * drm_syncobj_create - create a new syncobj
+ * @out_syncobj: returned syncobj
+ * @flags: DRM_SYNCOBJ_* flags
+ * @fence: if non-NULL, the syncobj will represent this fence
+ */
+int drm_syncobj_create(struct drm_syncobj **out_syncobj, uint32_t flags,
+		       struct dma_fence *fence)
  {
  	int ret;
  	struct drm_syncobj *syncobj;

@@ -284,6 +290,25 @@ static int drm_syncobj_create(struct drm_file *file_private,
  		}
  	}
 
+	if (fence)
+		drm_syncobj_replace_fence(syncobj, fence);
+
+	*out_syncobj = syncobj;
+	return 0;
+}
+EXPORT_SYMBOL(drm_syncobj_create);
+
+/**
+ * drm_syncobj_get_handle - get a handle from a syncobj
+ */
+int drm_syncobj_get_handle(struct drm_file *file_private,
+			   struct drm_syncobj *syncobj, u32 *handle)
+{
+	int ret;
+
+	/* take a reference to put in the idr */
+	drm_syncobj_get(syncobj);
+
  	idr_preload(GFP_KERNEL);
  	spin_lock(&file_private->syncobj_table_lock);
  	ret = idr_alloc(&file_private->syncobj_idr, syncobj, 1, 0, GFP_NOWAIT);

@@ -299,6 +324,22 @@ static int drm_syncobj_create(struct drm_file *file_private,
  	*handle = ret;
  	return 0;
  }
+EXPORT_SYMBOL(drm_syncobj_get_handle);
+
+static int drm_syncobj_create_as_handle(struct drm_file *file_private,
+					u32 *handle, uint32_t flags)
+{
+	int ret;
+	struct drm_syncobj *syncobj;
+
+	ret = drm_syncobj_create(&syncobj, flags, NULL);
+	if (ret)
+		return ret;
+
+	ret = drm_syncobj_get_handle(file_private, syncobj, handle);
+	drm_syncobj_put(syncobj);
+	return ret;
+}
 
  static int drm_syncobj_destroy(struct drm_file *file_private,
  			       u32 handle)

@@ -522,8 +563,8 @@ drm_syncobj_create_ioctl(struct drm_device *dev, void *data,
  	if (args->flags & ~DRM_SYNCOBJ_CREATE_SIGNALED)
  		return -EINVAL;
 
-	return drm_syncobj_create(file_private,
-				  &args->handle, args->flags);
+	return drm_syncobj_create_as_handle(file_private,
+					    &args->handle, args->flags);
  }
 
  int

include/drm/drm_syncobj.h +0 -0

index c00fee5..e7f0035 100644

Quoted 20 lines · Marek Olšák

From: Marek Olšák <[email protected]>

For amdgpu.

drm_syncobj_create is renamed to drm_syncobj_create_as_handle, and new helpers drm_syncobj_create and drm_syncobj_get_handle are added.

Signed-off-by Marek Olšák <[email protected]>

---
  drivers/gpu/drm/drm_syncobj.c | 49
+++++++++++++++++++++++++++++++++++++++----
  include/drm/drm_syncobj.h     |  4 ++++
  2 files changed, 49 insertions(+), 4 deletions(-)

drivers/gpu/drm/drm_syncobj.c +0 -0

index 0422b8c..0bb1741 100644

drivers/gpu/drm/drm_syncobj.c void drm_syncobj_free(struct kref *kref) · line 265

Quoted 4 lines

drivers/gpu/drm/drm_syncobj.c +0 -1

@@ -262,8 +262,14 @@ void drm_syncobj_free(struct kref *kref)
  }
  EXPORT_SYMBOL(drm_syncobj_free);
  -static int drm_syncobj_create(struct drm_file *file_private,
-                             u32 *handle, uint32_t flags)

You can add a new parameter for passing dma fence, then in patch3, you can directly use it for AMDGPU_FENCE_TO HANDLE_GET_SYNCOBJ.

otherwise the set looks good to me.

Quoted 31 lines · Chunming Zhou

Quoted 20 lines · Marek Olšák

From: Marek Olšák <[email protected]>

For amdgpu.

drm_syncobj_create is renamed to drm_syncobj_create_as_handle, and new helpers drm_syncobj_create and drm_syncobj_get_handle are added.

Signed-off-by Marek Olšák <[email protected]>

---
  drivers/gpu/drm/drm_syncobj.c | 49
+++++++++++++++++++++++++++++++++++++++----
  include/drm/drm_syncobj.h     |  4 ++++
  2 files changed, 49 insertions(+), 4 deletions(-)

drivers/gpu/drm/drm_syncobj.c +0 -0

index 0422b8c..0bb1741 100644

drivers/gpu/drm/drm_syncobj.c void drm_syncobj_free(struct kref *kref) · line 265

Quoted 4 lines

drivers/gpu/drm/drm_syncobj.c +0 -1

@@ -262,8 +262,14 @@ void drm_syncobj_free(struct kref *kref)
  }
  EXPORT_SYMBOL(drm_syncobj_free);
  -static int drm_syncobj_create(struct drm_file *file_private,
-                             u32 *handle, uint32_t flags)

You can add a new parameter for passing dma fence, then in patch3, you can directly use it for AMDGPU_FENCE_TO HANDLE_GET_SYNCOBJ.

Quoted 1 line

otherwise the set looks good to me.

Sorry I just pushed this.

Quoted 29 lines · Marek Olšák

Quoted 28 lines · Chunming Zhou

Quoted 19 lines · Marek Olšák

From: Marek Olšák <[email protected]>

For amdgpu.

drm_syncobj_create is renamed to drm_syncobj_create_as_handle, and new helpers drm_syncobj_create and drm_syncobj_get_handle are added.

Signed-off-by Marek Olšák <[email protected]>

---
   drivers/gpu/drm/drm_syncobj.c | 49
+++++++++++++++++++++++++++++++++++++++----
   include/drm/drm_syncobj.h     |  4 ++++
   2 files changed, 49 insertions(+), 4 deletions(-)

drivers/gpu/drm/drm_syncobj.c +0 -0

index 0422b8c..0bb1741 100644

drivers/gpu/drm/drm_syncobj.c void drm_syncobj_free(struct kref *kref) · line 265

Quoted 4 lines

drivers/gpu/drm/drm_syncobj.c +0 -1

@@ -262,8 +262,14 @@ void drm_syncobj_free(struct kref *kref)
   }
   EXPORT_SYMBOL(drm_syncobj_free);
   -static int drm_syncobj_create(struct drm_file *file_private,
-                             u32 *handle, uint32_t flags)

You can add a new parameter for passing dma fence, then in patch3, you can directly use it for AMDGPU_FENCE_TO HANDLE_GET_SYNCOBJ.

Quoted 2 lines

Quoted 1 line

otherwise the set looks good to me.

Sorry I just pushed this.

Actually, you commented on a deleted line. The function already has dma_fence among the parameters.

Marek

From a34c466f4a8617c18bf191d83bff3a3382166b00 Mon Sep 17 00:00:00 2001

My mean is like the attached, I revert part of yours.

Regards,

David zhou

Quoted 45 lines · Marek Olšák

Quoted 35 lines · Marek Olšák

Quoted 33 lines · Chunming Zhou

Quoted 21 lines · Marek Olšák

From: Marek Olšák <[email protected]>

For amdgpu.

drm_syncobj_create is renamed to drm_syncobj_create_as_handle, and new helpers drm_syncobj_create and drm_syncobj_get_handle are added.

Signed-off-by Marek Olšák <[email protected]>

---
   drivers/gpu/drm/drm_syncobj.c | 49
+++++++++++++++++++++++++++++++++++++++----
   include/drm/drm_syncobj.h     |  4 ++++
   2 files changed, 49 insertions(+), 4 deletions(-)

drivers/gpu/drm/drm_syncobj.c +0 -0

index 0422b8c..0bb1741 100644

drivers/gpu/drm/drm_syncobj.c void drm_syncobj_free(struct kref *kref) · line 265

Quoted 4 lines

drivers/gpu/drm/drm_syncobj.c +0 -1

@@ -262,8 +262,14 @@ void drm_syncobj_free(struct kref *kref)
   }
   EXPORT_SYMBOL(drm_syncobj_free);
   -static int drm_syncobj_create(struct drm_file *file_private,
-                             u32 *handle, uint32_t flags)

You can add a new parameter for passing dma fence, then in patch3, you can
directly use it for AMDGPU_FENCE_TO HANDLE_GET_SYNCOBJ.

Quoted 3 lines

Quoted 1 line

otherwise the set looks good to me.

Sorry I just pushed this.

Actually, you commented on a deleted line. The function already has dma_fence among the parameters.

Marek

My mean is like the attached, I revert part of yours.

Regards,

David zhou

Quoted 45 lines · Marek Olšák

Quoted 35 lines · Marek Olšák

Quoted 33 lines · Chunming Zhou

Quoted 21 lines · Marek Olšák

From: Marek Olšák <[email protected]>

For amdgpu.

drm_syncobj_create is renamed to drm_syncobj_create_as_handle, and new helpers drm_syncobj_create and drm_syncobj_get_handle are added.

Signed-off-by Marek Olšák <[email protected]>

---
   drivers/gpu/drm/drm_syncobj.c | 49
+++++++++++++++++++++++++++++++++++++++----
   include/drm/drm_syncobj.h     |  4 ++++
   2 files changed, 49 insertions(+), 4 deletions(-)

drivers/gpu/drm/drm_syncobj.c +0 -0

index 0422b8c..0bb1741 100644

drivers/gpu/drm/drm_syncobj.c void drm_syncobj_free(struct kref *kref) · line 265

Quoted 4 lines

drivers/gpu/drm/drm_syncobj.c +0 -1

@@ -262,8 +262,14 @@ void drm_syncobj_free(struct kref *kref)
   }
   EXPORT_SYMBOL(drm_syncobj_free);
   -static int drm_syncobj_create(struct drm_file *file_private,
-                             u32 *handle, uint32_t flags)

You can add a new parameter for passing dma fence, then in patch3, you can
directly use it for AMDGPU_FENCE_TO HANDLE_GET_SYNCOBJ.

Quoted 3 lines

Quoted 1 line

otherwise the set looks good to me.

Sorry I just pushed this.

Actually, you commented on a deleted line. The function already has dma_fence among the parameters.

Marek

Could you test and review it? On hand, I have no env.

Regards,
David Zhou

发自坚果 Pro

Marek Ol?醟 <[email protected]> 于 2017年9月30日 下午11:56写道：

The idea sounds good.

Marek

Quoted 56 lines · Chunming Zhou

My mean is like the attached, I revert part of yours.

Regards,

David zhou

Quoted 45 lines · Marek Olšák

Quoted 35 lines · Marek Olšák

Quoted 33 lines · Chunming Zhou

Quoted 21 lines · Marek Olšák

From: Marek Olšák <[email protected]>

For amdgpu.

drm_syncobj_create is renamed to drm_syncobj_create_as_handle, and new helpers drm_syncobj_create and drm_syncobj_get_handle are added.

Signed-off-by Marek Olšák <[email protected]>

---
   drivers/gpu/drm/drm_syncobj.c | 49
+++++++++++++++++++++++++++++++++++++++----
   include/drm/drm_syncobj.h     |  4 ++++
   2 files changed, 49 insertions(+), 4 deletions(-)

drivers/gpu/drm/drm_syncobj.c +0 -0

index 0422b8c..0bb1741 100644

drivers/gpu/drm/drm_syncobj.c void drm_syncobj_free(struct kref *kref) · line 265

Quoted 4 lines

drivers/gpu/drm/drm_syncobj.c +0 -1

@@ -262,8 +262,14 @@ void drm_syncobj_free(struct kref *kref)
   }
   EXPORT_SYMBOL(drm_syncobj_free);
   -static int drm_syncobj_create(struct drm_file *file_private,
-                             u32 *handle, uint32_t flags)

You can add a new parameter for passing dma fence, then in patch3, you can
directly use it for AMDGPU_FENCE_TO HANDLE_GET_SYNCOBJ.

Quoted 3 lines

Quoted 1 line

otherwise the set looks good to me.

Sorry I just pushed this.

Actually, you commented on a deleted line. The function already has dma_fence among the parameters.

Marek

From: Marek Olšák <[email protected]>

for being able to convert an amdgpu fence into one of the handles. Mesa will use this.

Signed-off-by Marek Olšák <[email protected]>

---
  drivers/gpu/drm/amd/amdgpu/amdgpu.h     |  2 ++
  drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c  | 61 +++++++++++++++++++++++++++++++++
  drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c |  3 +-
  drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c |  1 +
  include/uapi/drm/amdgpu_drm.h           | 16 +++++++++
  5 files changed, 82 insertions(+), 1 deletion(-)

drivers/gpu/drm/amd/amdgpu/amdgpu.h +2 -0

index b5c8b90..c15fa93 100644
@@ -1308,6 +1308,8 @@ int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data,
  int amdgpu_gem_op_ioctl(struct drm_device *dev, void *data,
  			struct drm_file *filp);
  int amdgpu_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp);
+int amdgpu_cs_fence_to_handle_ioctl(struct drm_device *dev, void *data,
+				    struct drm_file *filp);
  int amdgpu_cs_wait_ioctl(struct drm_device *dev, void *data, struct drm_file *filp);
  int amdgpu_cs_wait_fences_ioctl(struct drm_device *dev, void *data,
  				struct drm_file *filp);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c +61 -0

index 7cb8a59..6dd719c 100644
@@ -25,6 +25,7 @@
   *    Jerome Glisse <[email protected]>
   */
  #include <linux/pagemap.h>
+#include <linux/sync_file.h>
  #include <drm/drmP.h>
  #include <drm/amdgpu_drm.h>
  #include <drm/drm_syncobj.h>

@@ -1311,6 +1312,66 @@ static struct dma_fence *amdgpu_cs_get_fence(struct amdgpu_device *adev,
  	return fence;
  }
 
+int amdgpu_cs_fence_to_handle_ioctl(struct drm_device *dev, void *data,
+				    struct drm_file *filp)
+{
+	struct amdgpu_device *adev = dev->dev_private;
+	struct amdgpu_fpriv *fpriv = filp->driver_priv;
+	union drm_amdgpu_fence_to_handle *info = data;
+	struct dma_fence *fence;
+	struct drm_syncobj *syncobj;
+	struct sync_file *sync_file;
+	int fd, r;
+
+	if (amdgpu_kms_vram_lost(adev, fpriv))
+		return -ENODEV;
+
+	fence = amdgpu_cs_get_fence(adev, filp, &info->in.fence);
+	if (IS_ERR(fence))
+		return PTR_ERR(fence);
+
+	switch (info->in.what) {
+	case AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ:
+		r = drm_syncobj_create(&syncobj, 0, fence);
+		dma_fence_put(fence);
+		if (r)
+			return r;
+		r = drm_syncobj_get_handle(filp, syncobj, &info->out.handle);
+		drm_syncobj_put(syncobj);
+		return r;
+
+	case AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ_FD:
+		r = drm_syncobj_create(&syncobj, 0, fence);
+		dma_fence_put(fence);
+		if (r)
+			return r;
+		r = drm_syncobj_get_fd(syncobj, (int*)&info->out.handle);
+		drm_syncobj_put(syncobj);
+		return r;
+
+	case AMDGPU_FENCE_TO_HANDLE_GET_SYNC_FILE_FD:
+		fd = get_unused_fd_flags(O_CLOEXEC);
+		if (fd < 0) {
+			dma_fence_put(fence);
+			return fd;
+		}
+
+		sync_file = sync_file_create(fence);
+		dma_fence_put(fence);
+		if (!sync_file) {
+			put_unused_fd(fd);
+			return -ENOMEM;
+		}
+
+		fd_install(fd, sync_file->file);
+		info->out.handle = fd;
+		return 0;
+
+	default:
+		return -EINVAL;
+	}
+}
+
  /**
   * amdgpu_cs_wait_all_fence - wait on all fences to signal
   *

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +2 -1

index d01aca6..1e38411 100644
@@ -70,9 +70,10 @@
   * - 3.18.0 - Export gpu always on cu bitmap
   * - 3.19.0 - Add support for UVD MJPEG decode
   * - 3.20.0 - Add support for local BOs
+ * - 3.21.0 - Add DRM_AMDGPU_FENCE_TO_HANDLE ioctl
   */
  #define KMS_DRIVER_MAJOR	3
-#define KMS_DRIVER_MINOR	20
+#define KMS_DRIVER_MINOR	21
  #define KMS_DRIVER_PATCHLEVEL	0
 
  int amdgpu_vram_limit = 0;

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +1 -0

index d31777b..b09d315 100644
@@ -1021,6 +1021,7 @@ const struct drm_ioctl_desc amdgpu_ioctls_kms[] = {
  	DRM_IOCTL_DEF_DRV(AMDGPU_CTX, amdgpu_ctx_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),
  	DRM_IOCTL_DEF_DRV(AMDGPU_VM, amdgpu_vm_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),
  	DRM_IOCTL_DEF_DRV(AMDGPU_BO_LIST, amdgpu_bo_list_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),
+	DRM_IOCTL_DEF_DRV(AMDGPU_FENCE_TO_HANDLE, amdgpu_cs_fence_to_handle_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),
  	/* KMS */
  	DRM_IOCTL_DEF_DRV(AMDGPU_GEM_MMAP, amdgpu_gem_mmap_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),
  	DRM_IOCTL_DEF_DRV(AMDGPU_GEM_WAIT_IDLE, amdgpu_gem_wait_idle_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),

include/uapi/drm/amdgpu_drm.h +9 -0

index 9f5bd97..ec57cd0 100644
@@ -53,6 +53,7 @@ extern "C" {
  #define DRM_AMDGPU_WAIT_FENCES		0x12
  #define DRM_AMDGPU_VM			0x13
  #define DRM_AMDGPU_FREESYNC	        0x14
+#define DRM_AMDGPU_FENCE_TO_HANDLE	0x15
 
  #define DRM_IOCTL_AMDGPU_GEM_CREATE	DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_CREATE, union drm_amdgpu_gem_create)
  #define DRM_IOCTL_AMDGPU_GEM_MMAP	DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_MMAP, union drm_amdgpu_gem_mmap)

@@ -69,6 +70,7 @@ extern "C" {
  #define DRM_IOCTL_AMDGPU_WAIT_FENCES	DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_WAIT_FENCES, union drm_amdgpu_wait_fences)
  #define DRM_IOCTL_AMDGPU_VM		DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_VM, union drm_amdgpu_vm)
  #define DRM_IOCTL_AMDGPU_FREESYNC	DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_FREESYNC, struct drm_amdgpu_freesync)
+#define DRM_IOCTL_AMDGPU_FENCE_TO_HANDLE DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_FENCE_TO_HANDLE, union drm_amdgpu_fence_to_handle)
 
  #define AMDGPU_GEM_DOMAIN_CPU		0x1
  #define AMDGPU_GEM_DOMAIN_GTT		0x2

@@ -517,6 +519,20 @@ struct drm_amdgpu_cs_chunk_sem {
  	__u32 handle;
  };
 
+#define AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ	0
+#define AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ_FD	1
+#define AMDGPU_FENCE_TO_HANDLE_GET_SYNC_FILE_FD	2
+
+union drm_amdgpu_fence_to_handle {
+	struct {
+		struct drm_amdgpu_fence fence;

UMD don't need to construct ip_type/ip_instance/ctx_id/ring

Hi Marek,

You're doing same things with me, see my "introduce syncfile as fence reuturn" patch set, which makes things more simple, we just need to directly return syncfile fd to UMD when CS, then the fence UMD get will be always syncfile fd, UMD don't need to construct ip_type/ip_instance/ctx_id/ring any more, which also can pass to dependency and syncobj as well.

Regards,
David Zhou

Quoted 186 lines · Marek Olšák

From: Marek Olšák <[email protected]>

for being able to convert an amdgpu fence into one of the handles. Mesa will use this.

Signed-off-by Marek Olšák <[email protected]>

---
  drivers/gpu/drm/amd/amdgpu/amdgpu.h     |  2 ++
  drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c  | 61 
+++++++++++++++++++++++++++++++++
  drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c |  3 +-
  drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c |  1 +
  include/uapi/drm/amdgpu_drm.h           | 16 +++++++++
  5 files changed, 82 insertions(+), 1 deletion(-)

drivers/gpu/drm/amd/amdgpu/amdgpu.h +2 -0

index b5c8b90..c15fa93 100644
@@ -1308,6 +1308,8 @@ int amdgpu_gem_va_ioctl(struct drm_device *dev, 
 void *data,
  int amdgpu_gem_op_ioctl(struct drm_device *dev, void *data,
              struct drm_file *filp);
  int amdgpu_cs_ioctl(struct drm_device *dev, void *data, struct 
 drm_file *filp);
+int amdgpu_cs_fence_to_handle_ioctl(struct drm_device *dev, void *data,
+                    struct drm_file *filp);
  int amdgpu_cs_wait_ioctl(struct drm_device *dev, void *data, struct 

drm_file *filp);
int amdgpu_cs_wait_fences_ioctl(struct drm_device *dev, void *data,

                  struct drm_file *filp);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c +60 -0

index 7cb8a59..6dd719c 100644
@@ -25,6 +25,7 @@
   *    Jerome Glisse <[email protected]>
   */
  #include <linux/pagemap.h>
+#include <linux/sync_file.h>
  #include <drm/drmP.h>
  #include <drm/amdgpu_drm.h>
  #include <drm/drm_syncobj.h>

@@ -1311,6 +1312,66 @@ static struct dma_fence 
 *amdgpu_cs_get_fence(struct amdgpu_device *adev,
      return fence;
  }
  +int amdgpu_cs_fence_to_handle_ioctl(struct drm_device *dev, void 
 *data,
+                    struct drm_file *filp)
+{
+    struct amdgpu_device *adev = dev->dev_private;
+    struct amdgpu_fpriv *fpriv = filp->driver_priv;
+    union drm_amdgpu_fence_to_handle *info = data;
+    struct dma_fence *fence;
+    struct drm_syncobj *syncobj;
+    struct sync_file *sync_file;
+    int fd, r;
+
+    if (amdgpu_kms_vram_lost(adev, fpriv))
+        return -ENODEV;
+
+    fence = amdgpu_cs_get_fence(adev, filp, &info->in.fence);
+    if (IS_ERR(fence))
+        return PTR_ERR(fence);
+
+    switch (info->in.what) {
+    case AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ:
+        r = drm_syncobj_create(&syncobj, 0, fence);
+        dma_fence_put(fence);
+        if (r)
+            return r;
+        r = drm_syncobj_get_handle(filp, syncobj, &info->out.handle);
+        drm_syncobj_put(syncobj);
+        return r;
+
+    case AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ_FD:
+        r = drm_syncobj_create(&syncobj, 0, fence);
+        dma_fence_put(fence);
+        if (r)
+            return r;
+        r = drm_syncobj_get_fd(syncobj, (int*)&info->out.handle);
+        drm_syncobj_put(syncobj);
+        return r;
+
+    case AMDGPU_FENCE_TO_HANDLE_GET_SYNC_FILE_FD:
+        fd = get_unused_fd_flags(O_CLOEXEC);
+        if (fd < 0) {
+            dma_fence_put(fence);
+            return fd;
+        }
+
+        sync_file = sync_file_create(fence);
+        dma_fence_put(fence);
+        if (!sync_file) {
+            put_unused_fd(fd);
+            return -ENOMEM;
+        }
+
+        fd_install(fd, sync_file->file);
+        info->out.handle = fd;
+        return 0;
+
+    default:
+        return -EINVAL;
+    }
+}
+
  /**
   * amdgpu_cs_wait_all_fence - wait on all fences to signal
   *

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +2 -1

index d01aca6..1e38411 100644
@@ -70,9 +70,10 @@
   * - 3.18.0 - Export gpu always on cu bitmap
   * - 3.19.0 - Add support for UVD MJPEG decode
   * - 3.20.0 - Add support for local BOs
+ * - 3.21.0 - Add DRM_AMDGPU_FENCE_TO_HANDLE ioctl
   */
  #define KMS_DRIVER_MAJOR    3
-#define KMS_DRIVER_MINOR    20
+#define KMS_DRIVER_MINOR    21
  #define KMS_DRIVER_PATCHLEVEL    0
    int amdgpu_vram_limit = 0;

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +0 -0

index d31777b..b09d315 100644
@@ -1021,6 +1021,7 @@ const struct drm_ioctl_desc amdgpu_ioctls_kms[] 
 = {
      DRM_IOCTL_DEF_DRV(AMDGPU_CTX, amdgpu_ctx_ioctl, 
 DRM_AUTH|DRM_RENDER_ALLOW),
      DRM_IOCTL_DEF_DRV(AMDGPU_VM, amdgpu_vm_ioctl, 
 DRM_AUTH|DRM_RENDER_ALLOW),
      DRM_IOCTL_DEF_DRV(AMDGPU_BO_LIST, amdgpu_bo_list_ioctl, 

DRM_AUTH|DRM_RENDER_ALLOW),
+ DRM_IOCTL_DEF_DRV(AMDGPU_FENCE_TO_HANDLE,
amdgpu_cs_fence_to_handle_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),

      /* KMS */
      DRM_IOCTL_DEF_DRV(AMDGPU_GEM_MMAP, amdgpu_gem_mmap_ioctl, 

DRM_AUTH|DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(AMDGPU_GEM_WAIT_IDLE,
amdgpu_gem_wait_idle_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),

include/uapi/drm/amdgpu_drm.h +1 -0

index 9f5bd97..ec57cd0 100644
@@ -53,6 +53,7 @@ extern "C" {
  #define DRM_AMDGPU_WAIT_FENCES        0x12
  #define DRM_AMDGPU_VM            0x13
  #define DRM_AMDGPU_FREESYNC            0x14
+#define DRM_AMDGPU_FENCE_TO_HANDLE    0x15
    #define DRM_IOCTL_AMDGPU_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + 
 DRM_AMDGPU_GEM_CREATE, union drm_amdgpu_gem_create)
  #define DRM_IOCTL_AMDGPU_GEM_MMAP    DRM_IOWR(DRM_COMMAND_BASE + 

DRM_AMDGPU_GEM_MMAP, union drm_amdgpu_gem_mmap)

include/uapi/drm/amdgpu_drm.h +1 -0

@@ -69,6 +70,7 @@ extern "C" {
  #define DRM_IOCTL_AMDGPU_WAIT_FENCES DRM_IOWR(DRM_COMMAND_BASE + 
 DRM_AMDGPU_WAIT_FENCES, union drm_amdgpu_wait_fences)
  #define DRM_IOCTL_AMDGPU_VM        DRM_IOWR(DRM_COMMAND_BASE + 
 DRM_AMDGPU_VM, union drm_amdgpu_vm)
  #define DRM_IOCTL_AMDGPU_FREESYNC    DRM_IOWR(DRM_COMMAND_BASE + 
 DRM_AMDGPU_FREESYNC, struct drm_amdgpu_freesync)
+#define DRM_IOCTL_AMDGPU_FENCE_TO_HANDLE DRM_IOWR(DRM_COMMAND_BASE + 

DRM_AMDGPU_FENCE_TO_HANDLE, union drm_amdgpu_fence_to_handle)

    #define AMDGPU_GEM_DOMAIN_CPU        0x1

#define AMDGPU_GEM_DOMAIN_GTT 0x2

include/uapi/drm/amdgpu_drm.h +13 -0

@@ -517,6 +519,20 @@ struct drm_amdgpu_cs_chunk_sem {
      __u32 handle;
  };
  +#define AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ    0
+#define AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ_FD    1
+#define AMDGPU_FENCE_TO_HANDLE_GET_SYNC_FILE_FD    2
+
+union drm_amdgpu_fence_to_handle {
+    struct {
+        struct drm_amdgpu_fence fence;
+        __u32 what;
+    } in;
+    struct {
+        __u32 handle;
+    } out;
+};
+

include/uapi/drm/amdgpu_drm.h struct drm_amdgpu_cs_chunk_sem { · line 538

Quoted 3 lines

include/uapi/drm/amdgpu_drm.h +0 -0

  struct drm_amdgpu_cs_chunk_data {
      union {
          struct drm_amdgpu_cs_chunk_ib        ib_data;

_______________________________________________
amd-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Hi guys,

Mareks IOCTL proposal looks really good to me.

Please note that we already have sync_obj support for the CS IOCTL in the 4.13 branch and this work is based on top of that.

Quoted 1 line

UMD don't need to construct ip_type/ip_instance/ctx_id/ring

Well the UMD does want to construct ip_type/ip_instance/ctx_id/ring and use for the simple reason that it allows more flexibility than sync_obj/sync_file.

Thinking more about this I'm pretty sure we want to do something similar for VM map/unmap operations as well.

Regards,
Christian.

Am 13.09.2017 um 05:03 schrieb zhoucm1:

Quoted 202 lines

Hi Marek,

You're doing same things with me, see my "introduce syncfile as fence reuturn" patch set, which makes things more simple, we just need to directly return syncfile fd to UMD when CS, then the fence UMD get will be always syncfile fd, UMD don't need to construct ip_type/ip_instance/ctx_id/ring any more, which also can pass to dependency and syncobj as well.

Regards,
David Zhou

Quoted 180 lines · Marek Olšák

From: Marek Olšák <[email protected]>

for being able to convert an amdgpu fence into one of the handles. Mesa will use this.

Signed-off-by Marek Olšák <[email protected]>

---
  drivers/gpu/drm/amd/amdgpu/amdgpu.h     |  2 ++
  drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c  | 61 
+++++++++++++++++++++++++++++++++
  drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c |  3 +-
  drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c |  1 +
  include/uapi/drm/amdgpu_drm.h           | 16 +++++++++
  5 files changed, 82 insertions(+), 1 deletion(-)

drivers/gpu/drm/amd/amdgpu/amdgpu.h +2 -0

index b5c8b90..c15fa93 100644
@@ -1308,6 +1308,8 @@ int amdgpu_gem_va_ioctl(struct drm_device 
 *dev, void *data,
  int amdgpu_gem_op_ioctl(struct drm_device *dev, void *data,
              struct drm_file *filp);
  int amdgpu_cs_ioctl(struct drm_device *dev, void *data, struct 
 drm_file *filp);
+int amdgpu_cs_fence_to_handle_ioctl(struct drm_device *dev, void 
 *data,
+                    struct drm_file *filp);

int amdgpu_cs_wait_ioctl(struct drm_device *dev, void *data,
struct drm_file *filp);
int amdgpu_cs_wait_fences_ioctl(struct drm_device *dev, void *data,

                  struct drm_file *filp);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c +60 -0

index 7cb8a59..6dd719c 100644
@@ -25,6 +25,7 @@
   *    Jerome Glisse <[email protected]>
   */
  #include <linux/pagemap.h>
+#include <linux/sync_file.h>
  #include <drm/drmP.h>
  #include <drm/amdgpu_drm.h>
  #include <drm/drm_syncobj.h>

@@ -1311,6 +1312,66 @@ static struct dma_fence 
 *amdgpu_cs_get_fence(struct amdgpu_device *adev,
      return fence;
  }
  +int amdgpu_cs_fence_to_handle_ioctl(struct drm_device *dev, void 
 *data,
+                    struct drm_file *filp)
+{
+    struct amdgpu_device *adev = dev->dev_private;
+    struct amdgpu_fpriv *fpriv = filp->driver_priv;
+    union drm_amdgpu_fence_to_handle *info = data;
+    struct dma_fence *fence;
+    struct drm_syncobj *syncobj;
+    struct sync_file *sync_file;
+    int fd, r;
+
+    if (amdgpu_kms_vram_lost(adev, fpriv))
+        return -ENODEV;
+
+    fence = amdgpu_cs_get_fence(adev, filp, &info->in.fence);
+    if (IS_ERR(fence))
+        return PTR_ERR(fence);
+
+    switch (info->in.what) {
+    case AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ:
+        r = drm_syncobj_create(&syncobj, 0, fence);
+        dma_fence_put(fence);
+        if (r)
+            return r;
+        r = drm_syncobj_get_handle(filp, syncobj, &info->out.handle);
+        drm_syncobj_put(syncobj);
+        return r;
+
+    case AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ_FD:
+        r = drm_syncobj_create(&syncobj, 0, fence);
+        dma_fence_put(fence);
+        if (r)
+            return r;
+        r = drm_syncobj_get_fd(syncobj, (int*)&info->out.handle);
+        drm_syncobj_put(syncobj);
+        return r;
+
+    case AMDGPU_FENCE_TO_HANDLE_GET_SYNC_FILE_FD:
+        fd = get_unused_fd_flags(O_CLOEXEC);
+        if (fd < 0) {
+            dma_fence_put(fence);
+            return fd;
+        }
+
+        sync_file = sync_file_create(fence);
+        dma_fence_put(fence);
+        if (!sync_file) {
+            put_unused_fd(fd);
+            return -ENOMEM;
+        }
+
+        fd_install(fd, sync_file->file);
+        info->out.handle = fd;
+        return 0;
+
+    default:
+        return -EINVAL;
+    }
+}
+
  /**
   * amdgpu_cs_wait_all_fence - wait on all fences to signal
   *

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +2 -1

index d01aca6..1e38411 100644
@@ -70,9 +70,10 @@
   * - 3.18.0 - Export gpu always on cu bitmap
   * - 3.19.0 - Add support for UVD MJPEG decode
   * - 3.20.0 - Add support for local BOs
+ * - 3.21.0 - Add DRM_AMDGPU_FENCE_TO_HANDLE ioctl
   */
  #define KMS_DRIVER_MAJOR    3
-#define KMS_DRIVER_MINOR    20
+#define KMS_DRIVER_MINOR    21
  #define KMS_DRIVER_PATCHLEVEL    0
    int amdgpu_vram_limit = 0;

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +0 -0

index d31777b..b09d315 100644
@@ -1021,6 +1021,7 @@ const struct drm_ioctl_desc 
 amdgpu_ioctls_kms[] = {
      DRM_IOCTL_DEF_DRV(AMDGPU_CTX, amdgpu_ctx_ioctl, 
 DRM_AUTH|DRM_RENDER_ALLOW),
      DRM_IOCTL_DEF_DRV(AMDGPU_VM, amdgpu_vm_ioctl, 
 DRM_AUTH|DRM_RENDER_ALLOW),
      DRM_IOCTL_DEF_DRV(AMDGPU_BO_LIST, amdgpu_bo_list_ioctl, 

DRM_AUTH|DRM_RENDER_ALLOW),
+ DRM_IOCTL_DEF_DRV(AMDGPU_FENCE_TO_HANDLE,
amdgpu_cs_fence_to_handle_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),

      /* KMS */
      DRM_IOCTL_DEF_DRV(AMDGPU_GEM_MMAP, amdgpu_gem_mmap_ioctl, 

DRM_AUTH|DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(AMDGPU_GEM_WAIT_IDLE,
amdgpu_gem_wait_idle_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),

include/uapi/drm/amdgpu_drm.h +1 -0

index 9f5bd97..ec57cd0 100644
@@ -53,6 +53,7 @@ extern "C" {
  #define DRM_AMDGPU_WAIT_FENCES        0x12
  #define DRM_AMDGPU_VM            0x13
  #define DRM_AMDGPU_FREESYNC            0x14
+#define DRM_AMDGPU_FENCE_TO_HANDLE    0x15
    #define DRM_IOCTL_AMDGPU_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + 
 DRM_AMDGPU_GEM_CREATE, union drm_amdgpu_gem_create)
  #define DRM_IOCTL_AMDGPU_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + 

DRM_AMDGPU_GEM_MMAP, union drm_amdgpu_gem_mmap)

include/uapi/drm/amdgpu_drm.h +8 -0

@@ -69,6 +70,7 @@ extern "C" {
  #define DRM_IOCTL_AMDGPU_WAIT_FENCES DRM_IOWR(DRM_COMMAND_BASE + 
 DRM_AMDGPU_WAIT_FENCES, union drm_amdgpu_wait_fences)
  #define DRM_IOCTL_AMDGPU_VM        DRM_IOWR(DRM_COMMAND_BASE + 
 DRM_AMDGPU_VM, union drm_amdgpu_vm)
  #define DRM_IOCTL_AMDGPU_FREESYNC DRM_IOWR(DRM_COMMAND_BASE + 
 DRM_AMDGPU_FREESYNC, struct drm_amdgpu_freesync)
+#define DRM_IOCTL_AMDGPU_FENCE_TO_HANDLE DRM_IOWR(DRM_COMMAND_BASE 
+ DRM_AMDGPU_FENCE_TO_HANDLE, union drm_amdgpu_fence_to_handle)
    #define AMDGPU_GEM_DOMAIN_CPU        0x1
  #define AMDGPU_GEM_DOMAIN_GTT        0x2

@@ -517,6 +519,20 @@ struct drm_amdgpu_cs_chunk_sem {
      __u32 handle;
  };
  +#define AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ    0
+#define AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ_FD    1
+#define AMDGPU_FENCE_TO_HANDLE_GET_SYNC_FILE_FD    2
+
+union drm_amdgpu_fence_to_handle {
+    struct {
+        struct drm_amdgpu_fence fence;

include/uapi/drm/amdgpu_drm.h struct drm_amdgpu_cs_chunk_sem { · line 537

Quoted 10 lines

include/uapi/drm/amdgpu_drm.h +7 -0

+        __u32 what;
+    } in;
+    struct {
+        __u32 handle;
+    } out;
+};
+
  struct drm_amdgpu_cs_chunk_data {
      union {
          struct drm_amdgpu_cs_chunk_ib        ib_data;

_______________________________________________
amd-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

I really very surprise that you prefer to expand sync_obj to get syncfile fd!!!

Why not directly generate syncfile fd and use it? Which one is simple is so obvious.

Regards,
David Zhou

Quoted 7 lines · Christian König

Hi guys,

Mareks IOCTL proposal looks really good to me.

Please note that we already have sync_obj support for the CS IOCTL in the 4.13 branch and this work is based on top of that.

Quoted 1 line

UMD don't need to construct ip_type/ip_instance/ctx_id/ring

Quoted 212 lines

Well the UMD does want to construct ip_type/ip_instance/ctx_id/ring and use for the simple reason that it allows more flexibility than sync_obj/sync_file.

Thinking more about this I'm pretty sure we want to do something similar for VM map/unmap operations as well.

Regards,
Christian.

Am 13.09.2017 um 05:03 schrieb zhoucm1:

Quoted 202 lines

Hi Marek,

You're doing same things with me, see my "introduce syncfile as fence reuturn" patch set, which makes things more simple, we just need to directly return syncfile fd to UMD when CS, then the fence UMD get will be always syncfile fd, UMD don't need to construct ip_type/ip_instance/ctx_id/ring any more, which also can pass to dependency and syncobj as well.

Regards,
David Zhou

Quoted 180 lines · Marek Olšák

From: Marek Olšák <[email protected]>

for being able to convert an amdgpu fence into one of the handles. Mesa will use this.

Signed-off-by Marek Olšák <[email protected]>

---
  drivers/gpu/drm/amd/amdgpu/amdgpu.h     |  2 ++
  drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c  | 61 
+++++++++++++++++++++++++++++++++
  drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c |  3 +-
  drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c |  1 +
  include/uapi/drm/amdgpu_drm.h           | 16 +++++++++
  5 files changed, 82 insertions(+), 1 deletion(-)

drivers/gpu/drm/amd/amdgpu/amdgpu.h +2 -0

index b5c8b90..c15fa93 100644
@@ -1308,6 +1308,8 @@ int amdgpu_gem_va_ioctl(struct drm_device 
 *dev, void *data,
  int amdgpu_gem_op_ioctl(struct drm_device *dev, void *data,
              struct drm_file *filp);
  int amdgpu_cs_ioctl(struct drm_device *dev, void *data, struct 
 drm_file *filp);
+int amdgpu_cs_fence_to_handle_ioctl(struct drm_device *dev, void 
 *data,
+                    struct drm_file *filp);

int amdgpu_cs_wait_ioctl(struct drm_device *dev, void *data,
struct drm_file *filp);
int amdgpu_cs_wait_fences_ioctl(struct drm_device *dev, void *data,

                  struct drm_file *filp);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c +60 -0

index 7cb8a59..6dd719c 100644
@@ -25,6 +25,7 @@
   *    Jerome Glisse <[email protected]>
   */
  #include <linux/pagemap.h>
+#include <linux/sync_file.h>
  #include <drm/drmP.h>
  #include <drm/amdgpu_drm.h>
  #include <drm/drm_syncobj.h>

@@ -1311,6 +1312,66 @@ static struct dma_fence 
 *amdgpu_cs_get_fence(struct amdgpu_device *adev,
      return fence;
  }
  +int amdgpu_cs_fence_to_handle_ioctl(struct drm_device *dev, void 
 *data,
+                    struct drm_file *filp)
+{
+    struct amdgpu_device *adev = dev->dev_private;
+    struct amdgpu_fpriv *fpriv = filp->driver_priv;
+    union drm_amdgpu_fence_to_handle *info = data;
+    struct dma_fence *fence;
+    struct drm_syncobj *syncobj;
+    struct sync_file *sync_file;
+    int fd, r;
+
+    if (amdgpu_kms_vram_lost(adev, fpriv))
+        return -ENODEV;
+
+    fence = amdgpu_cs_get_fence(adev, filp, &info->in.fence);
+    if (IS_ERR(fence))
+        return PTR_ERR(fence);
+
+    switch (info->in.what) {
+    case AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ:
+        r = drm_syncobj_create(&syncobj, 0, fence);
+        dma_fence_put(fence);
+        if (r)
+            return r;
+        r = drm_syncobj_get_handle(filp, syncobj, &info->out.handle);
+        drm_syncobj_put(syncobj);
+        return r;
+
+    case AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ_FD:
+        r = drm_syncobj_create(&syncobj, 0, fence);
+        dma_fence_put(fence);
+        if (r)
+            return r;
+        r = drm_syncobj_get_fd(syncobj, (int*)&info->out.handle);
+        drm_syncobj_put(syncobj);
+        return r;
+
+    case AMDGPU_FENCE_TO_HANDLE_GET_SYNC_FILE_FD:
+        fd = get_unused_fd_flags(O_CLOEXEC);
+        if (fd < 0) {
+            dma_fence_put(fence);
+            return fd;
+        }
+
+        sync_file = sync_file_create(fence);
+        dma_fence_put(fence);
+        if (!sync_file) {
+            put_unused_fd(fd);
+            return -ENOMEM;
+        }
+
+        fd_install(fd, sync_file->file);
+        info->out.handle = fd;
+        return 0;
+
+    default:
+        return -EINVAL;
+    }
+}
+
  /**
   * amdgpu_cs_wait_all_fence - wait on all fences to signal
   *

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +2 -1

index d01aca6..1e38411 100644
@@ -70,9 +70,10 @@
   * - 3.18.0 - Export gpu always on cu bitmap
   * - 3.19.0 - Add support for UVD MJPEG decode
   * - 3.20.0 - Add support for local BOs
+ * - 3.21.0 - Add DRM_AMDGPU_FENCE_TO_HANDLE ioctl
   */
  #define KMS_DRIVER_MAJOR    3
-#define KMS_DRIVER_MINOR    20
+#define KMS_DRIVER_MINOR    21
  #define KMS_DRIVER_PATCHLEVEL    0
    int amdgpu_vram_limit = 0;

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +0 -0

index d31777b..b09d315 100644
@@ -1021,6 +1021,7 @@ const struct drm_ioctl_desc 
 amdgpu_ioctls_kms[] = {
      DRM_IOCTL_DEF_DRV(AMDGPU_CTX, amdgpu_ctx_ioctl, 
 DRM_AUTH|DRM_RENDER_ALLOW),
      DRM_IOCTL_DEF_DRV(AMDGPU_VM, amdgpu_vm_ioctl, 
 DRM_AUTH|DRM_RENDER_ALLOW),
      DRM_IOCTL_DEF_DRV(AMDGPU_BO_LIST, amdgpu_bo_list_ioctl, 

DRM_AUTH|DRM_RENDER_ALLOW),
+ DRM_IOCTL_DEF_DRV(AMDGPU_FENCE_TO_HANDLE,
amdgpu_cs_fence_to_handle_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),

      /* KMS */
      DRM_IOCTL_DEF_DRV(AMDGPU_GEM_MMAP, amdgpu_gem_mmap_ioctl, 

DRM_AUTH|DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(AMDGPU_GEM_WAIT_IDLE,
amdgpu_gem_wait_idle_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),

include/uapi/drm/amdgpu_drm.h +1 -0

index 9f5bd97..ec57cd0 100644
@@ -53,6 +53,7 @@ extern "C" {
  #define DRM_AMDGPU_WAIT_FENCES        0x12
  #define DRM_AMDGPU_VM            0x13
  #define DRM_AMDGPU_FREESYNC            0x14
+#define DRM_AMDGPU_FENCE_TO_HANDLE    0x15
    #define DRM_IOCTL_AMDGPU_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + 
 DRM_AMDGPU_GEM_CREATE, union drm_amdgpu_gem_create)
  #define DRM_IOCTL_AMDGPU_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + 

DRM_AMDGPU_GEM_MMAP, union drm_amdgpu_gem_mmap)

include/uapi/drm/amdgpu_drm.h +8 -0

@@ -69,6 +70,7 @@ extern "C" {
  #define DRM_IOCTL_AMDGPU_WAIT_FENCES DRM_IOWR(DRM_COMMAND_BASE + 
 DRM_AMDGPU_WAIT_FENCES, union drm_amdgpu_wait_fences)
  #define DRM_IOCTL_AMDGPU_VM DRM_IOWR(DRM_COMMAND_BASE + 
 DRM_AMDGPU_VM, union drm_amdgpu_vm)
  #define DRM_IOCTL_AMDGPU_FREESYNC DRM_IOWR(DRM_COMMAND_BASE + 
 DRM_AMDGPU_FREESYNC, struct drm_amdgpu_freesync)
+#define DRM_IOCTL_AMDGPU_FENCE_TO_HANDLE DRM_IOWR(DRM_COMMAND_BASE 
+ DRM_AMDGPU_FENCE_TO_HANDLE, union drm_amdgpu_fence_to_handle)
    #define AMDGPU_GEM_DOMAIN_CPU        0x1
  #define AMDGPU_GEM_DOMAIN_GTT        0x2

@@ -517,6 +519,20 @@ struct drm_amdgpu_cs_chunk_sem {
      __u32 handle;
  };
  +#define AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ    0
+#define AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ_FD    1
+#define AMDGPU_FENCE_TO_HANDLE_GET_SYNC_FILE_FD    2
+
+union drm_amdgpu_fence_to_handle {
+    struct {
+        struct drm_amdgpu_fence fence;

include/uapi/drm/amdgpu_drm.h struct drm_amdgpu_cs_chunk_sem { · line 537

Quoted 10 lines

include/uapi/drm/amdgpu_drm.h +7 -0

+        __u32 what;
+    } in;
+    struct {
+        __u32 handle;
+    } out;
+};
+
  struct drm_amdgpu_cs_chunk_data {
      union {
          struct drm_amdgpu_cs_chunk_ib        ib_data;

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syncfile is the older implementation, sync_obj is the replacement for it.

I don't think we should implement syncfile in the CS any more, sync_obj is already done and can be converted to/from syncfiles.

Mareks IOCTL should cover the case when we need to create a syncfile or syncobj from a fence sequence number.

Regards,
Christian.

Am 13.09.2017 um 09:03 schrieb zhoucm1:

Quoted 232 lines

I really very surprise that you prefer to expand sync_obj to get syncfile fd!!!

Why not directly generate syncfile fd and use it? Which one is simple is so obvious.

Regards,
David Zhou

Quoted 7 lines · Christian König

Hi guys,

Mareks IOCTL proposal looks really good to me.

Please note that we already have sync_obj support for the CS IOCTL in the 4.13 branch and this work is based on top of that.

Quoted 1 line

UMD don't need to construct ip_type/ip_instance/ctx_id/ring

Quoted 213 lines

Well the UMD does want to construct ip_type/ip_instance/ctx_id/ring and use for the simple reason that it allows more flexibility than sync_obj/sync_file.

Thinking more about this I'm pretty sure we want to do something similar for VM map/unmap operations as well.

Regards,
Christian.

Am 13.09.2017 um 05:03 schrieb zhoucm1:

Quoted 203 lines

Hi Marek,

You're doing same things with me, see my "introduce syncfile as fence reuturn" patch set, which makes things more simple, we just need to directly return syncfile fd to UMD when CS, then the fence UMD get will be always syncfile fd, UMD don't need to construct ip_type/ip_instance/ctx_id/ring any more, which also can pass to dependency and syncobj as well.

Regards,
David Zhou

Quoted 181 lines · Marek Olšák

From: Marek Olšák <[email protected]>

for being able to convert an amdgpu fence into one of the handles. Mesa will use this.

Signed-off-by Marek Olšák <[email protected]>

---
  drivers/gpu/drm/amd/amdgpu/amdgpu.h     |  2 ++
  drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c  | 61 
+++++++++++++++++++++++++++++++++
  drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c |  3 +-
  drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c |  1 +
  include/uapi/drm/amdgpu_drm.h           | 16 +++++++++
  5 files changed, 82 insertions(+), 1 deletion(-)

drivers/gpu/drm/amd/amdgpu/amdgpu.h +2 -0

index b5c8b90..c15fa93 100644
@@ -1308,6 +1308,8 @@ int amdgpu_gem_va_ioctl(struct drm_device 
 *dev, void *data,
  int amdgpu_gem_op_ioctl(struct drm_device *dev, void *data,
              struct drm_file *filp);
  int amdgpu_cs_ioctl(struct drm_device *dev, void *data, struct 
 drm_file *filp);
+int amdgpu_cs_fence_to_handle_ioctl(struct drm_device *dev, void 
 *data,
+                    struct drm_file *filp);

int amdgpu_cs_wait_ioctl(struct drm_device *dev, void *data,
struct drm_file *filp);
int amdgpu_cs_wait_fences_ioctl(struct drm_device *dev, void *data,

                  struct drm_file *filp);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c +60 -0

index 7cb8a59..6dd719c 100644
@@ -25,6 +25,7 @@
   *    Jerome Glisse <[email protected]>
   */
  #include <linux/pagemap.h>
+#include <linux/sync_file.h>
  #include <drm/drmP.h>
  #include <drm/amdgpu_drm.h>
  #include <drm/drm_syncobj.h>

@@ -1311,6 +1312,66 @@ static struct dma_fence 
 *amdgpu_cs_get_fence(struct amdgpu_device *adev,
      return fence;
  }
  +int amdgpu_cs_fence_to_handle_ioctl(struct drm_device *dev, 
 void *data,
+                    struct drm_file *filp)
+{
+    struct amdgpu_device *adev = dev->dev_private;
+    struct amdgpu_fpriv *fpriv = filp->driver_priv;
+    union drm_amdgpu_fence_to_handle *info = data;
+    struct dma_fence *fence;
+    struct drm_syncobj *syncobj;
+    struct sync_file *sync_file;
+    int fd, r;
+
+    if (amdgpu_kms_vram_lost(adev, fpriv))
+        return -ENODEV;
+
+    fence = amdgpu_cs_get_fence(adev, filp, &info->in.fence);
+    if (IS_ERR(fence))
+        return PTR_ERR(fence);
+
+    switch (info->in.what) {
+    case AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ:
+        r = drm_syncobj_create(&syncobj, 0, fence);
+        dma_fence_put(fence);
+        if (r)
+            return r;
+        r = drm_syncobj_get_handle(filp, syncobj, 
 &info->out.handle);
+        drm_syncobj_put(syncobj);
+        return r;
+
+    case AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ_FD:
+        r = drm_syncobj_create(&syncobj, 0, fence);
+        dma_fence_put(fence);
+        if (r)
+            return r;
+        r = drm_syncobj_get_fd(syncobj, (int*)&info->out.handle);
+        drm_syncobj_put(syncobj);
+        return r;
+
+    case AMDGPU_FENCE_TO_HANDLE_GET_SYNC_FILE_FD:
+        fd = get_unused_fd_flags(O_CLOEXEC);
+        if (fd < 0) {
+            dma_fence_put(fence);
+            return fd;
+        }
+
+        sync_file = sync_file_create(fence);
+        dma_fence_put(fence);
+        if (!sync_file) {
+            put_unused_fd(fd);
+            return -ENOMEM;
+        }
+
+        fd_install(fd, sync_file->file);
+        info->out.handle = fd;
+        return 0;
+
+    default:
+        return -EINVAL;
+    }
+}
+
  /**
   * amdgpu_cs_wait_all_fence - wait on all fences to signal
   *

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +2 -1

index d01aca6..1e38411 100644
@@ -70,9 +70,10 @@
   * - 3.18.0 - Export gpu always on cu bitmap
   * - 3.19.0 - Add support for UVD MJPEG decode
   * - 3.20.0 - Add support for local BOs
+ * - 3.21.0 - Add DRM_AMDGPU_FENCE_TO_HANDLE ioctl
   */
  #define KMS_DRIVER_MAJOR    3
-#define KMS_DRIVER_MINOR    20
+#define KMS_DRIVER_MINOR    21
  #define KMS_DRIVER_PATCHLEVEL    0
    int amdgpu_vram_limit = 0;

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +0 -0

index d31777b..b09d315 100644
@@ -1021,6 +1021,7 @@ const struct drm_ioctl_desc 
 amdgpu_ioctls_kms[] = {
      DRM_IOCTL_DEF_DRV(AMDGPU_CTX, amdgpu_ctx_ioctl, 
 DRM_AUTH|DRM_RENDER_ALLOW),
      DRM_IOCTL_DEF_DRV(AMDGPU_VM, amdgpu_vm_ioctl, 
 DRM_AUTH|DRM_RENDER_ALLOW),
      DRM_IOCTL_DEF_DRV(AMDGPU_BO_LIST, amdgpu_bo_list_ioctl, 

DRM_AUTH|DRM_RENDER_ALLOW),
+ DRM_IOCTL_DEF_DRV(AMDGPU_FENCE_TO_HANDLE,
amdgpu_cs_fence_to_handle_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),

      /* KMS */
      DRM_IOCTL_DEF_DRV(AMDGPU_GEM_MMAP, amdgpu_gem_mmap_ioctl, 

DRM_AUTH|DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(AMDGPU_GEM_WAIT_IDLE,
amdgpu_gem_wait_idle_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),

include/uapi/drm/amdgpu_drm.h +2 -0

index 9f5bd97..ec57cd0 100644
@@ -53,6 +53,7 @@ extern "C" {
  #define DRM_AMDGPU_WAIT_FENCES        0x12
  #define DRM_AMDGPU_VM            0x13
  #define DRM_AMDGPU_FREESYNC            0x14
+#define DRM_AMDGPU_FENCE_TO_HANDLE    0x15
    #define DRM_IOCTL_AMDGPU_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE 
+ DRM_AMDGPU_GEM_CREATE, union drm_amdgpu_gem_create)
  #define DRM_IOCTL_AMDGPU_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + 

DRM_AMDGPU_GEM_MMAP, union drm_amdgpu_gem_mmap)

include/uapi/drm/amdgpu_drm.h +1 -0

@@ -69,6 +70,7 @@ extern "C" {
  #define DRM_IOCTL_AMDGPU_WAIT_FENCES DRM_IOWR(DRM_COMMAND_BASE + 
 DRM_AMDGPU_WAIT_FENCES, union drm_amdgpu_wait_fences)
  #define DRM_IOCTL_AMDGPU_VM DRM_IOWR(DRM_COMMAND_BASE + 
 DRM_AMDGPU_VM, union drm_amdgpu_vm)
  #define DRM_IOCTL_AMDGPU_FREESYNC DRM_IOWR(DRM_COMMAND_BASE + 
 DRM_AMDGPU_FREESYNC, struct drm_amdgpu_freesync)
+#define DRM_IOCTL_AMDGPU_FENCE_TO_HANDLE 

DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_FENCE_TO_HANDLE, union drm_amdgpu_fence_to_handle)

    #define AMDGPU_GEM_DOMAIN_CPU        0x1

#define AMDGPU_GEM_DOMAIN_GTT 0x2

include/uapi/drm/amdgpu_drm.h +6 -0

@@ -517,6 +519,20 @@ struct drm_amdgpu_cs_chunk_sem {
      __u32 handle;
  };
  +#define AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ    0
+#define AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ_FD    1
+#define AMDGPU_FENCE_TO_HANDLE_GET_SYNC_FILE_FD    2
+
+union drm_amdgpu_fence_to_handle {
+    struct {
+        struct drm_amdgpu_fence fence;

include/uapi/drm/amdgpu_drm.h struct drm_amdgpu_cs_chunk_sem { · line 537

Quoted 10 lines

include/uapi/drm/amdgpu_drm.h +7 -0

+        __u32 what;
+    } in;
+    struct {
+        __u32 handle;
+    } out;
+};
+
  struct drm_amdgpu_cs_chunk_data {
      union {
          struct drm_amdgpu_cs_chunk_ib        ib_data;

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Quoted 1 line

syncfile is the older implementation, sync_obj is the replacement for it.

Are you sure sync_obj is a replacement for syncfile? Anyone can clarify it?

sync_obj is mainly for semaphore usage, we can see sync_obj docs from Dave in drm_syncobj.c:
"/**
* DOC: Overview
*
* DRM synchronisation objects (syncobj) are a persistent objects,
* that contain an optional fence. The fence can be updated with a new
* fence, or be NULL.
*
* syncobj's can be export to fd's and back, these fd's are opaque and
* have no other use case, except passing the syncobj between processes.

*
* Their primary use-case is to implement Vulkan fences and semaphores. *
* syncobj have a kref reference count, but also have an optional file.
* The file is only created once the syncobj is exported.
* The file takes a reference on the kref.
*/
"

Quoted 4 lines

I don't think we should implement syncfile in the CS any more, sync_obj is already done and can be converted to/from syncfiles.

Mareks IOCTL should cover the case when we need to create a syncfile or syncobj from a fence sequence number.

I know his convertion can do that things, but returning syncfile fd directly is a really simple method.

Regards,
David Zhou

Quoted 240 lines

Regards,
Christian.

Am 13.09.2017 um 09:03 schrieb zhoucm1:

Quoted 233 lines

I really very surprise that you prefer to expand sync_obj to get syncfile fd!!!

Why not directly generate syncfile fd and use it? Which one is simple is so obvious.

Regards,
David Zhou

Quoted 7 lines · Christian König

Hi guys,

Mareks IOCTL proposal looks really good to me.

Please note that we already have sync_obj support for the CS IOCTL in the 4.13 branch and this work is based on top of that.

Quoted 1 line

UMD don't need to construct ip_type/ip_instance/ctx_id/ring

Quoted 214 lines

Well the UMD does want to construct ip_type/ip_instance/ctx_id/ring and use for the simple reason that it allows more flexibility than sync_obj/sync_file.

Thinking more about this I'm pretty sure we want to do something similar for VM map/unmap operations as well.

Regards,
Christian.

Am 13.09.2017 um 05:03 schrieb zhoucm1:

Quoted 204 lines

Hi Marek,

You're doing same things with me, see my "introduce syncfile as fence reuturn" patch set, which makes things more simple, we just need to directly return syncfile fd to UMD when CS, then the fence UMD get will be always syncfile fd, UMD don't need to construct ip_type/ip_instance/ctx_id/ring any more, which also can pass to dependency and syncobj as well.

Regards,
David Zhou

Quoted 182 lines · Marek Olšák

From: Marek Olšák <[email protected]>

for being able to convert an amdgpu fence into one of the handles. Mesa will use this.

Signed-off-by Marek Olšák <[email protected]>

---
  drivers/gpu/drm/amd/amdgpu/amdgpu.h     |  2 ++
  drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c  | 61 
+++++++++++++++++++++++++++++++++
  drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c |  3 +-
  drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c |  1 +
  include/uapi/drm/amdgpu_drm.h           | 16 +++++++++
  5 files changed, 82 insertions(+), 1 deletion(-)

drivers/gpu/drm/amd/amdgpu/amdgpu.h +2 -0

index b5c8b90..c15fa93 100644
@@ -1308,6 +1308,8 @@ int amdgpu_gem_va_ioctl(struct drm_device 
 *dev, void *data,
  int amdgpu_gem_op_ioctl(struct drm_device *dev, void *data,
              struct drm_file *filp);
  int amdgpu_cs_ioctl(struct drm_device *dev, void *data, struct 
 drm_file *filp);
+int amdgpu_cs_fence_to_handle_ioctl(struct drm_device *dev, void 
 *data,
+                    struct drm_file *filp);

int amdgpu_cs_wait_ioctl(struct drm_device *dev, void *data,
struct drm_file *filp);
int amdgpu_cs_wait_fences_ioctl(struct drm_device *dev, void
*data,

                  struct drm_file *filp);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c +60 -0

index 7cb8a59..6dd719c 100644
@@ -25,6 +25,7 @@
   *    Jerome Glisse <[email protected]>
   */
  #include <linux/pagemap.h>
+#include <linux/sync_file.h>
  #include <drm/drmP.h>
  #include <drm/amdgpu_drm.h>
  #include <drm/drm_syncobj.h>

@@ -1311,6 +1312,66 @@ static struct dma_fence 
 *amdgpu_cs_get_fence(struct amdgpu_device *adev,
      return fence;
  }
  +int amdgpu_cs_fence_to_handle_ioctl(struct drm_device *dev, 
 void *data,
+                    struct drm_file *filp)
+{
+    struct amdgpu_device *adev = dev->dev_private;
+    struct amdgpu_fpriv *fpriv = filp->driver_priv;
+    union drm_amdgpu_fence_to_handle *info = data;
+    struct dma_fence *fence;
+    struct drm_syncobj *syncobj;
+    struct sync_file *sync_file;
+    int fd, r;
+
+    if (amdgpu_kms_vram_lost(adev, fpriv))
+        return -ENODEV;
+
+    fence = amdgpu_cs_get_fence(adev, filp, &info->in.fence);
+    if (IS_ERR(fence))
+        return PTR_ERR(fence);
+
+    switch (info->in.what) {
+    case AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ:
+        r = drm_syncobj_create(&syncobj, 0, fence);
+        dma_fence_put(fence);
+        if (r)
+            return r;
+        r = drm_syncobj_get_handle(filp, syncobj, 
 &info->out.handle);
+        drm_syncobj_put(syncobj);
+        return r;
+
+    case AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ_FD:
+        r = drm_syncobj_create(&syncobj, 0, fence);
+        dma_fence_put(fence);
+        if (r)
+            return r;
+        r = drm_syncobj_get_fd(syncobj, (int*)&info->out.handle);
+        drm_syncobj_put(syncobj);
+        return r;
+
+    case AMDGPU_FENCE_TO_HANDLE_GET_SYNC_FILE_FD:
+        fd = get_unused_fd_flags(O_CLOEXEC);
+        if (fd < 0) {
+            dma_fence_put(fence);
+            return fd;
+        }
+
+        sync_file = sync_file_create(fence);
+        dma_fence_put(fence);
+        if (!sync_file) {
+            put_unused_fd(fd);
+            return -ENOMEM;
+        }
+
+        fd_install(fd, sync_file->file);
+        info->out.handle = fd;
+        return 0;
+
+    default:
+        return -EINVAL;
+    }
+}
+
  /**
   * amdgpu_cs_wait_all_fence - wait on all fences to signal
   *

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +2 -1

index d01aca6..1e38411 100644
@@ -70,9 +70,10 @@
   * - 3.18.0 - Export gpu always on cu bitmap
   * - 3.19.0 - Add support for UVD MJPEG decode
   * - 3.20.0 - Add support for local BOs
+ * - 3.21.0 - Add DRM_AMDGPU_FENCE_TO_HANDLE ioctl
   */
  #define KMS_DRIVER_MAJOR    3
-#define KMS_DRIVER_MINOR    20
+#define KMS_DRIVER_MINOR    21
  #define KMS_DRIVER_PATCHLEVEL    0
    int amdgpu_vram_limit = 0;

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +0 -0

index d31777b..b09d315 100644
@@ -1021,6 +1021,7 @@ const struct drm_ioctl_desc 
 amdgpu_ioctls_kms[] = {
      DRM_IOCTL_DEF_DRV(AMDGPU_CTX, amdgpu_ctx_ioctl, 
 DRM_AUTH|DRM_RENDER_ALLOW),
      DRM_IOCTL_DEF_DRV(AMDGPU_VM, amdgpu_vm_ioctl, 
 DRM_AUTH|DRM_RENDER_ALLOW),
      DRM_IOCTL_DEF_DRV(AMDGPU_BO_LIST, amdgpu_bo_list_ioctl, 

DRM_AUTH|DRM_RENDER_ALLOW),
+ DRM_IOCTL_DEF_DRV(AMDGPU_FENCE_TO_HANDLE,
amdgpu_cs_fence_to_handle_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),

      /* KMS */
      DRM_IOCTL_DEF_DRV(AMDGPU_GEM_MMAP, amdgpu_gem_mmap_ioctl, 

DRM_AUTH|DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(AMDGPU_GEM_WAIT_IDLE,
amdgpu_gem_wait_idle_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),

include/uapi/drm/amdgpu_drm.h +2 -0

index 9f5bd97..ec57cd0 100644
@@ -53,6 +53,7 @@ extern "C" {
  #define DRM_AMDGPU_WAIT_FENCES        0x12
  #define DRM_AMDGPU_VM            0x13
  #define DRM_AMDGPU_FREESYNC            0x14
+#define DRM_AMDGPU_FENCE_TO_HANDLE    0x15
    #define DRM_IOCTL_AMDGPU_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE 
+ DRM_AMDGPU_GEM_CREATE, union drm_amdgpu_gem_create)
  #define DRM_IOCTL_AMDGPU_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + 

DRM_AMDGPU_GEM_MMAP, union drm_amdgpu_gem_mmap)

include/uapi/drm/amdgpu_drm.h +2 -0

@@ -69,6 +70,7 @@ extern "C" {
  #define DRM_IOCTL_AMDGPU_WAIT_FENCES DRM_IOWR(DRM_COMMAND_BASE 
+ DRM_AMDGPU_WAIT_FENCES, union drm_amdgpu_wait_fences)
  #define DRM_IOCTL_AMDGPU_VM DRM_IOWR(DRM_COMMAND_BASE + 
 DRM_AMDGPU_VM, union drm_amdgpu_vm)
  #define DRM_IOCTL_AMDGPU_FREESYNC DRM_IOWR(DRM_COMMAND_BASE + 
 DRM_AMDGPU_FREESYNC, struct drm_amdgpu_freesync)
+#define DRM_IOCTL_AMDGPU_FENCE_TO_HANDLE 

DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_FENCE_TO_HANDLE, union drm_amdgpu_fence_to_handle)

    #define AMDGPU_GEM_DOMAIN_CPU        0x1

#define AMDGPU_GEM_DOMAIN_GTT 0x2

include/uapi/drm/amdgpu_drm.h +6 -0

@@ -517,6 +519,20 @@ struct drm_amdgpu_cs_chunk_sem {
      __u32 handle;
  };
  +#define AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ    0
+#define AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ_FD    1
+#define AMDGPU_FENCE_TO_HANDLE_GET_SYNC_FILE_FD    2
+
+union drm_amdgpu_fence_to_handle {
+    struct {
+        struct drm_amdgpu_fence fence;

include/uapi/drm/amdgpu_drm.h struct drm_amdgpu_cs_chunk_sem { · line 537

Quoted 10 lines

include/uapi/drm/amdgpu_drm.h +7 -0

+        __u32 what;
+    } in;
+    struct {
+        __u32 handle;
+    } out;
+};
+
  struct drm_amdgpu_cs_chunk_data {
      union {
          struct drm_amdgpu_cs_chunk_ib        ib_data;

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Am 13.09.2017 um 09:39 schrieb zhoucm1:

Quoted 17 lines · Christian König

Quoted 1 line

syncfile is the older implementation, sync_obj is the replacement for it.

Are you sure sync_obj is a replacement for syncfile? Anyone can clarify it?

sync_obj is mainly for semaphore usage, we can see sync_obj docs from Dave in drm_syncobj.c:
"/**
* DOC: Overview
*
* DRM synchronisation objects (syncobj) are a persistent objects,
* that contain an optional fence. The fence can be updated with a new
* fence, or be NULL.
*
* syncobj's can be export to fd's and back, these fd's are opaque and
* have no other use case, except passing the syncobj between processes.

Quoted 9 lines

*
* Their primary use-case is to implement Vulkan fences and semaphores. *
* syncobj have a kref reference count, but also have an optional file.
* The file is only created once the syncobj is exported.
* The file takes a reference on the kref.
*/
"

Correct, but you can convert from sync_obj into syncfile and back using a standard DRM IOCTL. So when we support sync_obj we also support syncfile.

Quoted 3 lines

Quoted 3 lines

I don't think we should implement syncfile in the CS any more, sync_obj is already done and can be converted to/from syncfiles.

Quoted 3 lines

Quoted 1 line

Mareks IOCTL should cover the case when we need to create a syncfile or syncobj from a fence sequence number.

I know his convertion can do that things, but returning syncfile fd directly is a really simple method.

Well we can use sync_obj for this as well, it doesn't make so much difference.

Point is we shouldn't return a syncfile for VM operations because that will always use an fd which isn't very desirable.

Regards,
Christian.

Quoted 244 lines

Regards,
David Zhou

Quoted 240 lines

Regards,
Christian.

Am 13.09.2017 um 09:03 schrieb zhoucm1:

Quoted 233 lines

I really very surprise that you prefer to expand sync_obj to get syncfile fd!!!

Why not directly generate syncfile fd and use it? Which one is simple is so obvious.

Regards,
David Zhou

Quoted 7 lines · Christian König

Hi guys,

Mareks IOCTL proposal looks really good to me.

Please note that we already have sync_obj support for the CS IOCTL in the 4.13 branch and this work is based on top of that.

Quoted 1 line

UMD don't need to construct ip_type/ip_instance/ctx_id/ring

Quoted 214 lines

Well the UMD does want to construct ip_type/ip_instance/ctx_id/ring and use for the simple reason that it allows more flexibility than sync_obj/sync_file.

Thinking more about this I'm pretty sure we want to do something similar for VM map/unmap operations as well.

Regards,
Christian.

Am 13.09.2017 um 05:03 schrieb zhoucm1:

Quoted 204 lines

Hi Marek,

You're doing same things with me, see my "introduce syncfile as fence reuturn" patch set, which makes things more simple, we just need to directly return syncfile fd to UMD when CS, then the fence UMD get will be always syncfile fd, UMD don't need to construct ip_type/ip_instance/ctx_id/ring any more, which also can pass to dependency and syncobj as well.

Regards,
David Zhou

Quoted 182 lines · Marek Olšák

From: Marek Olšák <[email protected]>

for being able to convert an amdgpu fence into one of the handles. Mesa will use this.

Signed-off-by Marek Olšák <[email protected]>

---
  drivers/gpu/drm/amd/amdgpu/amdgpu.h     |  2 ++
  drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c  | 61 
+++++++++++++++++++++++++++++++++
  drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c |  3 +-
  drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c |  1 +
  include/uapi/drm/amdgpu_drm.h           | 16 +++++++++
  5 files changed, 82 insertions(+), 1 deletion(-)

drivers/gpu/drm/amd/amdgpu/amdgpu.h +2 -0

index b5c8b90..c15fa93 100644
@@ -1308,6 +1308,8 @@ int amdgpu_gem_va_ioctl(struct drm_device 
 *dev, void *data,
  int amdgpu_gem_op_ioctl(struct drm_device *dev, void *data,
              struct drm_file *filp);
  int amdgpu_cs_ioctl(struct drm_device *dev, void *data, struct 
 drm_file *filp);
+int amdgpu_cs_fence_to_handle_ioctl(struct drm_device *dev, 
 void *data,
+                    struct drm_file *filp);

int amdgpu_cs_wait_ioctl(struct drm_device *dev, void *data,
struct drm_file *filp);
int amdgpu_cs_wait_fences_ioctl(struct drm_device *dev, void
*data,

                  struct drm_file *filp);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c +60 -0

index 7cb8a59..6dd719c 100644
@@ -25,6 +25,7 @@
   *    Jerome Glisse <[email protected]>
   */
  #include <linux/pagemap.h>
+#include <linux/sync_file.h>
  #include <drm/drmP.h>
  #include <drm/amdgpu_drm.h>
  #include <drm/drm_syncobj.h>

@@ -1311,6 +1312,66 @@ static struct dma_fence 
 *amdgpu_cs_get_fence(struct amdgpu_device *adev,
      return fence;
  }
  +int amdgpu_cs_fence_to_handle_ioctl(struct drm_device *dev, 
 void *data,
+                    struct drm_file *filp)
+{
+    struct amdgpu_device *adev = dev->dev_private;
+    struct amdgpu_fpriv *fpriv = filp->driver_priv;
+    union drm_amdgpu_fence_to_handle *info = data;
+    struct dma_fence *fence;
+    struct drm_syncobj *syncobj;
+    struct sync_file *sync_file;
+    int fd, r;
+
+    if (amdgpu_kms_vram_lost(adev, fpriv))
+        return -ENODEV;
+
+    fence = amdgpu_cs_get_fence(adev, filp, &info->in.fence);
+    if (IS_ERR(fence))
+        return PTR_ERR(fence);
+
+    switch (info->in.what) {
+    case AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ:
+        r = drm_syncobj_create(&syncobj, 0, fence);
+        dma_fence_put(fence);
+        if (r)
+            return r;
+        r = drm_syncobj_get_handle(filp, syncobj, 
 &info->out.handle);
+        drm_syncobj_put(syncobj);
+        return r;
+
+    case AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ_FD:
+        r = drm_syncobj_create(&syncobj, 0, fence);
+        dma_fence_put(fence);
+        if (r)
+            return r;
+        r = drm_syncobj_get_fd(syncobj, (int*)&info->out.handle);
+        drm_syncobj_put(syncobj);
+        return r;
+
+    case AMDGPU_FENCE_TO_HANDLE_GET_SYNC_FILE_FD:
+        fd = get_unused_fd_flags(O_CLOEXEC);
+        if (fd < 0) {
+            dma_fence_put(fence);
+            return fd;
+        }
+
+        sync_file = sync_file_create(fence);
+        dma_fence_put(fence);
+        if (!sync_file) {
+            put_unused_fd(fd);
+            return -ENOMEM;
+        }
+
+        fd_install(fd, sync_file->file);
+        info->out.handle = fd;
+        return 0;
+
+    default:
+        return -EINVAL;
+    }
+}
+
  /**
   * amdgpu_cs_wait_all_fence - wait on all fences to signal
   *

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +2 -1

index d01aca6..1e38411 100644
@@ -70,9 +70,10 @@
   * - 3.18.0 - Export gpu always on cu bitmap
   * - 3.19.0 - Add support for UVD MJPEG decode
   * - 3.20.0 - Add support for local BOs
+ * - 3.21.0 - Add DRM_AMDGPU_FENCE_TO_HANDLE ioctl
   */
  #define KMS_DRIVER_MAJOR    3
-#define KMS_DRIVER_MINOR    20
+#define KMS_DRIVER_MINOR    21
  #define KMS_DRIVER_PATCHLEVEL    0
    int amdgpu_vram_limit = 0;

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +0 -0

index d31777b..b09d315 100644
@@ -1021,6 +1021,7 @@ const struct drm_ioctl_desc 
 amdgpu_ioctls_kms[] = {
      DRM_IOCTL_DEF_DRV(AMDGPU_CTX, amdgpu_ctx_ioctl, 
 DRM_AUTH|DRM_RENDER_ALLOW),
      DRM_IOCTL_DEF_DRV(AMDGPU_VM, amdgpu_vm_ioctl, 
 DRM_AUTH|DRM_RENDER_ALLOW),
      DRM_IOCTL_DEF_DRV(AMDGPU_BO_LIST, amdgpu_bo_list_ioctl, 

DRM_AUTH|DRM_RENDER_ALLOW),
+ DRM_IOCTL_DEF_DRV(AMDGPU_FENCE_TO_HANDLE,
amdgpu_cs_fence_to_handle_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),

      /* KMS */
      DRM_IOCTL_DEF_DRV(AMDGPU_GEM_MMAP, amdgpu_gem_mmap_ioctl, 

DRM_AUTH|DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(AMDGPU_GEM_WAIT_IDLE,
amdgpu_gem_wait_idle_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),

include/uapi/drm/amdgpu_drm.h +1 -0

index 9f5bd97..ec57cd0 100644
@@ -53,6 +53,7 @@ extern "C" {
  #define DRM_AMDGPU_WAIT_FENCES        0x12
  #define DRM_AMDGPU_VM            0x13
  #define DRM_AMDGPU_FREESYNC            0x14
+#define DRM_AMDGPU_FENCE_TO_HANDLE    0x15
    #define DRM_IOCTL_AMDGPU_GEM_CREATE 
 DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_CREATE, union drm_amdgpu_gem_create)
  #define DRM_IOCTL_AMDGPU_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + 

DRM_AMDGPU_GEM_MMAP, union drm_amdgpu_gem_mmap)

include/uapi/drm/amdgpu_drm.h +2 -0

@@ -69,6 +70,7 @@ extern "C" {
  #define DRM_IOCTL_AMDGPU_WAIT_FENCES DRM_IOWR(DRM_COMMAND_BASE 
+ DRM_AMDGPU_WAIT_FENCES, union drm_amdgpu_wait_fences)
  #define DRM_IOCTL_AMDGPU_VM DRM_IOWR(DRM_COMMAND_BASE + 
 DRM_AMDGPU_VM, union drm_amdgpu_vm)
  #define DRM_IOCTL_AMDGPU_FREESYNC DRM_IOWR(DRM_COMMAND_BASE + 
 DRM_AMDGPU_FREESYNC, struct drm_amdgpu_freesync)
+#define DRM_IOCTL_AMDGPU_FENCE_TO_HANDLE 

DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_FENCE_TO_HANDLE, union drm_amdgpu_fence_to_handle)

    #define AMDGPU_GEM_DOMAIN_CPU        0x1

#define AMDGPU_GEM_DOMAIN_GTT 0x2

include/uapi/drm/amdgpu_drm.h +6 -0

@@ -517,6 +519,20 @@ struct drm_amdgpu_cs_chunk_sem {
      __u32 handle;
  };
  +#define AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ    0
+#define AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ_FD    1
+#define AMDGPU_FENCE_TO_HANDLE_GET_SYNC_FILE_FD    2
+
+union drm_amdgpu_fence_to_handle {
+    struct {
+        struct drm_amdgpu_fence fence;

include/uapi/drm/amdgpu_drm.h struct drm_amdgpu_cs_chunk_sem { · line 537

Quoted 10 lines

include/uapi/drm/amdgpu_drm.h +7 -0

+        __u32 what;
+    } in;
+    struct {
+        __u32 handle;
+    } out;
+};
+
  struct drm_amdgpu_cs_chunk_data {
      union {
          struct drm_amdgpu_cs_chunk_ib ib_data;

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_______________________________________________
amd-gfx mailing list
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Hi Marek,

You're doing same things with me, see my "introduce syncfile as fence reuturn" patch set, which makes things more simple, we just need to directly return syncfile fd to UMD when CS, then the fence UMD get will be always syncfile fd, UMD don't need to construct ip_type/ip_instance/ctx_id/ring any more, which also can pass to dependency and syncobj as well.

Hi Marek,

You're doing same things with me, see my "introduce syncfile as fence reuturn" patch set, which makes things more simple, we just need to directly return syncfile fd to UMD when CS, then the fence UMD get will be always syncfile fd, UMD don't need to construct ip_type/ip_instance/ctx_id/ring any more, which also can pass to dependency and syncobj as well.

Could you describe how difficult to directly use CS syncfile fd in Mesa compared with concerting CS seq to syncfile fd via several syncobj ioctls?

Regards,
David Zhou

发自坚果 Pro

Marek Ol?醟 <[email protected]> 于 2017年9月13日 下午6:11写道：

Quoted 9 lines · On Wed, Sep 13, 2017 at 5:03 AM, zhoucm1 <[email protected]> wrote:

Hi Marek,

You're doing same things with me, see my "introduce syncfile as fence reuturn" patch set, which makes things more simple, we just need to directly
return syncfile fd to UMD when CS, then the fence UMD get will be always syncfile fd, UMD don't need to construct ip_type/ip_instance/ctx_id/ring any
more, which also can pass to dependency and syncobj as well.

For simpler Mesa code, Mesa won't get a sync file from the CS ioctl.

Marek

Could you describe how difficult to directly use CS syncfile fd in Mesa compared with concerting CS seq to syncfile fd via several syncobj ioctls?

Regards,
David Zhou

发自坚果 Pro

Marek Ol?醟 <[email protected]> 于 2017年9月13日 下午6:11写道：

Quoted 9 lines · On Wed, Sep 13, 2017 at 5:03 AM, zhoucm1 <[email protected]> wrote:

Hi Marek,

You're doing same things with me, see my "introduce syncfile as fence reuturn" patch set, which makes things more simple, we just need to directly
return syncfile fd to UMD when CS, then the fence UMD get will be always syncfile fd, UMD don't need to construct ip_type/ip_instance/ctx_id/ring any
more, which also can pass to dependency and syncobj as well.

For simpler Mesa code, Mesa won't get a sync file from the CS ioctl.

Marek

syncfile indeed be a good way to pass fence for user space, which already is proved in Android and is upstreamed.

Yes, to be comptibility, I kept both seq_no and syncfile fd in the patch set, you can take a look, which really is simpler and effective way.

syncfile indeed be a good way to pass fence for user space, which already is proved in Android and is upstreamed.

Regards,
David Zhou

发自坚果 Pro

Marek Ol?醟 <[email protected]> 于 2017年9月13日 下午8:06写道：

Quoted 2 lines · David(ChunMing)

Could you describe how difficult to directly use CS syncfile fd in Mesa compared with concerting CS seq to syncfile fd via several syncobj

ioctls?

It just simplifies things. Mesa primarily uses seq_no-based fences and will continue to use them. We can't remove the seq_no fence code because we have to keep Mesa compatible with older kernels.

The only possibilities are:
- Mesa gets both seq_no and sync_file from CS.
- Mesa only gets seq_no from CS.

I decided to take the simpler option. I don't know if there is a perf difference between CS returning a sync_file and using a separate ioctl, but it's probably insignificant since we already call 3 ioctls per IB submission (BO list create+destroy, submit).

Marek

Quoted 15 lines

Regards,
David Zhou

发自坚果 Pro

Marek Ol?醟 <[email protected]> 于 2017年9月13日 下午6:11写道：

Quoted 6 lines · On Wed, Sep 13, 2017 at 5:03 AM, zhoucm1 <[email protected]> wrote:

Hi Marek,

You're doing same things with me, see my "introduce syncfile as fence reuturn" patch set, which makes things more simple, we just need to directly
return syncfile fd to UMD when CS, then the fence UMD get will be

always

Quoted 1 line

Quoted 1 line

syncfile fd, UMD don't need to construct

ip_type/ip_instance/ctx_id/ring

Quoted 5 lines

Quoted 2 lines

any
more, which also can pass to dependency and syncobj as well.

For simpler Mesa code, Mesa won't get a sync file from the CS ioctl.

Quoted 1 line

Marek

_______________________________________________
amd-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Could you describe how difficult to directly use CS syncfile fd in Mesa compared with concerting CS seq to syncfile fd via several syncobj ioctls?

Regards,
David Zhou

发自坚果 Pro

Marek Ol?醟 <[email protected]><mailto:[email protected]> 于 2017年9月13日 下午6:11写道：

Quoted 9 lines · On Wed, Sep 13, 2017 at 5:03 AM, zhoucm1…

Hi Marek,

You're doing same things with me, see my "introduce syncfile as fence reuturn" patch set, which makes things more simple, we just need to directly
return syncfile fd to UMD when CS, then the fence UMD get will be always syncfile fd, UMD don't need to construct ip_type/ip_instance/ctx_id/ring any
more, which also can pass to dependency and syncobj as well.

For simpler Mesa code, Mesa won't get a sync file from the CS ioctl.

Marek

For android using mesa instance, egl draw will dequeue an android buffer, after egl draw, the buffer will back to android bufffer queue, but need append a syncfile fd. If getting syncfile fd for every egl draw always needs several syncobj ioctls, the io overhead isn't small. But if we directly return syncfile when egl draw CS, isn't it better?

Quoted 5 lines · David(ChunMing)

For android using mesa instance, egl draw will dequeue an android buffer, after egl draw, the buffer will back to android bufffer queue, but need append a syncfile fd. If getting syncfile fd for every egl draw always needs several syncobj ioctls, the io overhead isn't small. But if we directly return syncfile when egl draw CS, isn't it better?

You have a good point. I'd be OK with either approach, or even with having both options in the kernel.

Marek

Am 13.09.2017 um 16:06 schrieb Marek Olšák:

Quoted 11 lines

Quoted 7 lines · David(ChunMing)

For android using mesa instance, egl draw will dequeue an android buffer, after egl draw, the buffer will back to android bufffer queue, but need append a syncfile fd. If getting syncfile fd for every egl draw always needs
several syncobj ioctls, the io overhead isn't small. But if we directly return syncfile when egl draw CS, isn't it better?

Quoted 2 lines

You have a good point. I'd be OK with either approach, or even with having both options in the kernel.

I don't have a strong opinion for the CS IOCTL either. If it saves us an extra IOCTL when we directly return a syncfile fd then why not?

But we really shouldn't use syncfile for the VA IOCTL. That's nothing we want to share with other processes and the returned fence or sequence needs to be lightweight.

Ideally I would say it should be a sequence number, so that you can say max(seq1, seq2) and always have the latest.

The next best approach I think would be to use syncobj, cause it is simply rather easily to implement.

Quoted 22 lines · Christian König

Am 13.09.2017 um 16:06 schrieb Marek Olšák:

Quoted 10 lines

Quoted 6 lines · David(ChunMing)

For android using mesa instance, egl draw will dequeue an android buffer, after egl draw, the buffer will back to android bufffer queue, but need append a syncfile fd. If getting syncfile fd for every egl draw always needs
several syncobj ioctls, the io overhead isn't small. But if we directly return syncfile when egl draw CS, isn't it better?

You have a good point. I'd be OK with either approach, or even with having both options in the kernel.

I don't have a strong opinion for the CS IOCTL either. If it saves us an extra IOCTL when we directly return a syncfile fd then why not?

But we really shouldn't use syncfile for the VA IOCTL. That's nothing we want to share with other processes and the returned fence or sequence needs to be lightweight.

Ideally I would say it should be a sequence number, so that you can say max(seq1, seq2) and always have the latest.

Quoted 2 lines

The next best approach I think would be to use syncobj, cause it is simply rather easily to implement.

I'd go with not returning fd's by default, it's a bad use of a limited resource, creating fd's should happen on giving the object to another process or API.

However having an optional chunk or flag to say this ioctl will return an android sync fd if asked is fine with me, if is usually returns a syncobj.

Dave.

Quoted 25 lines · Dave Airlie

Quoted 24 lines · Christian König

Am 13.09.2017 um 16:06 schrieb Marek Olšák:

Quoted 10 lines

Quoted 6 lines · David(ChunMing)

For android using mesa instance, egl draw will dequeue an android buffer, after egl draw, the buffer will back to android bufffer queue, but need append a syncfile fd. If getting syncfile fd for every egl draw always needs
several syncobj ioctls, the io overhead isn't small. But if we directly return syncfile when egl draw CS, isn't it better?

You have a good point. I'd be OK with either approach, or even with having both options in the kernel.

I don't have a strong opinion for the CS IOCTL either. If it saves us an extra IOCTL when we directly return a syncfile fd then why not?

But we really shouldn't use syncfile for the VA IOCTL. That's nothing we want to share with other processes and the returned fence or sequence needs to be lightweight.

Ideally I would say it should be a sequence number, so that you can say max(seq1, seq2) and always have the latest.

The next best approach I think would be to use syncobj, cause it is simply rather easily to implement.

Quoted 5 lines

I'd go with not returning fd's by default, it's a bad use of a limited resource, creating fd's should happen on giving the object to another process or API.

However having an optional chunk or flag to say this ioctl will return an android sync fd if asked is fine with me, if is usually returns a syncobj.

OK, that means we return fd only when UMD ask, right? I will send V2.

Thanks all.
David Zhou

Quoted 2 lines

Dave.

But think a bit more, if not by default, that isn't meaningful, we can continue to use seq_no base fence and Marek's syncfile fd approach.

Quoted 3 lines

But think a bit more, if not by default, that isn't meaningful, we can continue to use seq_no base fence and Marek's syncfile fd approach.

At least for radv I've no interest in every CS ioctl returning an fd that I have to
close.

Dave.

From: Marek Olšák <[email protected]>

for being able to convert an amdgpu fence into one of the handles. Mesa will use this.

Signed-off-by Marek Olšák <[email protected]>

---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h     |  2 ++
 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c  | 61 +++++++++++++++++++++++++++++++++
 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c |  3 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c |  1 +
 include/uapi/drm/amdgpu_drm.h           | 16 +++++++++
 5 files changed, 82 insertions(+), 1 deletion(-)

drivers/gpu/drm/amd/amdgpu/amdgpu.h +2 -0

index b5c8b90..c15fa93 100644
@@ -1308,6 +1308,8 @@ int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data,
 int amdgpu_gem_op_ioctl(struct drm_device *dev, void *data,
                        struct drm_file *filp);
 int amdgpu_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp);
+int amdgpu_cs_fence_to_handle_ioctl(struct drm_device *dev, void *data,
+                                   struct drm_file *filp);
 int amdgpu_cs_wait_ioctl(struct drm_device *dev, void *data, struct drm_file *filp);
 int amdgpu_cs_wait_fences_ioctl(struct drm_device *dev, void *data,
                                struct drm_file *filp);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c +61 -0

index 7cb8a59..6dd719c 100644
@@ -25,6 +25,7 @@
  *    Jerome Glisse <[email protected]>
  */
 #include <linux/pagemap.h>
+#include <linux/sync_file.h>
 #include <drm/drmP.h>
 #include <drm/amdgpu_drm.h>
 #include <drm/drm_syncobj.h>

@@ -1311,6 +1312,66 @@ static struct dma_fence *amdgpu_cs_get_fence(struct amdgpu_device *adev,
        return fence;
 }
 
+int amdgpu_cs_fence_to_handle_ioctl(struct drm_device *dev, void *data,
+                                   struct drm_file *filp)
+{
+       struct amdgpu_device *adev = dev->dev_private;
+       struct amdgpu_fpriv *fpriv = filp->driver_priv;
+       union drm_amdgpu_fence_to_handle *info = data;
+       struct dma_fence *fence;
+       struct drm_syncobj *syncobj;
+       struct sync_file *sync_file;
+       int fd, r;
+
+       if (amdgpu_kms_vram_lost(adev, fpriv))
+               return -ENODEV;
+
+       fence = amdgpu_cs_get_fence(adev, filp, &info->in.fence);
+       if (IS_ERR(fence))
+               return PTR_ERR(fence);
+
+       switch (info->in.what) {
+       case AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ:
+               r = drm_syncobj_create(&syncobj, 0, fence);
+               dma_fence_put(fence);
+               if (r)
+                       return r;
+               r = drm_syncobj_get_handle(filp, syncobj, &info->out.handle);
+               drm_syncobj_put(syncobj);
+               return r;
+
+       case AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ_FD:
+               r = drm_syncobj_create(&syncobj, 0, fence);
+               dma_fence_put(fence);
+               if (r)
+                       return r;
+               r = drm_syncobj_get_fd(syncobj, (int*)&info->out.handle);
+               drm_syncobj_put(syncobj);
+               return r;
+
+       case AMDGPU_FENCE_TO_HANDLE_GET_SYNC_FILE_FD:
+               fd = get_unused_fd_flags(O_CLOEXEC);
+               if (fd < 0) {
+                       dma_fence_put(fence);
+                       return fd;
+               }
+
+               sync_file = sync_file_create(fence);
+               dma_fence_put(fence);
+               if (!sync_file) {
+                       put_unused_fd(fd);
+                       return -ENOMEM;
+               }
+
+               fd_install(fd, sync_file->file);
+               info->out.handle = fd;
+               return 0;
+
+       default:
+               return -EINVAL;
+       }
+}
+
 /**
  * amdgpu_cs_wait_all_fence - wait on all fences to signal
  *

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +2 -1

index d01aca6..1e38411 100644
@@ -70,9 +70,10 @@
  * - 3.18.0 - Export gpu always on cu bitmap
  * - 3.19.0 - Add support for UVD MJPEG decode
  * - 3.20.0 - Add support for local BOs
+ * - 3.21.0 - Add DRM_AMDGPU_FENCE_TO_HANDLE ioctl
  */
 #define KMS_DRIVER_MAJOR       3
-#define KMS_DRIVER_MINOR       20
+#define KMS_DRIVER_MINOR       21
 #define KMS_DRIVER_PATCHLEVEL  0
 
 int amdgpu_vram_limit = 0;

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +1 -0

index d31777b..b09d315 100644
@@ -1021,6 +1021,7 @@ const struct drm_ioctl_desc amdgpu_ioctls_kms[] = {
        DRM_IOCTL_DEF_DRV(AMDGPU_CTX, amdgpu_ctx_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),
        DRM_IOCTL_DEF_DRV(AMDGPU_VM, amdgpu_vm_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),
        DRM_IOCTL_DEF_DRV(AMDGPU_BO_LIST, amdgpu_bo_list_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),
+       DRM_IOCTL_DEF_DRV(AMDGPU_FENCE_TO_HANDLE, amdgpu_cs_fence_to_handle_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),
        /* KMS */
        DRM_IOCTL_DEF_DRV(AMDGPU_GEM_MMAP, amdgpu_gem_mmap_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),
        DRM_IOCTL_DEF_DRV(AMDGPU_GEM_WAIT_IDLE, amdgpu_gem_wait_idle_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),

include/uapi/drm/amdgpu_drm.h +16 -1

index 9f5bd97..ec57cd0 100644
@@ -53,6 +53,7 @@ extern "C" {
 #define DRM_AMDGPU_WAIT_FENCES         0x12
 #define DRM_AMDGPU_VM                  0x13
 #define DRM_AMDGPU_FREESYNC            0x14
+#define DRM_AMDGPU_FENCE_TO_HANDLE     0x15
 
 #define DRM_IOCTL_AMDGPU_GEM_CREATE    DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_CREATE, union drm_amdgpu_gem_create)
 #define DRM_IOCTL_AMDGPU_GEM_MMAP      DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_MMAP, union drm_amdgpu_gem_mmap)

@@ -69,6 +70,7 @@ extern "C" {
 #define DRM_IOCTL_AMDGPU_WAIT_FENCES   DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_WAIT_FENCES, union drm_amdgpu_wait_fences)
 #define DRM_IOCTL_AMDGPU_VM            DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_VM, union drm_amdgpu_vm)
 #define DRM_IOCTL_AMDGPU_FREESYNC      DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_FREESYNC, struct drm_amdgpu_freesync)
+#define DRM_IOCTL_AMDGPU_FENCE_TO_HANDLE DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_FENCE_TO_HANDLE, union drm_amdgpu_fence_to_handle)
 
 #define AMDGPU_GEM_DOMAIN_CPU          0x1
 #define AMDGPU_GEM_DOMAIN_GTT          0x2

@@ -517,6 +519,20 @@ struct drm_amdgpu_cs_chunk_sem {
        __u32 handle;
 };
 
+#define AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ     0
+#define AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ_FD  1
+#define AMDGPU_FENCE_TO_HANDLE_GET_SYNC_FILE_FD        2
+
+union drm_amdgpu_fence_to_handle {
+       struct {
+               struct drm_amdgpu_fence fence;
+               __u32 what;
+       } in;
+       struct {
+               __u32 handle;
+       } out;
+};
+
 struct drm_amdgpu_cs_chunk_data {
        union {
                struct drm_amdgpu_cs_chunk_ib           ib_data;
--

2.7.4

Can I get Rb for this series?

Quoted 2 lines · Marek Olšák

Can I get Rb for this series?

For the series,

Reviewed-by Dave Airlie <[email protected]>

Alex, please merge the two drm core precursor with patch 3.

 include/drm/drm_syncobj.h     |  4 ++++

Hi Marek,

Quoted 1 line · Marek Olšák

 include/drm/drm_syncobj.h     |  4 ++++

Please sync the header as described in
https://cgit.freedesktop.org/mesa/drm/tree/include/drm/README#n72

Tl;DR: cd .../linux; make headers_install; cp ... .../drm/include/drm; cd .../drm; git commit -sm ".... $branch $sha1..."

Quoted 5 lines · Emil Velikov

Hi Marek,

Quoted 1 line · Marek Olšák

 include/drm/drm_syncobj.h     |  4 ++++

Quoted 6 lines

Please sync the header as described in
https://cgit.freedesktop.org/mesa/drm/tree/include/drm/README#n72

Tl;DR: cd .../linux; make headers_install; cp ... .../drm/include/drm; cd .../drm; git commit -sm ".... $branch $sha1..."

Seems like I've replied to the wrong patch - silly me. This was meant for the libdrm ones - suggestion still applies though.