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arm64: dts: stratix10: include the reset manager bindings

PATCH New Dinh Nguyen 1 participant 3 messages Sep 21, 2017

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Device tree bindings Arm/socfpga architecture
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Dinh Nguyen

author maintainer
#0 lore raw

PATCH 1/3 arm64: dts: stratix10: include the reset manager bindings

Add the reset manager includes for Stratix10. Need to use the '#include' instead of '/include/' to avoid a DTC syntax error.

Signed-off-by Dinh Nguyen <[email protected]>
---
 arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi      | 1 +
 arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts | 2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)
arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi +1 -0
index 631e09a..f7fbc38 100644
@@ -15,6 +15,7 @@
  */
 
 /dts-v1/;
+#include <dt-bindings/reset/altr,rst-mgr-s10.h>
 
 / {
 	compatible = "altr,socfpga-stratix10";
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts +1 -1
index 5907586..46f27ed 100644
@@ -14,7 +14,7 @@
  * this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
-/include/ "socfpga_stratix10.dtsi"
+#include "socfpga_stratix10.dtsi"
 
 / {
 	model = "SoCFPGA Stratix 10 SoCDK";
Signature · 1 line
2.7.4
author maintainer
#1 lore raw

PATCH 2/3 arm64: dts: stratix10: add the 'altr, modrst-off' property

Update the Stratix10 reset manager with the 'altr,modrst-offset' property.

Signed-off-by Dinh Nguyen <[email protected]>
---
 arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 1 +
 1 file changed, 1 insertion(+)
arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi +1 -0
index f7fbc38..99e2afe 100644
@@ -224,6 +224,7 @@
 			#reset-cells = <1>;
 			compatible = "altr,rst-mgr";
 			reg = <0xffd11000 0x1000>;
+			altr,modrst-offset = <0x20>;
 		};
 
 		spi0: spi at ffda4000 {
Signature · 1 line
2.7.4
author maintainer
#2 lore raw

PATCH 3/3 arm64: dts: stratix10: add reset property for various peripherals

In reply to Dinh Nguyen

Add reset property for emac, gpio, i2c, sdmmc, timers, and watchdog.

Signed-off-by Dinh Nguyen <[email protected]>
---
 arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 25 +++++++++++++++++++++++
 1 file changed, 25 insertions(+)
arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi +25 -0
index 99e2afe..6804936 100644
@@ -101,6 +101,8 @@
 			interrupts = <0 90 4>;
 			interrupt-names = "macirq";
 			mac-address = [00 00 00 00 00 00];
+			resets = <&rst EMAC0_RESET>;
+			reset-names = "stmmaceth";
 			status = "disabled";
 		};
 

@@ -110,6 +112,8 @@
 			interrupts = <0 91 4>;
 			interrupt-names = "macirq";
 			mac-address = [00 00 00 00 00 00];
+			resets = <&rst EMAC1_RESET>;
+			reset-names = "stmmaceth";
 			status = "disabled";
 		};
 

@@ -119,6 +123,8 @@
 			interrupts = <0 92 4>;
 			interrupt-names = "macirq";
 			mac-address = [00 00 00 00 00 00];
+			resets = <&rst EMAC2_RESET>;
+			reset-names = "stmmaceth";
 			status = "disabled";
 		};
 

@@ -127,6 +133,7 @@
 			#size-cells = <0>;
 			compatible = "snps,dw-apb-gpio";
 			reg = <0xffc03200 0x100>;
+			resets = <&rst GPIO0_RESET>;
 			status = "disabled";
 
 			porta: gpio-controller at 0 {

@@ -146,6 +153,7 @@
 			#size-cells = <0>;
 			compatible = "snps,dw-apb-gpio";
 			reg = <0xffc03300 0x100>;
+			resets = <&rst GPIO1_RESET>;
 			status = "disabled";
 
 			portb: gpio-controller at 0 {

@@ -166,6 +174,7 @@
 			compatible = "snps,designware-i2c";
 			reg = <0xffc02800 0x100>;
 			interrupts = <0 103 4>;
+			resets = <&rst I2C0_RESET>;
 			status = "disabled";
 		};
 

@@ -175,6 +184,7 @@
 			compatible = "snps,designware-i2c";
 			reg = <0xffc02900 0x100>;
 			interrupts = <0 104 4>;
+			resets = <&rst I2C1_RESET>;
 			status = "disabled";
 		};
 

@@ -184,6 +194,7 @@
 			compatible = "snps,designware-i2c";
 			reg = <0xffc02a00 0x100>;
 			interrupts = <0 105 4>;
+			resets = <&rst I2C2_RESET>;
 			status = "disabled";
 		};
 

@@ -193,6 +204,7 @@
 			compatible = "snps,designware-i2c";
 			reg = <0xffc02b00 0x100>;
 			interrupts = <0 106 4>;
+			resets = <&rst I2C3_RESET>;
 			status = "disabled";
 		};
 

@@ -202,6 +214,7 @@
 			compatible = "snps,designware-i2c";
 			reg = <0xffc02c00 0x100>;
 			interrupts = <0 107 4>;
+			resets = <&rst I2C4_RESET>;
 			status = "disabled";
 		};
 

@@ -212,6 +225,8 @@
 			reg = <0xff808000 0x1000>;
 			interrupts = <0 96 4>;
 			fifo-depth = <0x400>;
+			resets = <&rst SDMMC_RESET>;
+			reset-names = "reset";
 			status = "disabled";
 		};
 

@@ -293,6 +308,7 @@
 			interrupts = <0 108 4>;
 			reg-shift = <2>;
 			reg-io-width = <4>;
+			resets = <&rst UART0_RESET>;
 			status = "disabled";
 		};
 

@@ -302,6 +318,7 @@
 			interrupts = <0 109 4>;
 			reg-shift = <2>;
 			reg-io-width = <4>;
+			resets = <&rst UART1_RESET>;
 			status = "disabled";
 		};
 

@@ -317,6 +334,8 @@
 			interrupts = <0 93 4>;
 			phys = <&usbphy0>;
 			phy-names = "usb2-phy";
+			resets = <&rst USB0_RESET>;
+			reset-names = "dwc2";
 			status = "disabled";
 		};
 

@@ -326,6 +345,8 @@
 			interrupts = <0 94 4>;
 			phys = <&usbphy0>;
 			phy-names = "usb2-phy";
+			resets = <&rst USB1_RESET>;
+			reset-names = "dwc2";
 			status = "disabled";
 		};
 

@@ -333,6 +354,7 @@
 			compatible = "snps,dw-wdt";
 			reg = <0xffd00200 0x100>;
 			interrupts = <0 117 4>;
+			resets = <&rst WATCHDOG0_RESET>;
 			status = "disabled";
 		};
 

@@ -340,6 +362,7 @@
 			compatible = "snps,dw-wdt";
 			reg = <0xffd00300 0x100>;
 			interrupts = <0 118 4>;
+			resets = <&rst WATCHDOG1_RESET>;
 			status = "disabled";
 		};
 

@@ -347,6 +370,7 @@
 			compatible = "snps,dw-wdt";
 			reg = <0xffd00400 0x100>;
 			interrupts = <0 125 4>;
+			resets = <&rst WATCHDOG2_RESET>;
 			status = "disabled";
 		};
 

@@ -354,6 +378,7 @@
 			compatible = "snps,dw-wdt";
 			reg = <0xffd00500 0x100>;
 			interrupts = <0 126 4>;
+			resets = <&rst WATCHDOG3_RESET>;
 			status = "disabled";
 		};
 	};
Signature · 1 line
2.7.4