Patch "crypto: ccp - Fix XTS-AES-128 support on v5 CCPs" has been added to the 4.13-stable tree
This is a note to let you know that I've just added the patch titled
crypto: ccp - Fix XTS-AES-128 support on v5 CCPs
to the 4.13-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
crypto-ccp-fix-xts-aes-128-support-on-v5-ccps.patch
and it can be found in the queue-4.13 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.
Quoted 1 line
From
e652399edba99a5497f0d80f240c9075d3b43493Mon Sep 17 00:00:00 2001
From: Gary R Hook <[email protected]>
Date: Tue, 25 Jul 2017 14:12:11 -0500
Subject: crypto: ccp - Fix XTS-AES-128 support on v5 CCPs
From: Gary R Hook <[email protected]>
commit e652399edba99a5497f0d80f240c9075d3b43493 upstream.
Version 5 CCPs have some new requirements for XTS-AES: the type field must be specified, and the key requires 512 bits, with each part occupying 256 bits and padded with zeroes.
--- drivers/crypto/ccp/ccp-crypto-aes-xts.c | 4 ++ drivers/crypto/ccp/ccp-dev-v5.c | 2 + drivers/crypto/ccp/ccp-dev.h | 2 + drivers/crypto/ccp/ccp-ops.c | 43 +++++++++++++++++++++++++------- include/linux/ccp.h | 3 +- 5 files changed, 43 insertions(+), 11 deletions(-)
drivers/crypto/ccp/ccp-crypto-aes-xts.c +3 -1
@@ -1,8 +1,9 @@/* * AMD Cryptographic Coprocessor (CCP) AES XTS crypto API support * -* Copyright (C) 2013 Advanced Micro Devices, Inc. +* Copyright (C) 2013,2017 Advanced Micro Devices, Inc. * +* Author: Gary R Hook <[email protected]> * Author: Tom Lendacky <[email protected]> * * This program is free software; you can redistribute it and/or modify
@@ -164,6 +165,7 @@ static int ccp_aes_xts_crypt(struct ablkmemset (&rctx->cmd,0 ,sizeof (rctx->cmd));INIT_LIST_HEAD (&rctx->cmd.entry); rctx->cmd.engine =CCP_ENGINE_XTS_AES_128 ; + rctx->cmd.u.xts.type =CCP_AES_TYPE_128 ; rctx->cmd.u.xts.action = (encrypt) ?CCP_AES_ACTION_ENCRYPT :CCP_AES_ACTION_DECRYPT ; rctx->cmd.u.xts.unit_size = unit_size;
drivers/crypto/ccp/ccp-dev-v5.c +2 -0
@@ -145,6 +145,7 @@ union ccp_function {#define CCP_AES_MODE (p) ((p)->aes.mode)#define CCP_AES_TYPE (p) ((p)->aes.type)#define CCP_XTS_SIZE (p) ((p)->aes_xts.size) +#define CCP_XTS_TYPE (p) ((p)->aes_xts.type)#define CCP_XTS_ENCRYPT (p) ((p)->aes_xts.encrypt)#define CCP_DES3_SIZE (p) ((p)->des3.size)#define CCP_DES3_ENCRYPT (p) ((p)->des3.encrypt)
@@ -344,6 +345,7 @@ static int ccp5_perform_xts_aes(struct cCCP5_CMD_PROT (&desc) =0 ; function.raw =0 ; +CCP_XTS_TYPE (&function) = op->u.xts.type;CCP_XTS_ENCRYPT (&function) = op->u.xts.action;CCP_XTS_SIZE (&function) = op->u.xts.unit_size;CCP5_CMD_FUNCTION (&desc) = function.raw;
drivers/crypto/ccp/ccp-dev.h +2 -0
@@ -192,6 +192,7 @@#define CCP_AES_CTX_SB_COUNT 1#define CCP_XTS_AES_KEY_SB_COUNT 1 +#define CCP5_XTS_AES_KEY_SB_COUNT 2#define CCP_XTS_AES_CTX_SB_COUNT 1#define CCP_DES3_KEY_SB_COUNT 1
@@ -497,6 +498,7 @@ struct ccp_aes_op { };struct ccp_xts_aes_op { +enum ccp_aes_type type;enum ccp_aes_action action;enum ccp_xts_aes_unit_size unit_size; };
drivers/crypto/ccp/ccp-ops.c +34 -9
70 lines not on this page · raw message
include/linux/ccp.h +2 -1
@@ -1,7 +1,7 @@/* * AMD Cryptographic Coprocessor (CCP) driver * -* Copyright (C) 2013,2016 Advanced Micro Devices, Inc. +* Copyright (C) 2013,2017 Advanced Micro Devices, Inc. * * Author: Tom Lendacky <[email protected]> * Author: Gary R Hook <[email protected]>
@@ -231,6 +231,7 @@ enum ccp_xts_aes_unit_size {* AES operation the new IV overwrites the old IV. */ struct ccp_xts_aes_engine { +enum ccp_aes_type type;enum ccp_aes_action action;enum ccp_xts_aes_unit_size unit_size;
Patches currently in stable-queue which might be from [email protected] are
queue-4.13/crypto-ccp-fix-xts-aes-128-support-on-v5-ccps.patch