drm/amdgpu: correct reference clock value on vega10

PATCH New [email protected] 1 participant 1 message Sep 29, 2017

Subsystems (2)

DRM drivers Radeon and amdgpu DRM drivers

lore

Share & tools

lore

[email protected]

author

2017-09-29 08:14 UTC #0 lore raw

PATCH 1/1 drm/amdgpu: correct reference clock value on vega10

From: Ken Wang <[email protected]>

Change-Id I377029075af1e2e002f7cfd793ddd58d8610e474

Signed-off-by Ken Wang <[email protected]>

---
 drivers/gpu/drm/amd/amdgpu/soc15.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

drivers/gpu/drm/amd/amdgpu/soc15.c +1 -1

index 7839677..631b1e3 100644
@@ -280,7 +280,7 @@ static void soc15_init_golden_registers(struct amdgpu_device *adev)
 static u32 soc15_get_xclk(struct amdgpu_device *adev)
 {
 	if (adev->asic_type == CHIP_VEGA10)
-		return adev->clock.spll.reference_freq/4;
+		return 27000;
 	else
 		return adev->clock.spll.reference_freq;
 }

Signature · 6 lines

2.7.4

_______________________________________________
amd-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/amd-gfx