drm/amdgpu: correct reference clock value on vega10
Subsystems (2)
PATCH 1/1 drm/amdgpu: correct reference clock value on vega10
From: Ken Wang <[email protected]>
--- drivers/gpu/drm/amd/amdgpu/soc15.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/gpu/drm/amd/amdgpu/soc15.c +1 -1
@@ -280,7 +280,7 @@ static void soc15_init_golden_registers(struct amdgpu_device *adev)static u32 soc15_get_xclk (struct amdgpu_device *adev) {if (adev->asic_type ==CHIP_VEGA10 ) -return adev->clock.spll.reference_freq/4 ; +return 27000 ;else return adev->clock.spll.reference_freq; }
Signature · 6 lines
2.7.4 _______________________________________________ amd-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/amd-gfx
A message that is not in the archive (sent off-list or not yet received): 1506674119-19979-1-git-send-email-Ken.Wang-5C7GfCeVMHo@public.gmane.org
Reviewed-by:
Rex Zhu <[email protected]>
Best Regards
Rex
-----Original Message-----
From: amd-gfx [mailto:[email protected]] On Behalf Of [email protected]
Sent: Friday, September 29, 2017 4:35 PM
To: [email protected]
Cc: Wang, Ken
Subject: [PATCH] drm/amdgpu: correct reference clock value on vega10
From: Ken Wang <[email protected]>
--- drivers/gpu/drm/amd/amdgpu/soc15.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/gpu/drm/amd/amdgpu/soc15.c +1 -2
@@ -280,7 +280,7 @@ static void soc15_init_golden_registers(struct amdgpu_device *adev) static u32 soc15_get_xclk(struct amdgpu_device *adev) {if (adev->asic_type ==CHIP_VEGA10 ) -return adev->clock.spll.reference_freq/4 ; +return 27000 ;else return adev->clock.spll.reference_freq; } --
2.7.4
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